reactos/lib/fast486/common.c

   1 /*
   2  * Fast486 386/486 CPU Emulation Library
   3  * common.c
   4  *
   5  * Copyright (C) 2014 Aleksandar Andrejevic <theflash AT sdf DOT lonestar DOT org>
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License
   9  * as published by the Free Software Foundation; either version 2
  10  * of the License, or (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
  20  */
  21
  22 /* INCLUDES *******************************************************************/
  23
  24 #include <windef.h>
  25
  26 // #define NDEBUG
  27 #include <debug.h>
  28
  29 #include <fast486.h>
  30 #include "common.h"
  31
  32 /* PUBLIC FUNCTIONS ***********************************************************/
  33
  34 BOOLEAN
  35 Fast486ReadMemory(PFAST486_STATE State,
  36                   FAST486_SEG_REGS SegmentReg,
  37                   ULONG Offset,
  38                   BOOLEAN InstFetch,
  39                   PVOID Buffer,
  40                   ULONG Size)
  41 {
  42     ULONG LinearAddress;
  43     PFAST486_SEG_REG CachedDescriptor;
  44
  45     ASSERT(SegmentReg < FAST486_NUM_SEG_REGS);
  46
  47     /* Get the cached descriptor */
  48     CachedDescriptor = &State->SegmentRegs[SegmentReg];
  49
  50     if ((Offset + Size - 1) > CachedDescriptor->Limit)
  51     {
  52         /* Read beyond limit */
  53         Fast486Exception(State, FAST486_EXCEPTION_GP);
  54         return FALSE;
  55     }
  56
  57     /* Check for protected mode */
  58     if (State->ControlRegisters[FAST486_REG_CR0] & FAST486_CR0_PE)
  59     {
  60         /* Privilege checks */
  61
  62         if (!CachedDescriptor->Present)
  63         {
  64             Fast486Exception(State, FAST486_EXCEPTION_NP);
  65             return FALSE;
  66         }
  67
  68         if ((!InstFetch && (CachedDescriptor->Rpl > CachedDescriptor->Dpl))
  69             || (Fast486GetCurrentPrivLevel(State) > CachedDescriptor->Dpl))
  70         {
  71             Fast486Exception(State, FAST486_EXCEPTION_GP);
  72             return FALSE;
  73         }
  74
  75         if (InstFetch)
  76         {
  77             if (!CachedDescriptor->Executable)
  78             {
  79                 /* Data segment not executable */
  80                 Fast486Exception(State, FAST486_EXCEPTION_GP);
  81                 return FALSE;
  82             }
  83         }
  84         else
  85         {
  86             if (CachedDescriptor->Executable && (!CachedDescriptor->ReadWrite))
  87             {
  88                 /* Code segment not readable */
  89                 Fast486Exception(State, FAST486_EXCEPTION_GP);
  90                 return FALSE;
  91             }
  92         }
  93     }
  94
  95     /* Find the linear address */
  96     LinearAddress = CachedDescriptor->Base + Offset;
  97
  98 #ifndef FAST486_NO_PREFETCH
  99     if (InstFetch && ((Offset + FAST486_CACHE_SIZE - 1) <= CachedDescriptor->Limit))
 100     {
 101         State->PrefetchAddress = LinearAddress;
 102
 103         if ((State->ControlRegisters[FAST486_REG_CR0] & FAST486_CR0_PG)
 104             && (PAGE_OFFSET(State->PrefetchAddress) > (FAST486_PAGE_SIZE - FAST486_CACHE_SIZE)))
 105         {
 106             /* We mustn't prefetch across a page boundary */
 107             State->PrefetchAddress = PAGE_ALIGN(State->PrefetchAddress)
 108                                      | (FAST486_PAGE_SIZE - FAST486_CACHE_SIZE);
 109
 110             if ((LinearAddress - State->PrefetchAddress + Size) >= FAST486_CACHE_SIZE)
 111             {
 112                 /* We can't prefetch without possibly violating page permissions */
 113                 State->PrefetchValid = FALSE;
 114                 return Fast486ReadLinearMemory(State, LinearAddress, Buffer, Size);
 115             }
 116         }
 117
 118         /* Prefetch */
 119         if (Fast486ReadLinearMemory(State,
 120                                     State->PrefetchAddress,
 121                                     State->PrefetchCache,
 122                                     FAST486_CACHE_SIZE))
 123         {
 124             State->PrefetchValid = TRUE;
 125
 126             RtlMoveMemory(Buffer,
 127                           &State->PrefetchCache[LinearAddress - State->PrefetchAddress],
 128                           Size);
 129             return TRUE;
 130         }
 131         else
 132         {
 133             State->PrefetchValid = FALSE;
 134             return FALSE;
 135         }
 136     }
 137     else
 138 #endif
 139     {
 140         /* Read from the linear address */
 141         return Fast486ReadLinearMemory(State, LinearAddress, Buffer, Size);
 142     }
 143 }
 144
 145 BOOLEAN
 146 Fast486WriteMemory(PFAST486_STATE State,
 147                    FAST486_SEG_REGS SegmentReg,
 148                    ULONG Offset,
 149                    PVOID Buffer,
 150                    ULONG Size)
 151 {
 152     ULONG LinearAddress;
 153     PFAST486_SEG_REG CachedDescriptor;
 154
 155     ASSERT(SegmentReg < FAST486_NUM_SEG_REGS);
 156
 157     /* Get the cached descriptor */
 158     CachedDescriptor = &State->SegmentRegs[SegmentReg];
 159
 160     if ((Offset + Size - 1) > CachedDescriptor->Limit)
 161     {
 162         /* Write beyond limit */
 163         Fast486Exception(State, FAST486_EXCEPTION_GP);
 164         return FALSE;
 165     }
 166
 167     /* Check for protected mode */
 168     if (State->ControlRegisters[FAST486_REG_CR0] & FAST486_CR0_PE)
 169     {
 170         /* Privilege checks */
 171
 172         if (!CachedDescriptor->Present)
 173         {
 174             Fast486Exception(State, FAST486_EXCEPTION_NP);
 175             return FALSE;
 176         }
 177
 178         if ((CachedDescriptor->Rpl > CachedDescriptor->Dpl)
 179             || (Fast486GetCurrentPrivLevel(State) > CachedDescriptor->Dpl))
 180         {
 181             Fast486Exception(State, FAST486_EXCEPTION_GP);
 182             return FALSE;
 183         }
 184
 185         if (CachedDescriptor->Executable)
 186         {
 187             /* Code segment not writable */
 188             Fast486Exception(State, FAST486_EXCEPTION_GP);
 189             return FALSE;
 190         }
 191         else if (!CachedDescriptor->ReadWrite)
 192         {
 193             /* Data segment not writeable */
 194             Fast486Exception(State, FAST486_EXCEPTION_GP);
 195             return FALSE;
 196         }
 197     }
 198
 199     /* Find the linear address */
 200     LinearAddress = CachedDescriptor->Base + Offset;
 201
 202 #ifndef FAST486_NO_PREFETCH
 203     if (State->PrefetchValid
 204         && (LinearAddress >= State->PrefetchAddress)
 205         && ((LinearAddress + Size) <= (State->PrefetchAddress + FAST486_CACHE_SIZE)))
 206     {
 207         /* Update the prefetch */
 208         RtlMoveMemory(&State->PrefetchCache[LinearAddress - State->PrefetchAddress],
 209                       Buffer,
 210                       min(Size, FAST486_CACHE_SIZE + State->PrefetchAddress - LinearAddress));
 211     }
 212 #endif
 213
 214     /* Write to the linear address */
 215     return Fast486WriteLinearMemory(State, LinearAddress, Buffer, Size);
 216 }
 217
 218 static inline BOOLEAN
 219 FASTCALL
 220 Fast486GetIntVector(PFAST486_STATE State,
 221                     UCHAR Number,
 222                     PFAST486_IDT_ENTRY IdtEntry)
 223 {
 224     /* Check for protected mode */
 225     if (State->ControlRegisters[FAST486_REG_CR0] & FAST486_CR0_PE)
 226     {
 227         /* Read from the IDT */
 228         if (!Fast486ReadLinearMemory(State,
 229                                      State->Idtr.Address
 230                                      + Number * sizeof(*IdtEntry),
 231                                      IdtEntry,
 232                                      sizeof(*IdtEntry)))
 233         {
 234             /* Exception occurred */
 235             return FALSE;
 236         }
 237     }
 238     else
 239     {
 240         /* Read from the real-mode IVT */
 241         ULONG FarPointer;
 242
 243         /* Paging is always disabled in real mode */
 244         State->MemReadCallback(State,
 245                                State->Idtr.Address
 246                                + Number * sizeof(FarPointer),
 247                                &FarPointer,
 248                                sizeof(FarPointer));
 249
 250         /* Fill a fake IDT entry */
 251         IdtEntry->Offset = LOWORD(FarPointer);
 252         IdtEntry->Selector = HIWORD(FarPointer);
 253         IdtEntry->Zero = 0;
 254         IdtEntry->Type = FAST486_IDT_INT_GATE;
 255         IdtEntry->Storage = FALSE;
 256         IdtEntry->Dpl = 0;
 257         IdtEntry->Present = TRUE;
 258         IdtEntry->OffsetHigh = 0;
 259     }
 260
 261     return TRUE;
 262 }
 263
 264 static inline BOOLEAN
 265 FASTCALL
 266 Fast486InterruptInternal(PFAST486_STATE State,
 267                          PFAST486_IDT_ENTRY IdtEntry)
 268 {
 269     USHORT SegmentSelector = IdtEntry->Selector;
 270     ULONG  Offset          = MAKELONG(IdtEntry->Offset, IdtEntry->OffsetHigh);
 271     ULONG  GateType        = IdtEntry->Type;
 272     BOOLEAN GateSize = (GateType == FAST486_IDT_INT_GATE_32) ||
 273                        (GateType == FAST486_IDT_TRAP_GATE_32);
 274
 275     BOOLEAN Success = FALSE;
 276     ULONG OldPrefixFlags = State->PrefixFlags;
 277
 278     /* Check for protected mode */
 279     if (State->ControlRegisters[FAST486_REG_CR0] & FAST486_CR0_PE)
 280     {
 281         FAST486_TSS Tss;
 282         USHORT OldSs = State->SegmentRegs[FAST486_REG_SS].Selector;
 283         ULONG OldEsp = State->GeneralRegs[FAST486_REG_ESP].Long;
 284
 285         if (GateType == FAST486_TASK_GATE_SIGNATURE)
 286         {
 287             /* Task call */
 288             return Fast486TaskSwitch(State, FAST486_TASK_CALL, IdtEntry->Selector);
 289         }
 290
 291         if (GateSize != (State->SegmentRegs[FAST486_REG_CS].Size))
 292         {
 293             /*
 294              * The gate size doesn't match the current operand size, so toggle
 295              * the OPSIZE flag.
 296              */
 297             State->PrefixFlags ^= FAST486_PREFIX_OPSIZE;
 298         }
 299
 300         /* Check if the interrupt handler is more privileged */
 301         if (Fast486GetCurrentPrivLevel(State) > GET_SEGMENT_RPL(SegmentSelector))
 302         {
 303             /* Read the TSS */
 304             if (!Fast486ReadLinearMemory(State,
 305                                          State->TaskReg.Base,
 306                                          &Tss,
 307                                          sizeof(Tss)))
 308             {
 309                 /* Exception occurred */
 310                 goto Cleanup;
 311             }
 312
 313             /* Check the new (higher) privilege level */
 314             switch (GET_SEGMENT_RPL(SegmentSelector))
 315             {
 316                 case 0:
 317                 {
 318                     if (!Fast486LoadSegment(State, FAST486_REG_SS, Tss.Ss0))
 319                     {
 320                         /* Exception occurred */
 321                         goto Cleanup;
 322                     }
 323                     State->GeneralRegs[FAST486_REG_ESP].Long = Tss.Esp0;
 324
 325                     break;
 326                 }
 327
 328                 case 1:
 329                 {
 330                     if (!Fast486LoadSegment(State, FAST486_REG_SS, Tss.Ss1))
 331                     {
 332                         /* Exception occurred */
 333                         goto Cleanup;
 334                     }
 335                     State->GeneralRegs[FAST486_REG_ESP].Long = Tss.Esp1;
 336
 337                     break;
 338                 }
 339
 340                 case 2:
 341                 {
 342                     if (!Fast486LoadSegment(State, FAST486_REG_SS, Tss.Ss2))
 343                     {
 344                         /* Exception occurred */
 345                         goto Cleanup;
 346                     }
 347                     State->GeneralRegs[FAST486_REG_ESP].Long = Tss.Esp2;
 348
 349                     break;
 350                 }
 351
 352                 default:
 353                 {
 354                     /* Should never reach here! */
 355                     ASSERT(FALSE);
 356                 }
 357             }
 358
 359             /* Push SS selector */
 360             if (!Fast486StackPush(State, OldSs)) goto Cleanup;
 361
 362             /* Push stack pointer */
 363             if (!Fast486StackPush(State, OldEsp)) goto Cleanup;
 364         }
 365     }
 366     else
 367     {
 368         if (State->SegmentRegs[FAST486_REG_CS].Size)
 369         {
 370             /* Set OPSIZE, because INT always pushes 16-bit values in real mode */
 371             State->PrefixFlags |= FAST486_PREFIX_OPSIZE;
 372         }
 373     }
 374
 375     /* Push EFLAGS */
 376     if (!Fast486StackPush(State, State->Flags.Long)) goto Cleanup;
 377
 378     /* Push CS selector */
 379     if (!Fast486StackPush(State, State->SegmentRegs[FAST486_REG_CS].Selector)) goto Cleanup;
 380
 381     /* Push the instruction pointer */
 382     if (!Fast486StackPush(State, State->InstPtr.Long)) goto Cleanup;
 383
 384     if ((GateType == FAST486_IDT_INT_GATE) || (GateType == FAST486_IDT_INT_GATE_32))
 385     {
 386         /* Disable interrupts after a jump to an interrupt gate handler */
 387         State->Flags.If = FALSE;
 388     }
 389
 390     /* Load new CS */
 391     if (!Fast486LoadSegment(State, FAST486_REG_CS, SegmentSelector))
 392     {
 393         /* An exception occurred during the jump */
 394         goto Cleanup;
 395     }
 396
 397     if (GateSize)
 398     {
 399         /* 32-bit code segment, use EIP */
 400         State->InstPtr.Long = Offset;
 401     }
 402     else
 403     {
 404         /* 16-bit code segment, use IP */
 405         State->InstPtr.LowWord = LOWORD(Offset);
 406     }
 407
 408     Success = TRUE;
 409
 410 Cleanup:
 411     /* Restore the prefix flags */
 412     State->PrefixFlags = OldPrefixFlags;
 413
 414     return Success;
 415 }
 416
 417 BOOLEAN
 418 FASTCALL
 419 Fast486PerformInterrupt(PFAST486_STATE State,
 420                         UCHAR Number)
 421 {
 422     FAST486_IDT_ENTRY IdtEntry;
 423
 424     /* Get the interrupt vector */
 425     if (!Fast486GetIntVector(State, Number, &IdtEntry))
 426     {
 427         /* Exception occurred */
 428         return FALSE;
 429     }
 430
 431     /* Perform the interrupt */
 432     if (!Fast486InterruptInternal(State, &IdtEntry))
 433     {
 434         /* Exception occurred */
 435         return FALSE;
 436     }
 437
 438     return TRUE;
 439 }
 440
 441 VOID
 442 FASTCALL
 443 Fast486ExceptionWithErrorCode(PFAST486_STATE State,
 444                               FAST486_EXCEPTIONS ExceptionCode,
 445                               ULONG ErrorCode)
 446 {
 447     /* Increment the exception count */
 448     State->ExceptionCount++;
 449
 450     /* Check if the exception occurred more than once */
 451     if (State->ExceptionCount > 1)
 452     {
 453         /* Then this is a double fault */
 454         ExceptionCode = FAST486_EXCEPTION_DF;
 455     }
 456
 457     /* Check if this is a triple fault */
 458     if (State->ExceptionCount == 3)
 459     {
 460         DPRINT("Fast486ExceptionWithErrorCode(%04X:%08X) -- Triple fault\n",
 461                State->SegmentRegs[FAST486_REG_CS].Selector,
 462                State->InstPtr.Long);
 463
 464         /* Reset the CPU */
 465         Fast486Reset(State);
 466         return;
 467     }
 468
 469     /* Restore the IP to the saved IP */
 470     State->InstPtr = State->SavedInstPtr;
 471
 472     /* Perform the interrupt */
 473     if (!Fast486PerformInterrupt(State, ExceptionCode))
 474     {
 475         /*
 476          * If this function failed, that means Fast486Exception
 477          * was called again, so just return in this case.
 478          */
 479         return;
 480     }
 481
 482     if (EXCEPTION_HAS_ERROR_CODE(ExceptionCode)
 483         && (State->ControlRegisters[FAST486_REG_CR0] & FAST486_CR0_PE))
 484     {
 485         /* Push the error code */
 486         if (!Fast486StackPush(State, ErrorCode))
 487         {
 488             /*
 489              * If this function failed, that means Fast486Exception
 490              * was called again, so just return in this case.
 491              */
 492             return;
 493         }
 494     }
 495
 496     /* Reset the exception count */
 497     State->ExceptionCount = 0;
 498 }
 499
 500 BOOLEAN
 501 FASTCALL
 502 Fast486TaskSwitch(PFAST486_STATE State, FAST486_TASK_SWITCH_TYPE Type, USHORT Selector)
 503 {
 504     ULONG NewTssAddress;
 505     ULONG NewTssLimit;
 506     FAST486_TSS OldTss;
 507     FAST486_TSS NewTss;
 508     FAST486_SYSTEM_DESCRIPTOR NewTssDescriptor;
 509
 510     /* Read the old TSS */
 511     if (!Fast486ReadLinearMemory(State,
 512                                  State->TaskReg.Base,
 513                                  &OldTss,
 514                                  sizeof(OldTss)))
 515     {
 516         /* Exception occurred */
 517         return FALSE;
 518     }
 519
 520     /* If this is a task return, use the linked previous selector */
 521     if (Type == FAST486_TASK_RETURN) Selector = LOWORD(OldTss.Link);
 522
 523     /* Make sure the entry exists in the GDT (not LDT!) */
 524     if ((GET_SEGMENT_INDEX(Selector) == 0)
 525         || (Selector & SEGMENT_TABLE_INDICATOR)
 526         || GET_SEGMENT_INDEX(Selector) >= (State->Gdtr.Size + 1))
 527     {
 528         Fast486ExceptionWithErrorCode(State, FAST486_EXCEPTION_TS, Selector);
 529         return FALSE;
 530     }
 531
 532     /* Get the TSS descriptor from the GDT */
 533     if (!Fast486ReadLinearMemory(State,
 534                                  State->Gdtr.Address + GET_SEGMENT_INDEX(Selector),
 535                                  &NewTssDescriptor,
 536                                  sizeof(NewTssDescriptor)))
 537     {
 538         /* Exception occurred */
 539         return FALSE;
 540     }
 541
 542     if (!NewTssDescriptor.Present)
 543     {
 544         /* Incoming task TSS not present */
 545         Fast486ExceptionWithErrorCode(State, FAST486_EXCEPTION_NP, Selector);
 546         return FALSE;
 547     }
 548
 549     /* Calculate the linear address of the new TSS */
 550     NewTssAddress = NewTssDescriptor.Base;
 551     NewTssAddress |= NewTssDescriptor.BaseMid << 16;
 552     NewTssAddress |= NewTssDescriptor.BaseHigh << 24;
 553
 554     /* Calculate the limit of the new TSS */
 555     NewTssLimit = NewTssDescriptor.Limit | (NewTssDescriptor.LimitHigh << 16);
 556     if (NewTssDescriptor.Granularity) NewTssLimit <<= 12;
 557
 558     if (NewTssLimit < sizeof(FAST486_TSS))
 559     {
 560         /* TSS limit too small */
 561         Fast486ExceptionWithErrorCode(State, FAST486_EXCEPTION_TS, Selector);
 562     }
 563
 564     /*
 565      * The incoming task shouldn't be busy if we're executing it as a
 566      * new task, and it should be busy if we're returning to it.
 567      */
 568     if (((NewTssDescriptor.Signature != FAST486_TSS_SIGNATURE)
 569         || (Type == FAST486_TASK_RETURN))
 570         && ((NewTssDescriptor.Signature != FAST486_BUSY_TSS_SIGNATURE)
 571         || (Type != FAST486_TASK_RETURN)))
 572     {
 573         Fast486ExceptionWithErrorCode(State, FAST486_EXCEPTION_GP, Selector);
 574         return FALSE;
 575     }
 576
 577     /* Read the new TSS */
 578     if (!Fast486ReadLinearMemory(State,
 579                                  NewTssAddress,
 580                                  &NewTss,
 581                                  sizeof(NewTss)))
 582     {
 583         /* Exception occurred */
 584         return FALSE;
 585     }
 586
 587     if (Type != FAST486_TASK_CALL)
 588     {
 589         /* Clear the busy bit of the outgoing task */
 590         FAST486_SYSTEM_DESCRIPTOR OldTssDescriptor;
 591
 592         if (!Fast486ReadLinearMemory(State,
 593                                      State->Gdtr.Address
 594                                      + GET_SEGMENT_INDEX(State->TaskReg.Selector),
 595                                      &OldTssDescriptor,
 596                                      sizeof(OldTssDescriptor)))
 597         {
 598             /* Exception occurred */
 599             return FALSE;
 600         }
 601
 602         OldTssDescriptor.Signature = FAST486_TSS_SIGNATURE;
 603
 604         if (!Fast486WriteLinearMemory(State,
 605                                       State->Gdtr.Address
 606                                       + GET_SEGMENT_INDEX(State->TaskReg.Selector),
 607                                       &OldTssDescriptor,
 608                                       sizeof(OldTssDescriptor)))
 609         {
 610             /* Exception occurred */
 611             return FALSE;
 612         }
 613     }
 614     else
 615     {
 616         /* Store the link */
 617         NewTss.Link = State->TaskReg.Selector;
 618     }
 619
 620     /* Save the current task into the TSS */
 621     OldTss.Cr3 = State->ControlRegisters[FAST486_REG_CR3];
 622     OldTss.Eip = State->InstPtr.Long;
 623     OldTss.Eflags = State->Flags.Long;
 624     OldTss.Eax = State->GeneralRegs[FAST486_REG_EAX].Long;
 625     OldTss.Ecx = State->GeneralRegs[FAST486_REG_ECX].Long;
 626     OldTss.Edx = State->GeneralRegs[FAST486_REG_EDX].Long;
 627     OldTss.Ebx = State->GeneralRegs[FAST486_REG_EBX].Long;
 628     OldTss.Esp = State->GeneralRegs[FAST486_REG_ESP].Long;
 629     OldTss.Ebp = State->GeneralRegs[FAST486_REG_EBP].Long;
 630     OldTss.Esi = State->GeneralRegs[FAST486_REG_ESI].Long;
 631     OldTss.Edi = State->GeneralRegs[FAST486_REG_EDI].Long;
 632     OldTss.Es = State->SegmentRegs[FAST486_REG_ES].Selector;
 633     OldTss.Cs = State->SegmentRegs[FAST486_REG_CS].Selector;
 634     OldTss.Ss = State->SegmentRegs[FAST486_REG_SS].Selector;
 635     OldTss.Ds = State->SegmentRegs[FAST486_REG_DS].Selector;
 636     OldTss.Fs = State->SegmentRegs[FAST486_REG_FS].Selector;
 637     OldTss.Gs = State->SegmentRegs[FAST486_REG_GS].Selector;
 638     OldTss.Ldtr = State->Ldtr.Selector;
 639
 640     /* Write back the old TSS */
 641     if (!Fast486WriteLinearMemory(State,
 642                                   State->TaskReg.Base,
 643                                   &OldTss,
 644                                   sizeof(OldTss)))
 645     {
 646         /* Exception occurred */
 647         return FALSE;
 648     }
 649
 650     /* Mark the new task as busy */
 651     NewTssDescriptor.Signature = FAST486_BUSY_TSS_SIGNATURE;
 652
 653     /* Write back the new TSS descriptor */
 654     if (!Fast486WriteLinearMemory(State,
 655                                   State->Gdtr.Address + GET_SEGMENT_INDEX(Selector),
 656                                   &NewTssDescriptor,
 657                                   sizeof(NewTssDescriptor)))
 658     {
 659         /* Exception occurred */
 660         return FALSE;
 661     }
 662
 663     /* Set the task switch bit */
 664     State->ControlRegisters[FAST486_REG_CR0] |= FAST486_CR0_TS;
 665
 666     /* Load the task register with the new values */
 667     State->TaskReg.Selector = Selector;
 668     State->TaskReg.Base = NewTssAddress;
 669     State->TaskReg.Limit = NewTssLimit;
 670
 671     /* Change the page directory */
 672     State->ControlRegisters[FAST486_REG_CR3] = NewTss.Cr3;
 673
 674     /* Flush the TLB */
 675     if (State->Tlb) RtlZeroMemory(State->Tlb, NUM_TLB_ENTRIES * sizeof(ULONG));
 676
 677 #ifndef FAST486_NO_PREFETCH
 678     /* Context switching invalidates the prefetch */
 679     State->PrefetchValid = FALSE;
 680 #endif
 681
 682     /* Load the registers */
 683     State->InstPtr.Long = State->SavedInstPtr.Long = NewTss.Eip;
 684     State->Flags.Long = NewTss.Eflags;
 685     State->GeneralRegs[FAST486_REG_EAX].Long = NewTss.Eax;
 686     State->GeneralRegs[FAST486_REG_ECX].Long = NewTss.Ecx;
 687     State->GeneralRegs[FAST486_REG_EDX].Long = NewTss.Edx;
 688     State->GeneralRegs[FAST486_REG_EBX].Long = NewTss.Ebx;
 689     State->GeneralRegs[FAST486_REG_ESP].Long = NewTss.Esp;
 690     State->GeneralRegs[FAST486_REG_EBP].Long = NewTss.Ebp;
 691     State->GeneralRegs[FAST486_REG_ESI].Long = NewTss.Esi;
 692     State->GeneralRegs[FAST486_REG_EDI].Long = NewTss.Edi;
 693
 694     /* Set the NT flag if nesting */
 695     if (Type == FAST486_TASK_CALL) State->Flags.Nt = TRUE;
 696
 697     if (GET_SEGMENT_INDEX(NewTss.Ldtr) != 0)
 698     {
 699         BOOLEAN Valid;
 700         FAST486_SYSTEM_DESCRIPTOR GdtEntry;
 701
 702         if (NewTss.Ldtr & SEGMENT_TABLE_INDICATOR)
 703         {
 704             /* This selector doesn't point to the GDT */
 705             Fast486ExceptionWithErrorCode(State, FAST486_EXCEPTION_TS, NewTss.Ldtr);
 706             return FALSE;
 707         }
 708
 709         if (!Fast486ReadDescriptorEntry(State,
 710                                         NewTss.Ldtr,
 711                                         &Valid,
 712                                         (PFAST486_GDT_ENTRY)&GdtEntry))
 713         {
 714             /* Exception occurred */
 715             return FALSE;
 716         }
 717
 718         if (!Valid)
 719         {
 720             /* Invalid selector */
 721             Fast486ExceptionWithErrorCode(State, FAST486_EXCEPTION_TS, NewTss.Ldtr);
 722             return FALSE;
 723         }
 724
 725         if (GdtEntry.Signature != FAST486_LDT_SIGNATURE)
 726         {
 727             /* This is not an LDT descriptor */
 728             Fast486ExceptionWithErrorCode(State, FAST486_EXCEPTION_TS, NewTss.Ldtr);
 729             return FALSE;
 730         }
 731
 732         if (!GdtEntry.Present)
 733         {
 734             Fast486ExceptionWithErrorCode(State, FAST486_EXCEPTION_TS, NewTss.Ldtr);
 735             return FALSE;
 736         }
 737
 738         /* Update the LDTR */
 739         State->Ldtr.Selector = NewTss.Ldtr;
 740         State->Ldtr.Base = GdtEntry.Base | (GdtEntry.BaseMid << 16) | (GdtEntry.BaseHigh << 24);
 741         State->Ldtr.Limit = GdtEntry.Limit | (GdtEntry.LimitHigh << 16);
 742         if (GdtEntry.Granularity) State->Ldtr.Limit <<= 12;
 743     }
 744     else
 745     {
 746         /* The LDT of this task is empty */
 747         RtlZeroMemory(&State->Ldtr, sizeof(State->Ldtr));
 748     }
 749
 750     /* Load the new segments */
 751     if (!Fast486LoadSegmentInternal(State,
 752                                     FAST486_REG_CS,
 753                                     NewTss.Cs,
 754                                     FAST486_EXCEPTION_TS))
 755     {
 756         return FALSE;
 757     }
 758
 759     if (!Fast486LoadSegmentInternal(State,
 760                                     FAST486_REG_SS,
 761                                     NewTss.Ss,
 762                                     FAST486_EXCEPTION_TS))
 763     {
 764         return FALSE;
 765     }
 766
 767     if (!Fast486LoadSegmentInternal(State,
 768                                     FAST486_REG_ES,
 769                                     NewTss.Es,
 770                                     FAST486_EXCEPTION_TS))
 771     {
 772         return FALSE;
 773     }
 774
 775     if (!Fast486LoadSegmentInternal(State,
 776                                     FAST486_REG_DS,
 777                                     NewTss.Ds,
 778                                     FAST486_EXCEPTION_TS))
 779     {
 780         return FALSE;
 781     }
 782
 783     if (!Fast486LoadSegmentInternal(State,
 784                                     FAST486_REG_FS,
 785                                     NewTss.Fs,
 786                                     FAST486_EXCEPTION_TS))
 787     {
 788         return FALSE;
 789     }
 790
 791     if (!Fast486LoadSegmentInternal(State,
 792                                     FAST486_REG_GS,
 793                                     NewTss.Gs,
 794                                     FAST486_EXCEPTION_TS))
 795     {
 796         return FALSE;
 797     }
 798
 799     return TRUE;
 800 }
 801
 802 /* EOF */