reactos/lib/mesa32/src/x86/common_x86_asm.S

   1 /* $Id$ */
   2
   3 /*
   4  * Mesa 3-D graphics library
   5  * Version:  5.1
   6  *
   7  * Copyright (C) 1999-2003  Brian Paul   All Rights Reserved.
   8  *
   9  * Permission is hereby granted, free of charge, to any person obtaining a
  10  * copy of this software and associated documentation files (the "Software"),
  11  * to deal in the Software without restriction, including without limitation
  12  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  13  * and/or sell copies of the Software, and to permit persons to whom the
  14  * Software is furnished to do so, subject to the following conditions:
  15  *
  16  * The above copyright notice and this permission notice shall be included
  17  * in all copies or substantial portions of the Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  20  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  22  * BRIAN PAUL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
  23  * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  24  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  */
  26
  27 /*
  28  * Check extended CPU capabilities.  Now justs returns the raw CPUID
  29  * feature information, allowing the higher level code to interpret the
  30  * results.
  31  *
  32  * Written by Holger Waechtler <holger@akaflieg.extern.tu-berlin.de>
  33  *
  34  * Cleaned up and simplified by Gareth Hughes <gareth@valinux.com>
  35  *
  36  */
  37
  38 /*
  39  * NOTE: Avoid using spaces in between '(' ')' and arguments, especially
  40  * with macros like CONST, LLBL that expand to CONCAT(...).  Putting spaces
  41  * in there will break the build on some platforms.
  42  */
  43
  44 #include "matypes.h"
  45 #include "common_x86_features.h"
  46
  47         SEG_TEXT
  48
  49 ALIGNTEXT4
  50 GLOBL GLNAME(_mesa_x86_has_cpuid)
  51 GLNAME(_mesa_x86_has_cpuid):
  52
  53         /* Test for the CPUID command.  If the ID Flag bit in EFLAGS
  54          * (bit 21) is writable, the CPUID command is present */
  55         PUSHF_L
  56         POP_L   (EAX)
  57         MOV_L   (EAX, ECX)
  58         XOR_L   (CONST(0x00200000), EAX)
  59         PUSH_L  (EAX)
  60         POPF_L
  61         PUSHF_L
  62         POP_L   (EAX)
  63
  64         /* Verify the ID Flag bit has been written. */
  65         CMP_L   (ECX, EAX)
  66         SETNE   (AL)
  67         XOR_L   (CONST(0xff), EAX)
  68
  69         RET
  70
  71
  72 ALIGNTEXT4
  73 GLOBL GLNAME(_mesa_x86_cpuid)
  74 GLNAME(_mesa_x86_cpuid):
  75
  76         MOV_L   (REGOFF(4, ESP), EAX)           /* cpuid op */
  77         PUSH_L  (EDI)
  78         PUSH_L  (EBX)
  79
  80         CPUID
  81
  82         MOV_L   (REGOFF(16, ESP), EDI)  /* *eax */
  83         MOV_L   (EAX, REGIND(EDI))
  84         MOV_L   (REGOFF(20, ESP), EDI)  /* *ebx */
  85         MOV_L   (EBX, REGIND(EDI))
  86         MOV_L   (REGOFF(24, ESP), EDI)  /* *ecx */
  87         MOV_L   (ECX, REGIND(EDI))
  88         MOV_L   (REGOFF(28, ESP), EDI)  /* *edx */
  89         MOV_L   (EDX, REGIND(EDI))
  90
  91         POP_L   (EBX)
  92         POP_L   (EDI)
  93         RET
  94
  95 ALIGNTEXT4
  96 GLOBL GLNAME(_mesa_x86_cpuid_eax)
  97 GLNAME(_mesa_x86_cpuid_eax):
  98
  99         MOV_L   (REGOFF(4, ESP), EAX)           /* cpuid op */
 100         PUSH_L  (EBX)
 101
 102         CPUID
 103
 104         POP_L   (EBX)
 105         RET
 106
 107 ALIGNTEXT4
 108 GLOBL GLNAME(_mesa_x86_cpuid_ebx)
 109 GLNAME(_mesa_x86_cpuid_ebx):
 110
 111         MOV_L   (REGOFF(4, ESP), EAX)           /* cpuid op */
 112         PUSH_L  (EBX)
 113
 114         CPUID
 115         MOV_L   (EBX, EAX)                      /* return EBX */
 116
 117         POP_L   (EBX)
 118         RET
 119
 120 ALIGNTEXT4
 121 GLOBL GLNAME(_mesa_x86_cpuid_ecx)
 122 GLNAME(_mesa_x86_cpuid_ecx):
 123
 124         MOV_L   (REGOFF(4, ESP), EAX)           /* cpuid op */
 125         PUSH_L  (EBX)
 126
 127         CPUID
 128         MOV_L   (ECX, EAX)                      /* return ECX */
 129
 130         POP_L   (EBX)
 131         RET
 132
 133 ALIGNTEXT4
 134 GLOBL GLNAME(_mesa_x86_cpuid_edx)
 135 GLNAME(_mesa_x86_cpuid_edx):
 136
 137         MOV_L   (REGOFF(4, ESP), EAX)           /* cpuid op */
 138         PUSH_L  (EBX)
 139
 140         CPUID
 141         MOV_L   (EDX, EAX)                      /* return EDX */
 142
 143         POP_L   (EBX)
 144         RET
 145
 146 #ifdef USE_SSE_ASM
 147 /* Execute an SSE instruction to see if the operating system correctly
 148  * supports SSE.  A signal handler for SIGILL should have been set
 149  * before calling this function, otherwise this could kill the client
 150  * application.
 151  */
 152 ALIGNTEXT4
 153 GLOBL GLNAME( _mesa_test_os_sse_support )
 154 GLNAME( _mesa_test_os_sse_support ):
 155
 156         XORPS   ( XMM0, XMM0 )
 157
 158         RET
 159
 160
 161 /* Perform an SSE divide-by-zero to see if the operating system
 162  * correctly supports unmasked SIMD FPU exceptions.  Signal handlers for
 163  * SIGILL and SIGFPE should have been set before calling this function,
 164  * otherwise this could kill the client application.
 165  */
 166 ALIGNTEXT4
 167 GLOBL GLNAME( _mesa_test_os_sse_exception_support )
 168 GLNAME( _mesa_test_os_sse_exception_support ):
 169
 170         PUSH_L  ( EBP )
 171         MOV_L   ( ESP, EBP )
 172         SUB_L   ( CONST( 8 ), ESP )
 173
 174         /* Save the original MXCSR register value.
 175          */
 176         STMXCSR ( REGOFF( -4, EBP ) )
 177
 178         /* Unmask the divide-by-zero exception and perform one.
 179          */
 180         STMXCSR ( REGOFF( -8, EBP ) )
 181         AND_L   ( CONST( 0xfffffdff ), REGOFF( -8, EBP ) )
 182         LDMXCSR ( REGOFF( -8, EBP ) )
 183
 184         XORPS   ( XMM0, XMM0 )
 185
 186         PUSH_L  ( CONST( 0x3f800000 ) )
 187         PUSH_L  ( CONST( 0x3f800000 ) )
 188         PUSH_L  ( CONST( 0x3f800000 ) )
 189         PUSH_L  ( CONST( 0x3f800000 ) )
 190
 191         MOVUPS  ( REGIND( ESP ), XMM1 )
 192
 193         DIVPS   ( XMM0, XMM1 )
 194
 195         /* Restore the original MXCSR register value.
 196          */
 197         LDMXCSR ( REGOFF( -4, EBP ) )
 198
 199         LEAVE
 200         RET
 201
 202 #endif
 203