9b5340ce6e92b38527d67a5e2df1ce2454303a4d
[reactos.git] / reactos / ntoskrnl / include / internal / amd64 / ke.h
1 #ifndef __NTOSKRNL_INCLUDE_INTERNAL_AMD64_KE_H
2 #define __NTOSKRNL_INCLUDE_INTERNAL_AMD64_KE_H
3
4 #define X86_EFLAGS_TF 0x00000100 /* Trap flag */
5 #define X86_EFLAGS_IF 0x00000200 /* Interrupt Enable flag */
6 #define X86_EFLAGS_IOPL 0x00003000 /* I/O Privilege Level bits */
7 #define X86_EFLAGS_NT 0x00004000 /* Nested Task flag */
8 #define X86_EFLAGS_RF 0x00010000 /* Resume flag */
9 #define X86_EFLAGS_VM 0x00020000 /* Virtual Mode */
10 #define X86_EFLAGS_ID 0x00200000 /* CPUID detection flag */
11
12 #define X86_CR0_PE 0x00000001 /* enable Protected Mode */
13 #define X86_CR0_NE 0x00000020 /* enable native FPU error reporting */
14 #define X86_CR0_TS 0x00000008 /* enable exception on FPU instruction for task switch */
15 #define X86_CR0_EM 0x00000004 /* enable FPU emulation (disable FPU) */
16 #define X86_CR0_MP 0x00000002 /* enable FPU monitoring */
17 #define X86_CR0_WP 0x00010000 /* enable Write Protect (copy on write) */
18 #define X86_CR0_PG 0x80000000 /* enable Paging */
19
20 #define X86_CR4_PAE 0x00000020 /* enable physical address extensions */
21 #define X86_CR4_PGE 0x00000080 /* enable global pages */
22 #define X86_CR4_OSFXSR 0x00000200 /* enable FXSAVE/FXRSTOR instructions */
23 #define X86_CR4_OSXMMEXCPT 0x00000400 /* enable #XF exception */
24
25 #define X86_FEATURE_VME 0x00000002 /* Virtual 8086 Extensions are present */
26 #define X86_FEATURE_TSC 0x00000010 /* time stamp counters are present */
27 #define X86_FEATURE_PAE 0x00000040 /* physical address extension is present */
28 #define X86_FEATURE_CX8 0x00000100 /* CMPXCHG8B instruction present */
29 #define X86_FEATURE_SYSCALL 0x00000800 /* SYSCALL/SYSRET support present */
30 #define X86_FEATURE_PGE 0x00002000 /* Page Global Enable */
31 #define X86_FEATURE_MMX 0x00800000 /* MMX extension present */
32 #define X86_FEATURE_FXSR 0x01000000 /* FXSAVE/FXRSTOR instructions present */
33 #define X86_FEATURE_SSE 0x02000000 /* SSE extension present */
34 #define X86_FEATURE_SSE2 0x04000000 /* SSE2 extension present */
35 #define X86_FEATURE_HT 0x10000000 /* Hyper-Threading present */
36
37 #define X86_EXT_FEATURE_SSE3 0x00000001 /* SSE3 extension present */
38 #define X86_EXT_FEATURE_3DNOW 0x40000000 /* 3DNOW! extension present */
39
40 #define FRAME_EDITED 0xFFF8
41
42 #define X86_MSR_GSBASE 0xC0000101
43 #define X86_MSR_KERNEL_GSBASE 0xC0000102
44 #define X86_MSR_EFER 0xC0000080
45 #define X86_MSR_STAR 0xC0000081
46 #define X86_MSR_LSTAR 0xC0000082
47 #define X86_MSR_CSTAR 0xC0000083
48 #define X86_MSR_SFMASK 0xC0000084
49
50 #define EFER_SCE 0x01
51 #define EFER_LME 0x10
52 #define EFER_LMA 0x40
53 #define EFER_NXE 0x80
54 #define EFER_SVME 0x100
55 #define EFER_FFXSR 0x400
56
57 #define AMD64_TSS 9
58
59 #ifndef __ASM__
60
61 #include "intrin_i.h"
62
63 typedef struct _KIDT_INIT
64 {
65 UCHAR InterruptId;
66 UCHAR Dpl;
67 UCHAR IstIndex;
68 PVOID ServiceRoutine;
69 } KIDT_INIT, *PKIDT_INIT;
70
71 extern ULONG Ke386CacheAlignment;
72 extern ULONG KeI386NpxPresent;
73 extern ULONG KeI386XMMIPresent;
74 extern ULONG KeI386FxsrPresent;
75 extern ULONG KeI386CpuType;
76 extern ULONG KeI386CpuStep;
77
78 #define IMAGE_FILE_MACHINE_ARCHITECTURE IMAGE_FILE_MACHINE_AMD64
79
80 //
81 // INT3 is 1 byte long
82 //
83 #define KD_BREAKPOINT_TYPE UCHAR
84 #define KD_BREAKPOINT_SIZE sizeof(UCHAR)
85 #define KD_BREAKPOINT_VALUE 0xCC
86
87 //
88 // Macros for getting and setting special purpose registers in portable code
89 //
90 #define KeGetContextPc(Context) \
91 ((Context)->Rip)
92
93 #define KeSetContextPc(Context, ProgramCounter) \
94 ((Context)->Rip = (ProgramCounter))
95
96 #define KeGetTrapFramePc(TrapFrame) \
97 ((TrapFrame)->Rip)
98
99 #define KeGetContextReturnRegister(Context) \
100 ((Context)->Rax)
101
102 #define KeSetContextReturnRegister(Context, ReturnValue) \
103 ((Context)->Rax = (ReturnValue))
104
105 //
106 // Macro to get trap and exception frame from a thread stack
107 //
108 #define KeGetTrapFrame(Thread) \
109 (PKTRAP_FRAME)((ULONG_PTR)((Thread)->InitialStack) - \
110 sizeof(KTRAP_FRAME))
111
112 //
113 // Macro to get context switches from the PRCB
114 // All architectures but x86 have it in the PRCB's KeContextSwitches
115 //
116 #define KeGetContextSwitches(Prcb) \
117 (Prcb->KeContextSwitches)
118
119 //
120 // Macro to get the second level cache size field name which differs between
121 // CISC and RISC architectures, as the former has unified I/D cache
122 //
123 #define KiGetSecondLevelDCacheSize() ((PKIPCR)KeGetPcr())->SecondLevelCacheSize
124
125 #define KeGetExceptionFrame(Thread) \
126 (PKEXCEPTION_FRAME)((ULONG_PTR)KeGetTrapFrame(Thread) - \
127 sizeof(KEXCEPTION_FRAME))
128
129 //
130 // Returns the Interrupt State from a Trap Frame.
131 // ON = TRUE, OFF = FALSE
132 //
133 #define KeGetTrapFrameInterruptState(TrapFrame) \
134 BooleanFlagOn((TrapFrame)->EFlags, EFLAGS_INTERRUPT_MASK)
135
136 //
137 // Invalidates the TLB entry for a specified address
138 //
139 FORCEINLINE
140 VOID
141 KeInvalidateTlbEntry(IN PVOID Address)
142 {
143 /* Invalidate the TLB entry for this address */
144 __invlpg(Address);
145 }
146
147 FORCEINLINE
148 VOID
149 KeFlushProcessTb(VOID)
150 {
151 /* Flush the TLB by resetting CR3 */
152 __writecr3(__readcr3());
153 }
154
155 FORCEINLINE
156 VOID
157 KiRundownThread(IN PKTHREAD Thread)
158 {
159 #ifndef CONFIG_SMP
160 DbgPrint("KiRundownThread is unimplemented\n");
161 #else
162 /* Nothing to do */
163 #endif
164 }
165
166 /* Registers an interrupt handler with an IDT vector */
167 FORCEINLINE
168 VOID
169 KeRegisterInterruptHandler(IN ULONG Vector,
170 IN PVOID Handler)
171 {
172 UCHAR Entry;
173 PKIDTENTRY64 Idt;
174
175 /* Get the entry from the HAL */
176 Entry = HalVectorToIDTEntry(Vector);
177
178 /* Now set the data */
179 Idt = &KeGetPcr()->IdtBase[Entry];
180 Idt->OffsetLow = (ULONG_PTR)Handler & 0xffff;
181 Idt->OffsetMiddle = ((ULONG_PTR)Handler >> 16) & 0xffff;
182 Idt->OffsetHigh = (ULONG_PTR)Handler >> 32;
183 Idt->Selector = KGDT64_R0_CODE;
184 Idt->IstIndex = 0;
185 Idt->Type = 0x0e;
186 Idt->Dpl = 0;
187 Idt->Present = 1;
188 Idt->Reserved0 = 0;
189 Idt->Reserved1 = 0;
190 }
191
192 /* Returns the registered interrupt handler for a given IDT vector */
193 FORCEINLINE
194 PVOID
195 KeQueryInterruptHandler(IN ULONG Vector)
196 {
197 UCHAR Entry;
198 PKIDTENTRY64 Idt;
199
200 /* Get the entry from the HAL */
201 Entry = HalVectorToIDTEntry(Vector);
202
203 /* Get the IDT entry */
204 Idt = &KeGetPcr()->IdtBase[Entry];
205
206 /* Return the address */
207 return (PVOID)((ULONG64)Idt->OffsetHigh << 32 |
208 (ULONG64)Idt->OffsetMiddle << 16 |
209 (ULONG64)Idt->OffsetLow);
210 }
211
212 VOID
213 FORCEINLINE
214 KiEndInterrupt(IN KIRQL Irql,
215 IN PKTRAP_FRAME TrapFrame)
216 {
217 DbgPrint("KiEndInterrupt is unimplemented\n");
218 }
219
220 #define Ki386PerfEnd(x)
221
222 struct _KPCR;
223
224 VOID
225 FASTCALL
226 KiInitializeTss(IN PKTSS Tss, IN UINT64 Stack);
227
228 VOID KiDivideErrorFault();
229 VOID KiDebugTrapOrFault();
230 VOID KiNmiInterrupt();
231 VOID KiBreakpointTrap();
232 VOID KiOverflowTrap();
233 VOID KiBoundFault();
234 VOID KiInvalidOpcodeFault();
235 VOID KiNpxNotAvailableFault();
236 VOID KiDoubleFaultAbort();
237 VOID KiNpxSegmentOverrunAbort();
238 VOID KiInvalidTssFault();
239 VOID KiSegmentNotPresentFault();
240 VOID KiStackFault();
241 VOID KiGeneralProtectionFault();
242 VOID KiPageFault();
243 VOID KiFloatingErrorFault();
244 VOID KiAlignmentFault();
245 VOID KiMcheckAbort();
246 VOID KiXmmException();
247 VOID KiApcInterrupt();
248 VOID KiRaiseAssertion();
249 VOID KiDebugServiceTrap();
250 VOID KiDpcInterrupt();
251 VOID KiIpiInterrupt();
252
253 VOID
254 KiGdtPrepareForApplicationProcessorInit(ULONG Id);
255 VOID
256 Ki386InitializeLdt(VOID);
257 VOID
258 Ki386SetProcessorFeatures(VOID);
259
260 VOID
261 NTAPI
262 KiGetCacheInformation(VOID);
263
264 BOOLEAN
265 NTAPI
266 KiIsNpxPresent(
267 VOID
268 );
269
270 BOOLEAN
271 NTAPI
272 KiIsNpxErrataPresent(
273 VOID
274 );
275
276 VOID
277 NTAPI
278 KiSetProcessorType(VOID);
279
280 ULONG
281 NTAPI
282 KiGetFeatureBits(VOID);
283
284 VOID
285 NTAPI
286 KiInitializeCpuFeatures();
287
288 ULONG KeAllocateGdtSelector(ULONG Desc[2]);
289 VOID KeFreeGdtSelector(ULONG Entry);
290 VOID
291 NtEarlyInitVdm(VOID);
292 VOID
293 KeApplicationProcessorInitDispatcher(VOID);
294 VOID
295 KeCreateApplicationProcessorIdleThread(ULONG Id);
296
297 VOID
298 NTAPI
299 Ke386InitThreadWithContext(PKTHREAD Thread,
300 PKSYSTEM_ROUTINE SystemRoutine,
301 PKSTART_ROUTINE StartRoutine,
302 PVOID StartContext,
303 PCONTEXT Context);
304 #define KeArchInitThreadWithContext(Thread,SystemRoutine,StartRoutine,StartContext,Context) \
305 Ke386InitThreadWithContext(Thread,SystemRoutine,StartRoutine,StartContext,Context)
306
307 #ifdef _NTOSKRNL_ /* FIXME: Move flags above to NDK instead of here */
308 VOID
309 NTAPI
310 KiThreadStartup(PKSYSTEM_ROUTINE SystemRoutine,
311 PKSTART_ROUTINE StartRoutine,
312 PVOID StartContext,
313 BOOLEAN UserThread,
314 KTRAP_FRAME TrapFrame);
315 #endif
316
317 #endif
318 #endif /* __NTOSKRNL_INCLUDE_INTERNAL_AMD64_KE_H */
319
320 /* EOF */