[NTOSKRNL]
[reactos.git] / reactos / ntoskrnl / include / internal / amd64 / ke.h
1 #ifndef __NTOSKRNL_INCLUDE_INTERNAL_AMD64_KE_H
2 #define __NTOSKRNL_INCLUDE_INTERNAL_AMD64_KE_H
3
4 #define X86_EFLAGS_TF 0x00000100 /* Trap flag */
5 #define X86_EFLAGS_IF 0x00000200 /* Interrupt Enable flag */
6 #define X86_EFLAGS_IOPL 0x00003000 /* I/O Privilege Level bits */
7 #define X86_EFLAGS_NT 0x00004000 /* Nested Task flag */
8 #define X86_EFLAGS_RF 0x00010000 /* Resume flag */
9 #define X86_EFLAGS_VM 0x00020000 /* Virtual Mode */
10 #define X86_EFLAGS_ID 0x00200000 /* CPUID detection flag */
11
12 #define X86_CR0_PE 0x00000001 /* enable Protected Mode */
13 #define X86_CR0_NE 0x00000020 /* enable native FPU error reporting */
14 #define X86_CR0_TS 0x00000008 /* enable exception on FPU instruction for task switch */
15 #define X86_CR0_EM 0x00000004 /* enable FPU emulation (disable FPU) */
16 #define X86_CR0_MP 0x00000002 /* enable FPU monitoring */
17 #define X86_CR0_WP 0x00010000 /* enable Write Protect (copy on write) */
18 #define X86_CR0_PG 0x80000000 /* enable Paging */
19
20 #define X86_CR4_PAE 0x00000020 /* enable physical address extensions */
21 #define X86_CR4_PGE 0x00000080 /* enable global pages */
22 #define X86_CR4_OSFXSR 0x00000200 /* enable FXSAVE/FXRSTOR instructions */
23 #define X86_CR4_OSXMMEXCPT 0x00000400 /* enable #XF exception */
24
25 #define X86_FEATURE_VME 0x00000002 /* Virtual 8086 Extensions are present */
26 #define X86_FEATURE_TSC 0x00000010 /* time stamp counters are present */
27 #define X86_FEATURE_PAE 0x00000040 /* physical address extension is present */
28 #define X86_FEATURE_CX8 0x00000100 /* CMPXCHG8B instruction present */
29 #define X86_FEATURE_SYSCALL 0x00000800 /* SYSCALL/SYSRET support present */
30 #define X86_FEATURE_PGE 0x00002000 /* Page Global Enable */
31 #define X86_FEATURE_MMX 0x00800000 /* MMX extension present */
32 #define X86_FEATURE_FXSR 0x01000000 /* FXSAVE/FXRSTOR instructions present */
33 #define X86_FEATURE_SSE 0x02000000 /* SSE extension present */
34 #define X86_FEATURE_SSE2 0x04000000 /* SSE2 extension present */
35 #define X86_FEATURE_HT 0x10000000 /* Hyper-Threading present */
36
37 #define X86_EXT_FEATURE_SSE3 0x00000001 /* SSE3 extension present */
38 #define X86_EXT_FEATURE_3DNOW 0x40000000 /* 3DNOW! extension present */
39
40 #define FRAME_EDITED 0xFFF8
41
42 #define X86_MSR_GSBASE 0xC0000101
43 #define X86_MSR_KERNEL_GSBASE 0xC0000102
44 #define X86_MSR_EFER 0xC0000080
45 #define X86_MSR_STAR 0xC0000081
46 #define X86_MSR_LSTAR 0xC0000082
47 #define X86_MSR_CSTAR 0xC0000083
48 #define X86_MSR_SFMASK 0xC0000084
49
50 #define EFER_SCE 0x01
51 #define EFER_LME 0x10
52 #define EFER_LMA 0x40
53 #define EFER_NXE 0x80
54 #define EFER_SVME 0x100
55 #define EFER_FFXSR 0x400
56
57 #define AMD64_TSS 9
58
59 #ifndef __ASM__
60
61 #include "intrin_i.h"
62
63 typedef struct _KIDT_INIT
64 {
65 UCHAR InterruptId;
66 UCHAR Dpl;
67 UCHAR IstIndex;
68 PVOID ServiceRoutine;
69 } KIDT_INIT, *PKIDT_INIT;
70
71 extern ULONG Ke386CacheAlignment;
72 extern ULONG KeI386NpxPresent;
73 extern ULONG KeI386XMMIPresent;
74 extern ULONG KeI386FxsrPresent;
75 extern ULONG KeI386CpuType;
76 extern ULONG KeI386CpuStep;
77
78 #define IMAGE_FILE_MACHINE_ARCHITECTURE IMAGE_FILE_MACHINE_AMD64
79
80 //
81 // INT3 is 1 byte long
82 //
83 #define KD_BREAKPOINT_TYPE UCHAR
84 #define KD_BREAKPOINT_SIZE sizeof(UCHAR)
85 #define KD_BREAKPOINT_VALUE 0xCC
86
87 //
88 // Macros for getting and setting special purpose registers in portable code
89 //
90 #define KeGetContextPc(Context) \
91 ((Context)->Rip)
92
93 #define KeSetContextPc(Context, ProgramCounter) \
94 ((Context)->Rip = (ProgramCounter))
95
96 #define KeGetTrapFramePc(TrapFrame) \
97 ((TrapFrame)->Rip)
98
99 #define KiGetLinkedTrapFrame(x) \
100 (PKTRAP_FRAME)((x)->Rdx)
101
102 #define KeGetContextReturnRegister(Context) \
103 ((Context)->Rax)
104
105 #define KeSetContextReturnRegister(Context, ReturnValue) \
106 ((Context)->Rax = (ReturnValue))
107
108 //
109 // Macro to get trap and exception frame from a thread stack
110 //
111 #define KeGetTrapFrame(Thread) \
112 (PKTRAP_FRAME)((ULONG_PTR)((Thread)->InitialStack) - \
113 sizeof(KTRAP_FRAME))
114
115 //
116 // Macro to get context switches from the PRCB
117 // All architectures but x86 have it in the PRCB's KeContextSwitches
118 //
119 #define KeGetContextSwitches(Prcb) \
120 (Prcb->KeContextSwitches)
121
122 //
123 // Macro to get the second level cache size field name which differs between
124 // CISC and RISC architectures, as the former has unified I/D cache
125 //
126 #define KiGetSecondLevelDCacheSize() ((PKIPCR)KeGetPcr())->SecondLevelCacheSize
127
128 #define KeGetExceptionFrame(Thread) \
129 (PKEXCEPTION_FRAME)((ULONG_PTR)KeGetTrapFrame(Thread) - \
130 sizeof(KEXCEPTION_FRAME))
131
132 //
133 // Returns the Interrupt State from a Trap Frame.
134 // ON = TRUE, OFF = FALSE
135 //
136 #define KeGetTrapFrameInterruptState(TrapFrame) \
137 BooleanFlagOn((TrapFrame)->EFlags, EFLAGS_INTERRUPT_MASK)
138
139 //
140 // Invalidates the TLB entry for a specified address
141 //
142 FORCEINLINE
143 VOID
144 KeInvalidateTlbEntry(IN PVOID Address)
145 {
146 /* Invalidate the TLB entry for this address */
147 __invlpg(Address);
148 }
149
150 FORCEINLINE
151 VOID
152 KeFlushProcessTb(VOID)
153 {
154 /* Flush the TLB by resetting CR3 */
155 __writecr3(__readcr3());
156 }
157
158 FORCEINLINE
159 VOID
160 KiRundownThread(IN PKTHREAD Thread)
161 {
162 #ifndef CONFIG_SMP
163 DbgPrint("KiRundownThread is unimplemented\n");
164 #else
165 /* Nothing to do */
166 #endif
167 }
168
169 /* Registers an interrupt handler with an IDT vector */
170 FORCEINLINE
171 VOID
172 KeRegisterInterruptHandler(IN ULONG Vector,
173 IN PVOID Handler)
174 {
175 UCHAR Entry;
176 PKIDTENTRY64 Idt;
177
178 /* Get the entry from the HAL */
179 Entry = HalVectorToIDTEntry(Vector);
180
181 /* Now set the data */
182 Idt = &KeGetPcr()->IdtBase[Entry];
183 Idt->OffsetLow = (ULONG_PTR)Handler & 0xffff;
184 Idt->OffsetMiddle = ((ULONG_PTR)Handler >> 16) & 0xffff;
185 Idt->OffsetHigh = (ULONG_PTR)Handler >> 32;
186 Idt->Selector = KGDT64_R0_CODE;
187 Idt->IstIndex = 0;
188 Idt->Type = 0x0e;
189 Idt->Dpl = 0;
190 Idt->Present = 1;
191 Idt->Reserved0 = 0;
192 Idt->Reserved1 = 0;
193 }
194
195 /* Returns the registered interrupt handler for a given IDT vector */
196 FORCEINLINE
197 PVOID
198 KeQueryInterruptHandler(IN ULONG Vector)
199 {
200 UCHAR Entry;
201 PKIDTENTRY64 Idt;
202
203 /* Get the entry from the HAL */
204 Entry = HalVectorToIDTEntry(Vector);
205
206 /* Get the IDT entry */
207 Idt = &KeGetPcr()->IdtBase[Entry];
208
209 /* Return the address */
210 return (PVOID)((ULONG64)Idt->OffsetHigh << 32 |
211 (ULONG64)Idt->OffsetMiddle << 16 |
212 (ULONG64)Idt->OffsetLow);
213 }
214
215 VOID
216 FORCEINLINE
217 KiEndInterrupt(IN KIRQL Irql,
218 IN PKTRAP_FRAME TrapFrame)
219 {
220 DbgPrint("KiEndInterrupt is unimplemented\n");
221 }
222
223 #define Ki386PerfEnd(x)
224
225 struct _KPCR;
226
227 VOID
228 FASTCALL
229 KiInitializeTss(IN PKTSS Tss, IN UINT64 Stack);
230
231 VOID KiDivideErrorFault();
232 VOID KiDebugTrapOrFault();
233 VOID KiNmiInterrupt();
234 VOID KiBreakpointTrap();
235 VOID KiOverflowTrap();
236 VOID KiBoundFault();
237 VOID KiInvalidOpcodeFault();
238 VOID KiNpxNotAvailableFault();
239 VOID KiDoubleFaultAbort();
240 VOID KiNpxSegmentOverrunAbort();
241 VOID KiInvalidTssFault();
242 VOID KiSegmentNotPresentFault();
243 VOID KiStackFault();
244 VOID KiGeneralProtectionFault();
245 VOID KiPageFault();
246 VOID KiFloatingErrorFault();
247 VOID KiAlignmentFault();
248 VOID KiMcheckAbort();
249 VOID KiXmmException();
250 VOID KiApcInterrupt();
251 VOID KiRaiseAssertion();
252 VOID KiDebugServiceTrap();
253 VOID KiDpcInterrupt();
254 VOID KiIpiInterrupt();
255
256 VOID
257 KiGdtPrepareForApplicationProcessorInit(ULONG Id);
258 VOID
259 Ki386InitializeLdt(VOID);
260 VOID
261 Ki386SetProcessorFeatures(VOID);
262
263 VOID
264 NTAPI
265 KiGetCacheInformation(VOID);
266
267 BOOLEAN
268 NTAPI
269 KiIsNpxPresent(
270 VOID
271 );
272
273 BOOLEAN
274 NTAPI
275 KiIsNpxErrataPresent(
276 VOID
277 );
278
279 VOID
280 NTAPI
281 KiSetProcessorType(VOID);
282
283 ULONG
284 NTAPI
285 KiGetFeatureBits(VOID);
286
287 VOID
288 NTAPI
289 KiInitializeCpuFeatures();
290
291 ULONG KeAllocateGdtSelector(ULONG Desc[2]);
292 VOID KeFreeGdtSelector(ULONG Entry);
293 VOID
294 NtEarlyInitVdm(VOID);
295 VOID
296 KeApplicationProcessorInitDispatcher(VOID);
297 VOID
298 KeCreateApplicationProcessorIdleThread(ULONG Id);
299
300 VOID
301 NTAPI
302 Ke386InitThreadWithContext(PKTHREAD Thread,
303 PKSYSTEM_ROUTINE SystemRoutine,
304 PKSTART_ROUTINE StartRoutine,
305 PVOID StartContext,
306 PCONTEXT Context);
307 #define KeArchInitThreadWithContext(Thread,SystemRoutine,StartRoutine,StartContext,Context) \
308 Ke386InitThreadWithContext(Thread,SystemRoutine,StartRoutine,StartContext,Context)
309
310 #ifdef _NTOSKRNL_ /* FIXME: Move flags above to NDK instead of here */
311 VOID
312 NTAPI
313 KiThreadStartup(PKSYSTEM_ROUTINE SystemRoutine,
314 PKSTART_ROUTINE StartRoutine,
315 PVOID StartContext,
316 BOOLEAN UserThread,
317 KTRAP_FRAME TrapFrame);
318 #endif
319
320 #endif /* __ASM__ */
321
322 // HACK
323 extern NTKERNELAPI volatile KSYSTEM_TIME KeTickCount;
324
325 #endif /* __NTOSKRNL_INCLUDE_INTERNAL_AMD64_KE_H */
326
327 /* EOF */