2 * Lowlevel memory managment definitions
5 #ifndef __NTOSKRNL_INCLUDE_INTERNAL_AMD64_MM_H
6 #define __NTOSKRNL_INCLUDE_INTERNAL_AMD64_MM_H
12 MmGetPageDirectory(VOID
)
14 return (PULONG64
)__readcr3();
17 #define PAGE_MASK(x) ((x)&(~0xfff))
18 #define PAE_PAGE_MASK(x) ((x)&(~0xfffLL))
20 /* Base addresses of PTE and PDE */
21 #define PAGETABLE_MAP (0xc0000000)
22 #define PAGEDIRECTORY_MAP (0xc0000000 + (PAGETABLE_MAP / (1024)))
24 /* Converting address to a corresponding PDE or PTE entry */
25 #define MiAddressToPde(x) \
26 ((PMMPTE)(((((ULONG64)(x)) >> 22) << 2) + PAGEDIRECTORY_MAP))
27 #define MiAddressToPte(x) \
28 ((PMMPTE)(((((ULONG64)(x)) >> 12) << 2) + PAGETABLE_MAP))
30 //#define ADDR_TO_PAGE_TABLE(v) (((ULONG)(v)) / (1024 * PAGE_SIZE))
31 //#define ADDR_TO_PDE_OFFSET(v) ((((ULONG)(v)) / (1024 * PAGE_SIZE)))
32 //#define ADDR_TO_PTE_OFFSET(v) ((((ULONG)(v)) % (1024 * PAGE_SIZE)) / PAGE_SIZE)
34 #define VAtoPXI(va) ((((ULONG64)va) >> PXI_SHIFT) & 0x1FF)
35 #define VAtoPPI(va) ((((ULONG64)va) >> PPI_SHIFT) & 0x1FF)
36 #define VAtoPDI(va) ((((ULONG64)va) >> PDI_SHIFT) & 0x1FF)
37 #define VAtoPTI(va) ((((ULONG64)va) >> PTI_SHIFT) & 0x1FF)
40 /* Easy accessing PFN in PTE */
41 #define PFN_FROM_PTE(v) ((v)->u.Hard.PageFrameNumber)
43 #endif /* __NTOSKRNL_INCLUDE_INTERNAL_AMD64_MM_H */