8acf17a59fe9330ee3cb5b233bbd388b4a6eb84e
[reactos.git] / reactos / ntoskrnl / include / internal / arm / mm.h
1 #ifndef __NTOSKRNL_INCLUDE_INTERNAL_ARM_MM_H
2 #define __NTOSKRNL_INCLUDE_INTERNAL_ARM_MM_H
3
4 //
5 // Number of bits corresponding to the area that a PDE entry represents (1MB)
6 //
7 #define PDE_SHIFT 20
8 #define PDE_SIZE (1 << PDE_SHIFT)
9
10 //
11 // Number of bits corresponding to the area that a coarse page table entry represents (4KB)
12 //
13 #define PTE_SHIFT 12
14 #define PTE_SIZE (1 << PTE_SHIFT)
15
16 //
17 // Number of bits corresponding to the area that a coarse page table occupies (1KB)
18 //
19 #define CPT_SHIFT 10
20 #define CPT_SIZE (1 << CPT_SHIFT)
21
22 //
23 // Base Addresses
24 //
25 #define PTE_BASE 0xC0000000
26 #define PTE_TOP 0xC03FFFFF
27 #define PDE_BASE 0xC0400000
28 #define HYPER_SPACE 0xC0404000
29
30 typedef struct _HARDWARE_PDE_ARMV6
31 {
32 ULONG Valid:1; // Only for small pages
33 ULONG LargePage:1; // Note, if large then Valid = 0
34 ULONG Buffered:1;
35 ULONG Cached:1;
36 ULONG NoExecute:1;
37 ULONG Domain:4;
38 ULONG Ecc:1;
39 ULONG PageFrameNumber:22;
40 } HARDWARE_PDE_ARMV6, *PHARDWARE_PDE_ARMV6;
41
42 typedef struct _HARDWARE_LARGE_PTE_ARMV6
43 {
44 ULONG Valid:1; // Only for small pages
45 ULONG LargePage:1; // Note, if large then Valid = 0
46 ULONG Buffered:1;
47 ULONG Cached:1;
48 ULONG NoExecute:1;
49 ULONG Domain:4;
50 ULONG Ecc:1;
51 ULONG Accessed:1;
52 ULONG Owner:1;
53 ULONG CacheAttributes:3;
54 ULONG ReadOnly:1;
55 ULONG Shared:1;
56 ULONG NonGlobal:1;
57 ULONG SuperLagePage:1;
58 ULONG Reserved:1;
59 ULONG PageFrameNumber:12;
60 } HARDWARE_LARGE_PTE_ARMV6, *PHARDWARE_LARGE_PTE_ARMV6;
61
62 typedef struct _HARDWARE_PTE_ARMV6
63 {
64 ULONG NoExecute:1;
65 ULONG Valid:1;
66 ULONG Buffered:1;
67 ULONG Cached:1;
68 ULONG Owner:1;
69 ULONG Accessed:1;
70 ULONG CacheAttributes:3;
71 ULONG ReadOnly:1;
72 ULONG Shared:1;
73 ULONG NonGlobal:1;
74 ULONG PageFrameNumber:20;
75 } HARDWARE_PTE_ARMV6, *PHARDWARE_PTE_ARMV6;
76
77 C_ASSERT(sizeof(HARDWARE_PDE_ARMV6) == sizeof(ULONG));
78 C_ASSERT(sizeof(HARDWARE_LARGE_PTE_ARMV6) == sizeof(ULONG));
79 C_ASSERT(sizeof(HARDWARE_PTE_ARMV6) == sizeof(ULONG));
80
81 /* For FreeLDR */
82 typedef struct _PAGE_TABLE_ARM
83 {
84 HARDWARE_PTE_ARMV6 Pte[1024];
85 } PAGE_TABLE_ARM, *PPAGE_TABLE_ARM;
86
87 typedef struct _PAGE_DIRECTORY_ARM
88 {
89 union
90 {
91 HARDWARE_PDE_ARMV6 Pde[4096];
92 HARDWARE_LARGE_PTE_ARMV6 Pte[4096];
93 };
94 } PAGE_DIRECTORY_ARM, *PPAGE_DIRECTORY_ARM;
95
96 C_ASSERT(sizeof(PAGE_TABLE_ARM) == PAGE_SIZE);
97 C_ASSERT(sizeof(PAGE_DIRECTORY_ARM) == (4 * PAGE_SIZE));
98
99 typedef enum _ARM_DOMAIN
100 {
101 FaultDomain,
102 ClientDomain,
103 InvalidDomain,
104 ManagerDomain
105 } ARM_DOMAIN;
106
107 //
108 // FIXFIX: This is all wrong now!!!
109 //
110 typedef union _ARM_PTE
111 {
112 union
113 {
114 struct
115 {
116 ULONG Type:2;
117 ULONG Unused:30;
118 } Fault;
119 struct
120 {
121 ULONG Type:2;
122 ULONG Ignored:2;
123 ULONG Reserved:1;
124 ULONG Domain:4;
125 ULONG Ignored1:1;
126 ULONG BaseAddress:22;
127 } Coarse;
128 struct
129 {
130 ULONG Type:2;
131 ULONG Buffered:1;
132 ULONG Cached:1;
133 ULONG Reserved:1;
134 ULONG Domain:4;
135 ULONG Ignored:1;
136 ULONG Access:2;
137 ULONG Ignored1:8;
138 ULONG BaseAddress:12;
139 } Section;
140 struct
141 {
142 ULONG Type:2;
143 ULONG Reserved:3;
144 ULONG Domain:4;
145 ULONG Ignored:3;
146 ULONG BaseAddress:20;
147 } Fine;
148 } L1;
149 union
150 {
151 struct
152 {
153 ULONG Type:2;
154 ULONG Unused:30;
155 } Fault;
156 struct
157 {
158 ULONG Type:2;
159 ULONG Buffered:1;
160 ULONG Cached:1;
161 ULONG Access0:2;
162 ULONG Access1:2;
163 ULONG Access2:2;
164 ULONG Access3:2;
165 ULONG Ignored:4;
166 ULONG BaseAddress:16;
167 } Large;
168 struct
169 {
170 ULONG Type:2;
171 ULONG Buffered:1;
172 ULONG Cached:1;
173 ULONG Access0:2;
174 ULONG Access1:2;
175 ULONG Access2:2;
176 ULONG Access3:2;
177 ULONG BaseAddress:20;
178 } Small;
179 struct
180 {
181 ULONG Type:2;
182 ULONG Buffered:1;
183 ULONG Cached:1;
184 ULONG Access0:2;
185 ULONG Ignored:4;
186 ULONG BaseAddress:22;
187 } Tiny;
188 } L2;
189 ULONG AsUlong;
190 } ARM_PTE, *PARM_PTE;
191
192 typedef struct _ARM_TRANSLATION_TABLE
193 {
194 ARM_PTE Pte[4096];
195 } ARM_TRANSLATION_TABLE, *PARM_TRANSLATION_TABLE;
196
197 typedef struct _ARM_COARSE_PAGE_TABLE
198 {
199 ARM_PTE Pte[256];
200 ULONG Padding[768];
201 } ARM_COARSE_PAGE_TABLE, *PARM_COARSE_PAGE_TABLE;
202
203 typedef enum _ARM_L1_PTE_TYPE
204 {
205 FaultPte,
206 CoarsePte,
207 SectionPte,
208 FinePte
209 } ARM_L1_PTE_TYPE;
210
211 typedef enum _ARM_L2_PTE_TYPE
212 {
213 LargePte = 1,
214 SmallPte,
215 TinyPte
216 } ARM_L2_PTE_TYPE;
217
218 typedef enum _ARM_PTE_ACCESS
219 {
220 FaultAccess,
221 SupervisorAccess,
222 SharedAccess,
223 UserAccess
224 } ARM_PTE_ACCESS;
225
226 #if 0
227
228 //
229 // FIXFIX: This is all wrong now!!!
230 //
231
232 //
233 // Take 0x80812345 and extract:
234 // PTE_BASE[0x808][0x12]
235 //
236 #define MiGetPteAddress(x) \
237 (PMMPTE)(PTE_BASE + \
238 (((ULONG)(x) >> 20) << 12) + \
239 ((((ULONG)(x) >> 12) & 0xFF) << 2))
240
241 #define MiGetPdeAddress(x) \
242 (PMMPDE_HARDWARE)(PDE_BASE + \
243 (((ULONG)(x) >> 20) << 2))
244
245 #define MiGetPdeOffset(x) (((ULONG)(x)) >> 22)
246
247 #define PTE_BASE 0xC0000000
248 #define PTE_TOP 0xC03FFFFF
249 #define PDE_BASE 0xC1000000
250 #define HYPER_SPACE 0xC1100000
251
252 //
253 // FIXME: THESE ARE WRONG ATM.
254 //
255 #define MiAddressToPde(x) \
256 ((PMMPTE)(((((ULONG)(x)) >> 22) << 2) + PDE_BASE))
257 #define MiAddressToPte(x) \
258 ((PMMPTE)(((((ULONG)(x)) >> 12) << 2) + PTE_BASE))
259 #define MiAddressToPteOffset(x) \
260 ((((ULONG)(x)) << 10) >> 22)
261
262
263 //
264 // Convert a PTE into a corresponding address
265 //
266 #define MiPteToAddress(PTE) ((PVOID)((ULONG)(PTE) << 10))
267
268 #define ADDR_TO_PAGE_TABLE(v) (((ULONG)(v)) / (1024 * PAGE_SIZE))
269 #define ADDR_TO_PDE_OFFSET(v) ((((ULONG)(v)) / (1024 * PAGE_SIZE)))
270 #define ADDR_TO_PTE_OFFSET(v) ((((ULONG)(v)) % (1024 * PAGE_SIZE)) / PAGE_SIZE)
271
272 #endif
273
274 struct _EPROCESS;
275 PULONG MmGetPageDirectory(VOID);
276
277 #define MI_MAKE_LOCAL_PAGE(x) ((x)->u.Hard.NonGlobal = 1)
278 #define MI_MAKE_DIRTY_PAGE(x)
279 #define MI_MAKE_OWNER_PAGE(x) ((x)->u.Hard.Access = 1) // FIXFIX
280 #define MI_MAKE_WRITE_PAGE(x) ((x)->u.Hard.ExtendedAccess = 1) // FIXFIX
281 #define MI_PAGE_DISABLE_CACHE(x) ((x)->u.Hard.Cached = 0)
282 #define MI_PAGE_WRITE_THROUGH(x) ((x)->u.Hard.Buffered = 0)
283 #define MI_PAGE_WRITE_COMBINED(x) ((x)->u.Hard.Buffered = 1)
284 #define MI_IS_PAGE_WRITEABLE(x) ((x)->u.Hard.ExtendedAccess == 0)
285 #define MI_IS_PAGE_COPY_ON_WRITE(x)FALSE
286 #define MI_IS_PAGE_DIRTY(x) TRUE
287
288 /* Easy accessing PFN in PTE */
289 #define PFN_FROM_PTE(v) ((v)->u.Hard.PageFrameNumber)
290
291 #endif