[NTOS]: Add a branch-to-self to start testing kernel code.
[reactos.git] / reactos / ntoskrnl / include / internal / arm / mm.h
1 #ifndef __NTOSKRNL_INCLUDE_INTERNAL_ARM_MM_H
2 #define __NTOSKRNL_INCLUDE_INTERNAL_ARM_MM_H
3
4 //
5 // Number of bits corresponding to the area that a PDE entry represents (1MB)
6 //
7 #define PDE_SHIFT 20
8 #define PDE_SIZE (1 << PDE_SHIFT)
9
10 //
11 // Number of bits corresponding to the area that a coarse page table entry represents (4KB)
12 //
13 #define PTE_SHIFT 12
14 #define PTE_SIZE (1 << PTE_SHIFT)
15
16 //
17 // Number of bits corresponding to the area that a coarse page table occupies (1KB)
18 //
19 #define CPT_SHIFT 10
20 #define CPT_SIZE (1 << CPT_SHIFT)
21
22 //
23 // Base Addresses
24 //
25 #define PTE_BASE 0xC0000000
26 #define PTE_TOP 0xC03FFFFF
27 #define PDE_BASE 0xC0400000
28 #define HYPER_SPACE 0xC0404000
29
30 typedef struct _HARDWARE_PDE_ARMV6
31 {
32 ULONG Valid:1; // Only for small pages
33 ULONG LargePage:1; // Note, if large then Valid = 0
34 ULONG Buffered:1;
35 ULONG Cached:1;
36 ULONG NoExecute:1;
37 ULONG Domain:4;
38 ULONG Ecc:1;
39 ULONG PageFrameNumber:22;
40 } HARDWARE_PDE_ARMV6, *PHARDWARE_PDE_ARMV6;
41
42 typedef struct _HARDWARE_LARGE_PTE_ARMV6
43 {
44 ULONG Valid:1; // Only for small pages
45 ULONG LargePage:1; // Note, if large then Valid = 0
46 ULONG Buffered:1;
47 ULONG Cached:1;
48 ULONG NoExecute:1;
49 ULONG Domain:4;
50 ULONG Ecc:1;
51 ULONG Accessed:1;
52 ULONG Owner:1;
53 ULONG CacheAttributes:3;
54 ULONG ReadOnly:1;
55 ULONG Shared:1;
56 ULONG NonGlobal:1;
57 ULONG SuperLagePage:1;
58 ULONG Reserved:1;
59 ULONG PageFrameNumber:12;
60 } HARDWARE_LARGE_PTE_ARMV6, *PHARDWARE_LARGE_PTE_ARMV6;
61
62 typedef struct _HARDWARE_PTE_ARMV6
63 {
64 ULONG NoExecute:1;
65 ULONG Valid:1;
66 ULONG Buffered:1;
67 ULONG Cached:1;
68 ULONG Accessed:1;
69 ULONG Owner:1;
70 ULONG CacheAttributes:3;
71 ULONG ReadOnly:1;
72 ULONG Shared:1;
73 ULONG NonGlobal:1;
74 ULONG PageFrameNumber:20;
75 } HARDWARE_PTE_ARMV6, *PHARDWARE_PTE_ARMV6;
76
77 C_ASSERT(sizeof(HARDWARE_PDE_ARMV6) == sizeof(ULONG));
78 C_ASSERT(sizeof(HARDWARE_LARGE_PTE_ARMV6) == sizeof(ULONG));
79 C_ASSERT(sizeof(HARDWARE_PTE_ARMV6) == sizeof(ULONG));
80
81 /* For FreeLDR */
82 typedef struct _PAGE_TABLE_ARM
83 {
84 HARDWARE_PTE_ARMV6 Pte[1024];
85 } PAGE_TABLE_ARM, *PPAGE_TABLE_ARM;
86
87 typedef struct _PAGE_DIRECTORY_ARM
88 {
89 union
90 {
91 HARDWARE_PDE_ARMV6 Pde[4096];
92 HARDWARE_LARGE_PTE_ARMV6 Pte[4096];
93 };
94 } PAGE_DIRECTORY_ARM, *PPAGE_DIRECTORY_ARM;
95
96 C_ASSERT(sizeof(PAGE_TABLE_ARM) == PAGE_SIZE);
97 C_ASSERT(sizeof(PAGE_DIRECTORY_ARM) == (4 * PAGE_SIZE));
98
99 typedef enum _ARM_DOMAIN
100 {
101 FaultDomain,
102 ClientDomain,
103 InvalidDomain,
104 ManagerDomain
105 } ARM_DOMAIN;
106
107 struct _EPROCESS;
108 PULONG MmGetPageDirectory(VOID);
109
110 #define MI_MAKE_LOCAL_PAGE(x) ((x)->u.Hard.NonGlobal = 1)
111 #define MI_MAKE_DIRTY_PAGE(x)
112 #define MI_MAKE_OWNER_PAGE(x) ((x)->u.Hard.Access = 1) // FIXFIX
113 #define MI_MAKE_WRITE_PAGE(x) ((x)->u.Hard.ExtendedAccess = 1) // FIXFIX
114 #define MI_PAGE_DISABLE_CACHE(x) ((x)->u.Hard.Cached = 0)
115 #define MI_PAGE_WRITE_THROUGH(x) ((x)->u.Hard.Buffered = 0)
116 #define MI_PAGE_WRITE_COMBINED(x) ((x)->u.Hard.Buffered = 1)
117 #define MI_IS_PAGE_WRITEABLE(x) ((x)->u.Hard.ExtendedAccess == 0)
118 #define MI_IS_PAGE_COPY_ON_WRITE(x)FALSE
119 #define MI_IS_PAGE_DIRTY(x) TRUE
120
121 /* Easy accessing PFN in PTE */
122 #define PFN_FROM_PTE(v) ((v)->u.Hard.PageFrameNumber)
123
124
125 #if 1
126
127 //
128 // FIXFIX: This is all wrong now!!!
129 //
130
131 //
132 // Take 0x80812345 and extract:
133 // PTE_BASE[0x808][0x12]
134 //
135 #define MiGetPteAddress(x) \
136 (PMMPTE)(PTE_BASE + \
137 (((ULONG)(x) >> 20) << 12) + \
138 ((((ULONG)(x) >> 12) & 0xFF) << 2))
139
140 #define MiGetPdeAddress(x) \
141 (PMMPDE_HARDWARE)(PDE_BASE + \
142 (((ULONG)(x) >> 20) << 2))
143
144 #define MiGetPdeOffset(x) (((ULONG)(x)) >> 22)
145
146 //
147 // FIXME: THESE ARE WRONG ATM.
148 //
149 #define MiAddressToPde(x) \
150 ((PMMPTE)(((((ULONG)(x)) >> 22) << 2) + PDE_BASE))
151 #define MiAddressToPte(x) \
152 ((PMMPTE)(((((ULONG)(x)) >> 12) << 2) + PTE_BASE))
153 #define MiAddressToPteOffset(x) \
154 ((((ULONG)(x)) << 10) >> 22)
155
156
157 //
158 // Convert a PTE into a corresponding address
159 //
160 #define MiPteToAddress(PTE) ((PVOID)((ULONG)(PTE) << 10))
161
162 #define ADDR_TO_PAGE_TABLE(v) (((ULONG)(v)) / (1024 * PAGE_SIZE))
163 #define ADDR_TO_PDE_OFFSET(v) ((((ULONG)(v)) / (1024 * PAGE_SIZE)))
164 #define ADDR_TO_PTE_OFFSET(v) ((((ULONG)(v)) % (1024 * PAGE_SIZE)) / PAGE_SIZE)
165
166 //
167 // FIXFIX: This is all wrong now!!!
168 //
169 typedef union _ARM_PTE
170 {
171 union
172 {
173 struct
174 {
175 ULONG Type:2;
176 ULONG Unused:30;
177 } Fault;
178 struct
179 {
180 ULONG Type:2;
181 ULONG Ignored:2;
182 ULONG Reserved:1;
183 ULONG Domain:4;
184 ULONG Ignored1:1;
185 ULONG BaseAddress:22;
186 } Coarse;
187 struct
188 {
189 ULONG Type:2;
190 ULONG Buffered:1;
191 ULONG Cached:1;
192 ULONG Reserved:1;
193 ULONG Domain:4;
194 ULONG Ignored:1;
195 ULONG Access:2;
196 ULONG Ignored1:8;
197 ULONG BaseAddress:12;
198 } Section;
199 struct
200 {
201 ULONG Type:2;
202 ULONG Reserved:3;
203 ULONG Domain:4;
204 ULONG Ignored:3;
205 ULONG BaseAddress:20;
206 } Fine;
207 } L1;
208 union
209 {
210 struct
211 {
212 ULONG Type:2;
213 ULONG Unused:30;
214 } Fault;
215 struct
216 {
217 ULONG Type:2;
218 ULONG Buffered:1;
219 ULONG Cached:1;
220 ULONG Access0:2;
221 ULONG Access1:2;
222 ULONG Access2:2;
223 ULONG Access3:2;
224 ULONG Ignored:4;
225 ULONG BaseAddress:16;
226 } Large;
227 struct
228 {
229 ULONG Type:2;
230 ULONG Buffered:1;
231 ULONG Cached:1;
232 ULONG Access0:2;
233 ULONG Access1:2;
234 ULONG Access2:2;
235 ULONG Access3:2;
236 ULONG BaseAddress:20;
237 } Small;
238 struct
239 {
240 ULONG Type:2;
241 ULONG Buffered:1;
242 ULONG Cached:1;
243 ULONG Access0:2;
244 ULONG Ignored:4;
245 ULONG BaseAddress:22;
246 } Tiny;
247 } L2;
248 ULONG AsUlong;
249 } ARM_PTE, *PARM_PTE;
250
251 typedef struct _ARM_TRANSLATION_TABLE
252 {
253 ARM_PTE Pte[4096];
254 } ARM_TRANSLATION_TABLE, *PARM_TRANSLATION_TABLE;
255
256 typedef struct _ARM_COARSE_PAGE_TABLE
257 {
258 ARM_PTE Pte[256];
259 ULONG Padding[768];
260 } ARM_COARSE_PAGE_TABLE, *PARM_COARSE_PAGE_TABLE;
261
262 typedef enum _ARM_L1_PTE_TYPE
263 {
264 FaultPte,
265 CoarsePte,
266 SectionPte,
267 FinePte
268 } ARM_L1_PTE_TYPE;
269
270 typedef enum _ARM_L2_PTE_TYPE
271 {
272 LargePte = 1,
273 SmallPte,
274 TinyPte
275 } ARM_L2_PTE_TYPE;
276
277 typedef enum _ARM_PTE_ACCESS
278 {
279 FaultAccess,
280 SupervisorAccess,
281 SharedAccess,
282 UserAccess
283 } ARM_PTE_ACCESS;
284
285 #endif
286
287 #endif