Sync to trunk (r44789)
[reactos.git] / reactos / ntoskrnl / include / internal / arm / mm.h
1 #ifndef __NTOSKRNL_INCLUDE_INTERNAL_ARM_MM_H
2 #define __NTOSKRNL_INCLUDE_INTERNAL_ARM_MM_H
3
4 //
5 // Number of bits corresponding to the area that a PDE entry represents (1MB)
6 //
7 #define PDE_SHIFT 20
8 #define PDE_SIZE (1 << PDE_SHIFT)
9
10
11 //
12 // FIXFIX: This is all wrong now!!!
13 //
14
15
16 //
17 // Number of bits corresponding to the area that a coarse page table entry represents (4KB)
18 //
19 #define PTE_SHIFT 12
20 //#define PAGE_SIZE (1 << PTE_SHIFT) // FIXME: This conflicts with ndk/arm/mmtypes.h which does #define PAGE_SIZE 0x1000 -- use PTE_SIZE here instead?
21
22 //
23 // Number of bits corresponding to the area that a coarse page table occupies (1KB)
24 //
25 #define CPT_SHIFT 10
26 #define CPT_SIZE (1 << CPT_SHIFT)
27
28
29
30 //
31 // FIXFIX: This is all wrong now!!!
32 //
33 typedef union _ARM_PTE
34 {
35 union
36 {
37 struct
38 {
39 ULONG Type:2;
40 ULONG Unused:30;
41 } Fault;
42 struct
43 {
44 ULONG Type:2;
45 ULONG Ignored:2;
46 ULONG Reserved:1;
47 ULONG Domain:4;
48 ULONG Ignored1:1;
49 ULONG BaseAddress:22;
50 } Coarse;
51 struct
52 {
53 ULONG Type:2;
54 ULONG Buffered:1;
55 ULONG Cached:1;
56 ULONG Reserved:1;
57 ULONG Domain:4;
58 ULONG Ignored:1;
59 ULONG Access:2;
60 ULONG Ignored1:8;
61 ULONG BaseAddress:12;
62 } Section;
63 struct
64 {
65 ULONG Type:2;
66 ULONG Reserved:3;
67 ULONG Domain:4;
68 ULONG Ignored:3;
69 ULONG BaseAddress:20;
70 } Fine;
71 } L1;
72 union
73 {
74 struct
75 {
76 ULONG Type:2;
77 ULONG Unused:30;
78 } Fault;
79 struct
80 {
81 ULONG Type:2;
82 ULONG Buffered:1;
83 ULONG Cached:1;
84 ULONG Access0:2;
85 ULONG Access1:2;
86 ULONG Access2:2;
87 ULONG Access3:2;
88 ULONG Ignored:4;
89 ULONG BaseAddress:16;
90 } Large;
91 struct
92 {
93 ULONG Type:2;
94 ULONG Buffered:1;
95 ULONG Cached:1;
96 ULONG Access0:2;
97 ULONG Access1:2;
98 ULONG Access2:2;
99 ULONG Access3:2;
100 ULONG BaseAddress:20;
101 } Small;
102 struct
103 {
104 ULONG Type:2;
105 ULONG Buffered:1;
106 ULONG Cached:1;
107 ULONG Access0:2;
108 ULONG Ignored:4;
109 ULONG BaseAddress:22;
110 } Tiny;
111 } L2;
112 ULONG AsUlong;
113 } ARM_PTE, *PARM_PTE;
114
115 typedef struct _ARM_TRANSLATION_TABLE
116 {
117 ARM_PTE Pte[4096];
118 } ARM_TRANSLATION_TABLE, *PARM_TRANSLATION_TABLE;
119
120 typedef struct _ARM_COARSE_PAGE_TABLE
121 {
122 ARM_PTE Pte[256];
123 ULONG Padding[768];
124 } ARM_COARSE_PAGE_TABLE, *PARM_COARSE_PAGE_TABLE;
125
126 typedef enum _ARM_L1_PTE_TYPE
127 {
128 FaultPte,
129 CoarsePte,
130 SectionPte,
131 FinePte
132 } ARM_L1_PTE_TYPE;
133
134 typedef enum _ARM_L2_PTE_TYPE
135 {
136 LargePte = 1,
137 SmallPte,
138 TinyPte
139 } ARM_L2_PTE_TYPE;
140
141 typedef enum _ARM_PTE_ACCESS
142 {
143 FaultAccess,
144 SupervisorAccess,
145 SharedAccess,
146 UserAccess
147 } ARM_PTE_ACCESS;
148
149 typedef enum _ARM_DOMAIN
150 {
151 FaultDomain,
152 ClientDomain,
153 InvalidDomain,
154 ManagerDomain
155 } ARM_DOMAIN;
156
157
158 //
159 // FIXFIX: This is all wrong now!!!
160 //
161
162 //
163 // Take 0x80812345 and extract:
164 // PTE_BASE[0x808][0x12]
165 //
166 #define MiGetPteAddress(x) \
167 (PMMPTE)(PTE_BASE + \
168 (((ULONG)(x) >> 20) << 12) + \
169 ((((ULONG)(x) >> 12) & 0xFF) << 2))
170
171 #define MiGetPdeAddress(x) \
172 (PMMPDE_HARDWARE)(PDE_BASE + \
173 (((ULONG)(x) >> 20) << 2))
174
175 #define MiGetPdeOffset(x) (((ULONG)(x)) >> 22)
176
177 #define PTE_BASE 0xC0000000
178 #define PTE_TOP 0xC03FFFFF
179 #define PDE_BASE 0xC1000000
180 #define HYPER_SPACE 0xC1100000
181 #define HYPER_SPACE_END 0xC07FFFFF
182
183 struct _EPROCESS;
184 PULONG MmGetPageDirectory(VOID);
185
186
187 //
188 // FIXME: THESE ARE WRONG ATM.
189 //
190 #define MiAddressToPde(x) \
191 ((PMMPTE)(((((ULONG)(x)) >> 22) << 2) + PDE_BASE))
192 #define MiAddressToPte(x) \
193 ((PMMPTE)(((((ULONG)(x)) >> 12) << 2) + PTE_BASE))
194 #define MiAddressToPteOffset(x) \
195 ((((ULONG)(x)) << 10) >> 22)
196
197 //
198 // Convert a PTE into a corresponding address
199 //
200 #define MiPteToAddress(PTE) ((PVOID)((ULONG)(PTE) << 10))
201
202 #define ADDR_TO_PAGE_TABLE(v) (((ULONG)(v)) / (1024 * PAGE_SIZE))
203 #define ADDR_TO_PDE_OFFSET(v) ((((ULONG)(v)) / (1024 * PAGE_SIZE)))
204 #define ADDR_TO_PTE_OFFSET(v) ((((ULONG)(v)) % (1024 * PAGE_SIZE)) / PAGE_SIZE)
205
206 #define MI_MAKE_LOCAL_PAGE(x) ((x)->u.Hard.NonGlobal = 1)
207 #define MI_MAKE_DIRTY_PAGE(x)
208 #define MI_MAKE_OWNER_PAGE(x) ((x)->u.Hard.Access = 1) // FIXFIX
209 #define MI_MAKE_WRITE_PAGE(x) ((x)->u.Hard.ExtendedAccess = 1) // FIXFIX
210 #define MI_PAGE_DISABLE_CACHE(x) ((x)->u.Hard.Cached = 0)
211 #define MI_PAGE_WRITE_THROUGH(x) ((x)->u.Hard.Buffered = 0)
212 #define MI_PAGE_WRITE_COMBINED(x) ((x)->u.Hard.Buffered = 1)
213 #define MI_IS_PAGE_WRITEABLE(x) ((x)->u.Hard.ExtendedAccess == 0)
214 #define MI_IS_PAGE_COPY_ON_WRITE(x)FALSE
215 #define MI_IS_PAGE_DIRTY(x) TRUE
216
217 /* Easy accessing PFN in PTE */
218 #define PFN_FROM_PTE(v) ((v)->u.Hard.PageFrameNumber)
219
220 #endif