[NTOSKRNL/FREELDR/NDK]
[reactos.git] / reactos / ntoskrnl / include / internal / i386 / mm.h
1 /*
2 * kernel internal memory management definitions for x86
3 */
4 #pragma once
5
6 #ifdef _PAE_
7 #define _MI_PAGING_LEVELS 3
8 #else
9 #define _MI_PAGING_LEVELS 2
10 #endif
11
12 /* Memory layout base addresses */
13 #define MI_USER_PROBE_ADDRESS (PVOID)0x7FFF0000
14 #define MI_DEFAULT_SYSTEM_RANGE_START (PVOID)0x80000000
15 #define HYPER_SPACE 0xC0400000
16 #define HYPER_SPACE_END 0xC07FFFFF
17 #define MI_SYSTEM_CACHE_WS_START (PVOID)0xC0C00000
18 #define MI_PAGED_POOL_START (PVOID)0xE1000000
19 #define MI_NONPAGED_POOL_END (PVOID)0xFFBE0000
20 #define MI_DEBUG_MAPPING (PVOID)0xFFBFF000
21
22 /* FIXME: These are different for PAE */
23 #define PTE_BASE 0xC0000000
24 #define PDE_BASE 0xC0300000
25 #define PDE_TOP 0xC0300FFF
26 #define PTE_TOP 0xC03FFFFF
27
28 #define PTE_PER_PAGE 0x400
29 #define PDE_PER_PAGE 0x400
30 #define PPE_PER_PAGE 1
31
32 /* Misc address definitions */
33 #define MI_SYSTEM_PTE_BASE (PVOID)MiAddressToPte(NULL)
34 #define MM_HIGHEST_VAD_ADDRESS \
35 (PVOID)((ULONG_PTR)MM_HIGHEST_USER_ADDRESS - (16 * PAGE_SIZE))
36 #define MI_MAPPING_RANGE_START (ULONG)HYPER_SPACE
37 #define MI_MAPPING_RANGE_END (MI_MAPPING_RANGE_START + \
38 MI_HYPERSPACE_PTES * PAGE_SIZE)
39 #define MI_DUMMY_PTE (PMMPTE)((ULONG_PTR)MI_MAPPING_RANGE_END + \
40 PAGE_SIZE)
41 #define MI_VAD_BITMAP (PMMPTE)((ULONG_PTR)MI_DUMMY_PTE + \
42 PAGE_SIZE)
43 #define MI_WORKING_SET_LIST (PMMPTE)((ULONG_PTR)MI_VAD_BITMAP + \
44 PAGE_SIZE)
45
46 /* Memory sizes */
47 #define MI_MIN_PAGES_FOR_NONPAGED_POOL_TUNING ((255 * _1MB) >> PAGE_SHIFT)
48 #define MI_MIN_PAGES_FOR_SYSPTE_TUNING ((19 * _1MB) >> PAGE_SHIFT)
49 #define MI_MIN_PAGES_FOR_SYSPTE_BOOST ((32 * _1MB) >> PAGE_SHIFT)
50 #define MI_MIN_PAGES_FOR_SYSPTE_BOOST_BOOST ((256 * _1MB) >> PAGE_SHIFT)
51 #define MI_MIN_INIT_PAGED_POOLSIZE (32 * _1MB)
52 #define MI_MAX_INIT_NONPAGED_POOL_SIZE (128 * _1MB)
53 #define MI_MAX_NONPAGED_POOL_SIZE (128 * _1MB)
54 #define MI_SYSTEM_VIEW_SIZE (32 * _1MB)
55 #define MI_SESSION_VIEW_SIZE (48 * _1MB)
56 #define MI_SESSION_POOL_SIZE (16 * _1MB)
57 #define MI_SESSION_IMAGE_SIZE (8 * _1MB)
58 #define MI_SESSION_WORKING_SET_SIZE (4 * _1MB)
59 #define MI_SESSION_SIZE (MI_SESSION_VIEW_SIZE + \
60 MI_SESSION_POOL_SIZE + \
61 MI_SESSION_IMAGE_SIZE + \
62 MI_SESSION_WORKING_SET_SIZE)
63 #define MI_MIN_ALLOCATION_FRAGMENT (4 * _1KB)
64 #define MI_ALLOCATION_FRAGMENT (64 * _1KB)
65 #define MI_MAX_ALLOCATION_FRAGMENT (2 * _1MB)
66
67 /* Misc constants */
68 #define MM_PTE_SOFTWARE_PROTECTION_BITS 5
69 #define MI_MIN_SECONDARY_COLORS 8
70 #define MI_SECONDARY_COLORS 64
71 #define MI_MAX_SECONDARY_COLORS 1024
72 #define MI_MAX_FREE_PAGE_LISTS 4
73 #define MI_HYPERSPACE_PTES (256 - 1)
74 #define MI_ZERO_PTES (32)
75 #define MI_MAX_ZERO_BITS 21
76 #define SESSION_POOL_LOOKASIDES 26
77
78 /* MMPTE related defines */
79 #define MM_EMPTY_PTE_LIST ((ULONG)0xFFFFF)
80 #define MM_EMPTY_LIST ((ULONG_PTR)-1)
81
82
83 /* Easy accessing PFN in PTE */
84 #define PFN_FROM_PTE(v) ((v)->u.Hard.PageFrameNumber)
85
86 /* Macros for portable PTE modification */
87 #define MI_MAKE_LOCAL_PAGE(x) ((x)->u.Hard.Global = 0)
88 #define MI_MAKE_DIRTY_PAGE(x) ((x)->u.Hard.Dirty = 1)
89 #define MI_MAKE_ACCESSED_PAGE(x) ((x)->u.Hard.Accessed = 1)
90 #define MI_PAGE_DISABLE_CACHE(x) ((x)->u.Hard.CacheDisable = 1)
91 #define MI_PAGE_WRITE_THROUGH(x) ((x)->u.Hard.WriteThrough = 1)
92 #define MI_PAGE_WRITE_COMBINED(x) ((x)->u.Hard.WriteThrough = 0)
93 #define MI_IS_PAGE_LARGE(x) ((x)->u.Hard.LargePage == 1)
94 #if !defined(CONFIG_SMP)
95 #define MI_IS_PAGE_WRITEABLE(x) ((x)->u.Hard.Write == 1)
96 #else
97 #define MI_IS_PAGE_WRITEABLE(x) ((x)->u.Hard.Writable == 1)
98 #endif
99 #define MI_IS_PAGE_COPY_ON_WRITE(x)((x)->u.Hard.CopyOnWrite == 1)
100 #define MI_IS_PAGE_DIRTY(x) ((x)->u.Hard.Dirty == 1)
101 #define MI_MAKE_OWNER_PAGE(x) ((x)->u.Hard.Owner = 1)
102 #if !defined(CONFIG_SMP)
103 #define MI_MAKE_WRITE_PAGE(x) ((x)->u.Hard.Write = 1)
104 #else
105 #define MI_MAKE_WRITE_PAGE(x) ((x)->u.Hard.Writable = 1)
106 #endif
107
108 /* On x86, these two are the same */
109 #define MI_WRITE_VALID_PPE MI_WRITE_VALID_PTE
110
111 /* Convert an address to a corresponding PTE */
112 #define MiAddressToPte(x) \
113 ((PMMPTE)(((((ULONG)(x)) >> 12) << 2) + PTE_BASE))
114
115 /* Convert an address to a corresponding PDE */
116 #define MiAddressToPde(x) \
117 ((PMMPDE)(((((ULONG)(x)) >> 22) << 2) + PDE_BASE))
118
119 /* Convert an address to a corresponding PTE offset/index */
120 #define MiAddressToPteOffset(x) \
121 ((((ULONG)(x)) << 10) >> 22)
122
123 /* Convert an address to a corresponding PDE offset/index */
124 #define MiAddressToPdeOffset(x) \
125 (((ULONG)(x)) / (1024 * PAGE_SIZE))
126 #define MiGetPdeOffset MiAddressToPdeOffset
127
128 /* Convert a PTE/PDE into a corresponding address */
129 #define MiPteToAddress(_Pte) ((PVOID)((ULONG)(_Pte) << 10))
130 #define MiPdeToAddress(_Pde) ((PVOID)((ULONG)(_Pde) << 20))
131
132 /* Translate between P*Es */
133 #define MiPdeToPte(_Pde) ((PMMPTE)MiPteToAddress(_Pde))
134 #define MiPteToPde(_Pte) ((PMMPDE)MiAddressToPte(_Pte))
135
136 /* Check P*E boundaries */
137 #define MiIsPteOnPdeBoundary(PointerPte) \
138 ((((ULONG_PTR)PointerPte) & (PAGE_SIZE - 1)) == 0)
139
140 //
141 // Decodes a Prototype PTE into the underlying PTE
142 //
143 #define MiProtoPteToPte(x) \
144 (PMMPTE)((ULONG_PTR)MmPagedPoolStart + \
145 (((x)->u.Proto.ProtoAddressHigh << 9) | (x)->u.Proto.ProtoAddressLow << 2))
146
147 //
148 // Decodes a Prototype PTE into the underlying PTE
149 //
150 #define MiSubsectionPteToSubsection(x) \
151 ((x)->u.Subsect.WhichPool == PagedPool) ? \
152 (PMMPTE)((ULONG_PTR)MmSubsectionBase + \
153 (((x)->u.Subsect.SubsectionAddressHigh << 7) | \
154 (x)->u.Subsect.SubsectionAddressLow << 3)) : \
155 (PMMPTE)((ULONG_PTR)MmNonPagedPoolEnd - \
156 (((x)->u.Subsect.SubsectionAddressHigh << 7) | \
157 (x)->u.Subsect.SubsectionAddressLow << 3))