preliminary comment out the self-modifying code for RtlPrefetchMemoryNonTemporal
[reactos.git] / reactos / ntoskrnl / kdbg / i386 / i386-dis.c
1 /* $Id$
2 *
3 * COPYRIGHT: See COPYING in the top level directory
4 * PROJECT: ReactOS kernel
5 * FILE: ntoskrnl/dbg/i386/i386-dis.c
6 * PURPOSE: No purpose listed.
7 *
8 * PROGRAMMERS: No programmer listed.
9 */
10
11 #include <stdarg.h>
12
13 /* ReactOS compatibility stuff. */
14 #define PARAMS(X) X
15 #define PTR void*
16 typedef enum bfd_flavour
17 {
18 bfd_target_unknown_flavour,
19 } bfd_flavour;
20 typedef enum bfd_architecture
21 {
22 bfd_arch_i386,
23 } bfd_arch;
24 typedef unsigned int bfd_vma;
25 typedef unsigned char bfd_byte;
26 enum bfd_endian { BFD_ENDIAN_BIG, BIG_ENDIAN_LITTLE, BFD_ENDIAN_UNKNOWN };
27 typedef void* bfd;
28 typedef void* FILE;
29 typedef signed int bfd_signed_vma;
30 #define NULL 0
31 #define bfd_mach_x86_64_intel_syntax 0
32 #define bfd_mach_x86_64 1
33 #define bfd_mach_i386_i386_intel_syntax 2
34 #define bfd_mach_i386_i386 3
35 #define bfd_mach_i386_i8086 4
36 #define abort() __asm__("int $3\n\t")
37 #define _(X) X
38 #define ATTRIBUTE_UNUSED
39 extern char* strcpy(char *dest, const char *src);
40 extern unsigned int strlen(const char *s);
41 extern int sprintf(char *str, const char *format, ...);
42 extern int vsprintf(char *buf, const char *format, va_list ap);
43 extern void* memcpy(void *dest, const void *src, unsigned int length);
44 extern void DbgPrint(const char *format, ...);
45 #define sprintf_vma(BUF, VMA) sprintf(BUF, "0x%X", VMA)
46 #define _setjmp setjmp
47 extern unsigned int KdbSymPrintAddress(void* address);
48 struct disassemble_info;
49
50 extern long KdbpSafeReadMemory(void*, void*, unsigned int);
51
52
53 int
54 print_insn_i386 (bfd_vma pc, struct disassemble_info *info);
55
56 int
57 KdbpPrintDisasm(void* Ignored, const char* fmt, ...)
58 {
59 va_list ap;
60 static char buffer[256];
61 int ret;
62
63 va_start(ap, fmt);
64 ret = vsprintf(buffer, fmt, ap);
65 DbgPrint(buffer);
66 va_end(ap);
67 return(ret);
68 }
69
70 int
71 KdbpNopPrintDisasm(void* Ignored, const char* fmt, ...)
72 {
73 return(0);
74 }
75
76 int static
77 KdbpReadMemory(unsigned int Addr, unsigned char* Data, unsigned int Length,
78 struct disassemble_info * Ignored)
79 {
80 return KdbpSafeReadMemory(Data, (void *)Addr, Length); /* 0 means no error */
81 }
82
83 void static
84 KdbpMemoryError(int Status, unsigned int Addr,
85 struct disassemble_info * Ignored)
86 {
87 }
88
89 void static
90 KdbpPrintAddressInCode(unsigned int Addr, struct disassemble_info * Ignored)
91 {
92 if (!KdbSymPrintAddress((void*)Addr))
93 {
94 DbgPrint("<%08x>", Addr);
95 }
96 }
97
98 void static
99 KdbpNopPrintAddress(unsigned int Addr, struct disassemble_info * Ignored)
100 {
101 }
102
103 #include "dis-asm.h"
104
105 long
106 KdbpGetInstLength(unsigned int Address)
107 {
108 disassemble_info info;
109
110 info.fprintf_func = KdbpNopPrintDisasm;
111 info.stream = NULL;
112 info.application_data = NULL;
113 info.flavour = bfd_target_unknown_flavour;
114 info.arch = bfd_arch_i386;
115 info.mach = bfd_mach_i386_i386;
116 info.insn_sets = 0;
117 info.flags = 0;
118 info.read_memory_func = KdbpReadMemory;
119 info.memory_error_func = KdbpMemoryError;
120 info.print_address_func = KdbpNopPrintAddress;
121 info.symbol_at_address_func = NULL;
122 info.buffer = NULL;
123 info.buffer_vma = info.buffer_length = 0;
124 info.bytes_per_chunk = 0;
125 info.display_endian = BIG_ENDIAN_LITTLE;
126 info.disassembler_options = NULL;
127
128 return(print_insn_i386(Address, &info));
129 }
130
131 long
132 KdbpDisassemble(unsigned int Address, unsigned long IntelSyntax)
133 {
134 disassemble_info info;
135
136 info.fprintf_func = KdbpPrintDisasm;
137 info.stream = NULL;
138 info.application_data = NULL;
139 info.flavour = bfd_target_unknown_flavour;
140 info.arch = bfd_arch_i386;
141 info.mach = IntelSyntax ? bfd_mach_i386_i386_intel_syntax : bfd_mach_i386_i386;
142 info.insn_sets = 0;
143 info.flags = 0;
144 info.read_memory_func = KdbpReadMemory;
145 info.memory_error_func = KdbpMemoryError;
146 info.print_address_func = KdbpPrintAddressInCode;
147 info.symbol_at_address_func = NULL;
148 info.buffer = NULL;
149 info.buffer_vma = info.buffer_length = 0;
150 info.bytes_per_chunk = 0;
151 info.display_endian = BIG_ENDIAN_LITTLE;
152 info.disassembler_options = NULL;
153
154 return(print_insn_i386(Address, &info));
155 }
156
157 /* Print i386 instructions for GDB, the GNU debugger.
158 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
159 2001
160 Free Software Foundation, Inc.
161
162 This file is part of GDB.
163
164 This program is free software; you can redistribute it and/or modify
165 it under the terms of the GNU General Public License as published by
166 the Free Software Foundation; either version 2 of the License, or
167 (at your option) any later version.
168
169 This program is distributed in the hope that it will be useful,
170 but WITHOUT ANY WARRANTY; without even the implied warranty of
171 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
172 GNU General Public License for more details.
173
174 You should have received a copy of the GNU General Public License
175 along with this program; if not, write to the Free Software
176 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
177
178 /*
179 * 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
180 * July 1988
181 * modified by John Hassey (hassey@dg-rtp.dg.com)
182 * x86-64 support added by Jan Hubicka (jh@suse.cz)
183 */
184
185 /*
186 * The main tables describing the instructions is essentially a copy
187 * of the "Opcode Map" chapter (Appendix A) of the Intel 80386
188 * Programmers Manual. Usually, there is a capital letter, followed
189 * by a small letter. The capital letter tell the addressing mode,
190 * and the small letter tells about the operand size. Refer to
191 * the Intel manual for details.
192 */
193
194 #include "dis-asm.h"
195 #if 0
196 #include "sysdep.h"
197 #include "opintl.h"
198 #endif
199
200 #define MAXLEN 20
201
202 #include <setjmp.h>
203
204 #ifndef UNIXWARE_COMPAT
205 /* Set non-zero for broken, compatible instructions. Set to zero for
206 non-broken opcodes. */
207 #define UNIXWARE_COMPAT 1
208 #endif
209
210 static int fetch_data PARAMS ((struct disassemble_info *, bfd_byte *));
211 static void ckprefix PARAMS ((void));
212 static const char *prefix_name PARAMS ((int, int));
213 static int print_insn PARAMS ((bfd_vma, disassemble_info *));
214 static void dofloat PARAMS ((int));
215 static void OP_ST PARAMS ((int, int));
216 static void OP_STi PARAMS ((int, int));
217 static int putop PARAMS ((const char *, int));
218 static void oappend PARAMS ((const char *));
219 static void append_seg PARAMS ((void));
220 static void OP_indirE PARAMS ((int, int));
221 static void print_operand_value PARAMS ((char *, int, bfd_vma));
222 static void OP_E PARAMS ((int, int));
223 static void OP_G PARAMS ((int, int));
224 static bfd_vma get64 PARAMS ((void));
225 static bfd_signed_vma get32 PARAMS ((void));
226 static bfd_signed_vma get32s PARAMS ((void));
227 static int get16 PARAMS ((void));
228 static void set_op PARAMS ((bfd_vma, int));
229 static void OP_REG PARAMS ((int, int));
230 static void OP_IMREG PARAMS ((int, int));
231 static void OP_I PARAMS ((int, int));
232 static void OP_I64 PARAMS ((int, int));
233 static void OP_sI PARAMS ((int, int));
234 static void OP_J PARAMS ((int, int));
235 static void OP_SEG PARAMS ((int, int));
236 static void OP_DIR PARAMS ((int, int));
237 static void OP_OFF PARAMS ((int, int));
238 static void OP_OFF64 PARAMS ((int, int));
239 static void ptr_reg PARAMS ((int, int));
240 static void OP_ESreg PARAMS ((int, int));
241 static void OP_DSreg PARAMS ((int, int));
242 static void OP_C PARAMS ((int, int));
243 static void OP_D PARAMS ((int, int));
244 static void OP_T PARAMS ((int, int));
245 static void OP_Rd PARAMS ((int, int));
246 static void OP_MMX PARAMS ((int, int));
247 static void OP_XMM PARAMS ((int, int));
248 static void OP_EM PARAMS ((int, int));
249 static void OP_EX PARAMS ((int, int));
250 static void OP_MS PARAMS ((int, int));
251 static void OP_XS PARAMS ((int, int));
252 static void OP_3DNowSuffix PARAMS ((int, int));
253 static void OP_SIMD_Suffix PARAMS ((int, int));
254 static void SIMD_Fixup PARAMS ((int, int));
255 static void BadOp PARAMS ((void));
256
257 struct dis_private {
258 /* Points to first byte not fetched. */
259 bfd_byte *max_fetched;
260 bfd_byte the_buffer[MAXLEN];
261 bfd_vma insn_start;
262 int orig_sizeflag;
263 jmp_buf bailout;
264 };
265
266 /* The opcode for the fwait instruction, which we treat as a prefix
267 when we can. */
268 #define FWAIT_OPCODE (0x9b)
269
270 /* Set to 1 for 64bit mode disassembly. */
271 static int mode_64bit;
272
273 /* Flags for the prefixes for the current instruction. See below. */
274 static int prefixes;
275
276 /* REX prefix the current instruction. See below. */
277 static int rex;
278 /* Bits of REX we've already used. */
279 static int rex_used;
280 #define REX_MODE64 8
281 #define REX_EXTX 4
282 #define REX_EXTY 2
283 #define REX_EXTZ 1
284 /* Mark parts used in the REX prefix. When we are testing for
285 empty prefix (for 8bit register REX extension), just mask it
286 out. Otherwise test for REX bit is excuse for existence of REX
287 only in case value is nonzero. */
288 #define USED_REX(value) \
289 { \
290 if (value) \
291 rex_used |= (rex & value) ? (value) | 0x40 : 0; \
292 else \
293 rex_used |= 0x40; \
294 }
295
296 /* Flags for prefixes which we somehow handled when printing the
297 current instruction. */
298 static int used_prefixes;
299
300 /* Flags stored in PREFIXES. */
301 #define PREFIX_REPZ 1
302 #define PREFIX_REPNZ 2
303 #define PREFIX_LOCK 4
304 #define PREFIX_CS 8
305 #define PREFIX_SS 0x10
306 #define PREFIX_DS 0x20
307 #define PREFIX_ES 0x40
308 #define PREFIX_FS 0x80
309 #define PREFIX_GS 0x100
310 #define PREFIX_DATA 0x200
311 #define PREFIX_ADDR 0x400
312 #define PREFIX_FWAIT 0x800
313
314 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
315 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
316 on error. */
317 #define FETCH_DATA(info, addr) \
318 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
319 ? 1 : fetch_data ((info), (addr)))
320
321 static int
322 fetch_data (info, addr)
323 struct disassemble_info *info;
324 bfd_byte *addr;
325 {
326 int status;
327 struct dis_private *priv = (struct dis_private *) info->private_data;
328 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
329
330 status = (*info->read_memory_func) (start,
331 priv->max_fetched,
332 addr - priv->max_fetched,
333 info);
334 if (status != 0)
335 {
336 /* If we did manage to read at least one byte, then
337 print_insn_i386 will do something sensible. Otherwise, print
338 an error. We do that here because this is where we know
339 STATUS. */
340 if (priv->max_fetched == priv->the_buffer)
341 (*info->memory_error_func) (status, start, info);
342 longjmp (priv->bailout, 1);
343 }
344 else
345 priv->max_fetched = addr;
346 return 1;
347 }
348
349 #define XX NULL, 0
350
351 #define Eb OP_E, b_mode
352 #define Ev OP_E, v_mode
353 #define Ed OP_E, d_mode
354 #define indirEb OP_indirE, b_mode
355 #define indirEv OP_indirE, v_mode
356 #define Ew OP_E, w_mode
357 #define Ma OP_E, v_mode
358 #define M OP_E, 0 /* lea, lgdt, etc. */
359 #define Mp OP_E, 0 /* 32 or 48 bit memory operand for LDS, LES etc */
360 #define Gb OP_G, b_mode
361 #define Gv OP_G, v_mode
362 #define Gd OP_G, d_mode
363 #define Gw OP_G, w_mode
364 #define Rd OP_Rd, d_mode
365 #define Rm OP_Rd, m_mode
366 #define Ib OP_I, b_mode
367 #define sIb OP_sI, b_mode /* sign extened byte */
368 #define Iv OP_I, v_mode
369 #define Iq OP_I, q_mode
370 #define Iv64 OP_I64, v_mode
371 #define Iw OP_I, w_mode
372 #define Jb OP_J, b_mode
373 #define Jv OP_J, v_mode
374 #define Cm OP_C, m_mode
375 #define Dm OP_D, m_mode
376 #define Td OP_T, d_mode
377
378 #define RMeAX OP_REG, eAX_reg
379 #define RMeBX OP_REG, eBX_reg
380 #define RMeCX OP_REG, eCX_reg
381 #define RMeDX OP_REG, eDX_reg
382 #define RMeSP OP_REG, eSP_reg
383 #define RMeBP OP_REG, eBP_reg
384 #define RMeSI OP_REG, eSI_reg
385 #define RMeDI OP_REG, eDI_reg
386 #define RMrAX OP_REG, rAX_reg
387 #define RMrBX OP_REG, rBX_reg
388 #define RMrCX OP_REG, rCX_reg
389 #define RMrDX OP_REG, rDX_reg
390 #define RMrSP OP_REG, rSP_reg
391 #define RMrBP OP_REG, rBP_reg
392 #define RMrSI OP_REG, rSI_reg
393 #define RMrDI OP_REG, rDI_reg
394 #define RMAL OP_REG, al_reg
395 #define RMAL OP_REG, al_reg
396 #define RMCL OP_REG, cl_reg
397 #define RMDL OP_REG, dl_reg
398 #define RMBL OP_REG, bl_reg
399 #define RMAH OP_REG, ah_reg
400 #define RMCH OP_REG, ch_reg
401 #define RMDH OP_REG, dh_reg
402 #define RMBH OP_REG, bh_reg
403 #define RMAX OP_REG, ax_reg
404 #define RMDX OP_REG, dx_reg
405
406 #define eAX OP_IMREG, eAX_reg
407 #define eBX OP_IMREG, eBX_reg
408 #define eCX OP_IMREG, eCX_reg
409 #define eDX OP_IMREG, eDX_reg
410 #define eSP OP_IMREG, eSP_reg
411 #define eBP OP_IMREG, eBP_reg
412 #define eSI OP_IMREG, eSI_reg
413 #define eDI OP_IMREG, eDI_reg
414 #define AL OP_IMREG, al_reg
415 #define AL OP_IMREG, al_reg
416 #define CL OP_IMREG, cl_reg
417 #define DL OP_IMREG, dl_reg
418 #define BL OP_IMREG, bl_reg
419 #define AH OP_IMREG, ah_reg
420 #define CH OP_IMREG, ch_reg
421 #define DH OP_IMREG, dh_reg
422 #define BH OP_IMREG, bh_reg
423 #define AX OP_IMREG, ax_reg
424 #define DX OP_IMREG, dx_reg
425 #define indirDX OP_IMREG, indir_dx_reg
426
427 #define Sw OP_SEG, w_mode
428 #define Ap OP_DIR, 0
429 #define Ob OP_OFF, b_mode
430 #define Ob64 OP_OFF64, b_mode
431 #define Ov OP_OFF, v_mode
432 #define Ov64 OP_OFF64, v_mode
433 #define Xb OP_DSreg, eSI_reg
434 #define Xv OP_DSreg, eSI_reg
435 #define Yb OP_ESreg, eDI_reg
436 #define Yv OP_ESreg, eDI_reg
437 #define DSBX OP_DSreg, eBX_reg
438
439 #define es OP_REG, es_reg
440 #define ss OP_REG, ss_reg
441 #define cs OP_REG, cs_reg
442 #define ds OP_REG, ds_reg
443 #define fs OP_REG, fs_reg
444 #define gs OP_REG, gs_reg
445
446 #define MX OP_MMX, 0
447 #define XM OP_XMM, 0
448 #define EM OP_EM, v_mode
449 #define EX OP_EX, v_mode
450 #define MS OP_MS, v_mode
451 #define XS OP_XS, v_mode
452 #define None OP_E, 0
453 #define OPSUF OP_3DNowSuffix, 0
454 #define OPSIMD OP_SIMD_Suffix, 0
455
456 #define cond_jump_flag NULL, cond_jump_mode
457 #define loop_jcxz_flag NULL, loop_jcxz_mode
458
459 /* bits in sizeflag */
460 #define SUFFIX_ALWAYS 4
461 #define AFLAG 2
462 #define DFLAG 1
463
464 #define b_mode 1 /* byte operand */
465 #define v_mode 2 /* operand size depends on prefixes */
466 #define w_mode 3 /* word operand */
467 #define d_mode 4 /* double word operand */
468 #define q_mode 5 /* quad word operand */
469 #define x_mode 6
470 #define m_mode 7 /* d_mode in 32bit, q_mode in 64bit mode. */
471 #define cond_jump_mode 8
472 #define loop_jcxz_mode 9
473
474 #define es_reg 100
475 #define cs_reg 101
476 #define ss_reg 102
477 #define ds_reg 103
478 #define fs_reg 104
479 #define gs_reg 105
480
481 #define eAX_reg 108
482 #define eCX_reg 109
483 #define eDX_reg 110
484 #define eBX_reg 111
485 #define eSP_reg 112
486 #define eBP_reg 113
487 #define eSI_reg 114
488 #define eDI_reg 115
489
490 #define al_reg 116
491 #define cl_reg 117
492 #define dl_reg 118
493 #define bl_reg 119
494 #define ah_reg 120
495 #define ch_reg 121
496 #define dh_reg 122
497 #define bh_reg 123
498
499 #define ax_reg 124
500 #define cx_reg 125
501 #define dx_reg 126
502 #define bx_reg 127
503 #define sp_reg 128
504 #define bp_reg 129
505 #define si_reg 130
506 #define di_reg 131
507
508 #define rAX_reg 132
509 #define rCX_reg 133
510 #define rDX_reg 134
511 #define rBX_reg 135
512 #define rSP_reg 136
513 #define rBP_reg 137
514 #define rSI_reg 138
515 #define rDI_reg 139
516
517 #define indir_dx_reg 150
518
519 #define FLOATCODE 1
520 #define USE_GROUPS 2
521 #define USE_PREFIX_USER_TABLE 3
522 #define X86_64_SPECIAL 4
523
524 #define FLOAT NULL, NULL, FLOATCODE, NULL, 0, NULL, 0
525
526 #define GRP1b NULL, NULL, USE_GROUPS, NULL, 0, NULL, 0
527 #define GRP1S NULL, NULL, USE_GROUPS, NULL, 1, NULL, 0
528 #define GRP1Ss NULL, NULL, USE_GROUPS, NULL, 2, NULL, 0
529 #define GRP2b NULL, NULL, USE_GROUPS, NULL, 3, NULL, 0
530 #define GRP2S NULL, NULL, USE_GROUPS, NULL, 4, NULL, 0
531 #define GRP2b_one NULL, NULL, USE_GROUPS, NULL, 5, NULL, 0
532 #define GRP2S_one NULL, NULL, USE_GROUPS, NULL, 6, NULL, 0
533 #define GRP2b_cl NULL, NULL, USE_GROUPS, NULL, 7, NULL, 0
534 #define GRP2S_cl NULL, NULL, USE_GROUPS, NULL, 8, NULL, 0
535 #define GRP3b NULL, NULL, USE_GROUPS, NULL, 9, NULL, 0
536 #define GRP3S NULL, NULL, USE_GROUPS, NULL, 10, NULL, 0
537 #define GRP4 NULL, NULL, USE_GROUPS, NULL, 11, NULL, 0
538 #define GRP5 NULL, NULL, USE_GROUPS, NULL, 12, NULL, 0
539 #define GRP6 NULL, NULL, USE_GROUPS, NULL, 13, NULL, 0
540 #define GRP7 NULL, NULL, USE_GROUPS, NULL, 14, NULL, 0
541 #define GRP8 NULL, NULL, USE_GROUPS, NULL, 15, NULL, 0
542 #define GRP9 NULL, NULL, USE_GROUPS, NULL, 16, NULL, 0
543 #define GRP10 NULL, NULL, USE_GROUPS, NULL, 17, NULL, 0
544 #define GRP11 NULL, NULL, USE_GROUPS, NULL, 18, NULL, 0
545 #define GRP12 NULL, NULL, USE_GROUPS, NULL, 19, NULL, 0
546 #define GRP13 NULL, NULL, USE_GROUPS, NULL, 20, NULL, 0
547 #define GRP14 NULL, NULL, USE_GROUPS, NULL, 21, NULL, 0
548 #define GRPAMD NULL, NULL, USE_GROUPS, NULL, 22, NULL, 0
549
550 #define PREGRP0 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 0, NULL, 0
551 #define PREGRP1 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 1, NULL, 0
552 #define PREGRP2 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 2, NULL, 0
553 #define PREGRP3 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 3, NULL, 0
554 #define PREGRP4 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 4, NULL, 0
555 #define PREGRP5 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 5, NULL, 0
556 #define PREGRP6 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 6, NULL, 0
557 #define PREGRP7 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 7, NULL, 0
558 #define PREGRP8 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 8, NULL, 0
559 #define PREGRP9 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 9, NULL, 0
560 #define PREGRP10 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 10, NULL, 0
561 #define PREGRP11 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 11, NULL, 0
562 #define PREGRP12 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 12, NULL, 0
563 #define PREGRP13 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 13, NULL, 0
564 #define PREGRP14 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 14, NULL, 0
565 #define PREGRP15 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 15, NULL, 0
566 #define PREGRP16 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 16, NULL, 0
567 #define PREGRP17 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 17, NULL, 0
568 #define PREGRP18 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 18, NULL, 0
569 #define PREGRP19 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 19, NULL, 0
570 #define PREGRP20 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 20, NULL, 0
571 #define PREGRP21 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 21, NULL, 0
572 #define PREGRP22 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 22, NULL, 0
573 #define PREGRP23 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 23, NULL, 0
574 #define PREGRP24 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 24, NULL, 0
575 #define PREGRP25 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 25, NULL, 0
576 #define PREGRP26 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 26, NULL, 0
577
578 #define X86_64_0 NULL, NULL, X86_64_SPECIAL, NULL, 0, NULL, 0
579
580 typedef void (*op_rtn) PARAMS ((int bytemode, int sizeflag));
581
582 struct dis386 {
583 const char *name;
584 op_rtn op1;
585 int bytemode1;
586 op_rtn op2;
587 int bytemode2;
588 op_rtn op3;
589 int bytemode3;
590 };
591
592 /* Upper case letters in the instruction names here are macros.
593 'A' => print 'b' if no register operands or suffix_always is true
594 'B' => print 'b' if suffix_always is true
595 'E' => print 'e' if 32-bit form of jcxz
596 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
597 'H' => print ",pt" or ",pn" branch hint
598 'L' => print 'l' if suffix_always is true
599 'N' => print 'n' if instruction has no wait "prefix"
600 'O' => print 'd', or 'o'
601 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
602 . or suffix_always is true. print 'q' if rex prefix is present.
603 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
604 . is true
605 'R' => print 'w', 'l' or 'q' ("wd" or "dq" in intel mode)
606 'S' => print 'w', 'l' or 'q' if suffix_always is true
607 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
608 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
609 'X' => print 's', 'd' depending on data16 prefix (for XMM)
610 'W' => print 'b' or 'w' ("w" or "de" in intel mode)
611 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
612
613 Many of the above letters print nothing in Intel mode. See "putop"
614 for the details.
615
616 Braces '{' and '}', and vertical bars '|', indicate alternative
617 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
618 modes. In cases where there are only two alternatives, the X86_64
619 instruction is reserved, and "(bad)" is printed.
620 */
621
622 static const struct dis386 dis386[] = {
623 /* 00 */
624 { "addB", Eb, Gb, XX },
625 { "addS", Ev, Gv, XX },
626 { "addB", Gb, Eb, XX },
627 { "addS", Gv, Ev, XX },
628 { "addB", AL, Ib, XX },
629 { "addS", eAX, Iv, XX },
630 { "push{T|}", es, XX, XX },
631 { "pop{T|}", es, XX, XX },
632 /* 08 */
633 { "orB", Eb, Gb, XX },
634 { "orS", Ev, Gv, XX },
635 { "orB", Gb, Eb, XX },
636 { "orS", Gv, Ev, XX },
637 { "orB", AL, Ib, XX },
638 { "orS", eAX, Iv, XX },
639 { "push{T|}", cs, XX, XX },
640 { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */
641 /* 10 */
642 { "adcB", Eb, Gb, XX },
643 { "adcS", Ev, Gv, XX },
644 { "adcB", Gb, Eb, XX },
645 { "adcS", Gv, Ev, XX },
646 { "adcB", AL, Ib, XX },
647 { "adcS", eAX, Iv, XX },
648 { "push{T|}", ss, XX, XX },
649 { "popT|}", ss, XX, XX },
650 /* 18 */
651 { "sbbB", Eb, Gb, XX },
652 { "sbbS", Ev, Gv, XX },
653 { "sbbB", Gb, Eb, XX },
654 { "sbbS", Gv, Ev, XX },
655 { "sbbB", AL, Ib, XX },
656 { "sbbS", eAX, Iv, XX },
657 { "push{T|}", ds, XX, XX },
658 { "pop{T|}", ds, XX, XX },
659 /* 20 */
660 { "andB", Eb, Gb, XX },
661 { "andS", Ev, Gv, XX },
662 { "andB", Gb, Eb, XX },
663 { "andS", Gv, Ev, XX },
664 { "andB", AL, Ib, XX },
665 { "andS", eAX, Iv, XX },
666 { "(bad)", XX, XX, XX }, /* SEG ES prefix */
667 { "daa{|}", XX, XX, XX },
668 /* 28 */
669 { "subB", Eb, Gb, XX },
670 { "subS", Ev, Gv, XX },
671 { "subB", Gb, Eb, XX },
672 { "subS", Gv, Ev, XX },
673 { "subB", AL, Ib, XX },
674 { "subS", eAX, Iv, XX },
675 { "(bad)", XX, XX, XX }, /* SEG CS prefix */
676 { "das{|}", XX, XX, XX },
677 /* 30 */
678 { "xorB", Eb, Gb, XX },
679 { "xorS", Ev, Gv, XX },
680 { "xorB", Gb, Eb, XX },
681 { "xorS", Gv, Ev, XX },
682 { "xorB", AL, Ib, XX },
683 { "xorS", eAX, Iv, XX },
684 { "(bad)", XX, XX, XX }, /* SEG SS prefix */
685 { "aaa{|}", XX, XX, XX },
686 /* 38 */
687 { "cmpB", Eb, Gb, XX },
688 { "cmpS", Ev, Gv, XX },
689 { "cmpB", Gb, Eb, XX },
690 { "cmpS", Gv, Ev, XX },
691 { "cmpB", AL, Ib, XX },
692 { "cmpS", eAX, Iv, XX },
693 { "(bad)", XX, XX, XX }, /* SEG DS prefix */
694 { "aas{|}", XX, XX, XX },
695 /* 40 */
696 { "inc{S|}", RMeAX, XX, XX },
697 { "inc{S|}", RMeCX, XX, XX },
698 { "inc{S|}", RMeDX, XX, XX },
699 { "inc{S|}", RMeBX, XX, XX },
700 { "inc{S|}", RMeSP, XX, XX },
701 { "inc{S|}", RMeBP, XX, XX },
702 { "inc{S|}", RMeSI, XX, XX },
703 { "inc{S|}", RMeDI, XX, XX },
704 /* 48 */
705 { "dec{S|}", RMeAX, XX, XX },
706 { "dec{S|}", RMeCX, XX, XX },
707 { "dec{S|}", RMeDX, XX, XX },
708 { "dec{S|}", RMeBX, XX, XX },
709 { "dec{S|}", RMeSP, XX, XX },
710 { "dec{S|}", RMeBP, XX, XX },
711 { "dec{S|}", RMeSI, XX, XX },
712 { "dec{S|}", RMeDI, XX, XX },
713 /* 50 */
714 { "pushS", RMrAX, XX, XX },
715 { "pushS", RMrCX, XX, XX },
716 { "pushS", RMrDX, XX, XX },
717 { "pushS", RMrBX, XX, XX },
718 { "pushS", RMrSP, XX, XX },
719 { "pushS", RMrBP, XX, XX },
720 { "pushS", RMrSI, XX, XX },
721 { "pushS", RMrDI, XX, XX },
722 /* 58 */
723 { "popS", RMrAX, XX, XX },
724 { "popS", RMrCX, XX, XX },
725 { "popS", RMrDX, XX, XX },
726 { "popS", RMrBX, XX, XX },
727 { "popS", RMrSP, XX, XX },
728 { "popS", RMrBP, XX, XX },
729 { "popS", RMrSI, XX, XX },
730 { "popS", RMrDI, XX, XX },
731 /* 60 */
732 { "pusha{P|}", XX, XX, XX },
733 { "popa{P|}", XX, XX, XX },
734 { "bound{S|}", Gv, Ma, XX },
735 { X86_64_0 },
736 { "(bad)", XX, XX, XX }, /* seg fs */
737 { "(bad)", XX, XX, XX }, /* seg gs */
738 { "(bad)", XX, XX, XX }, /* op size prefix */
739 { "(bad)", XX, XX, XX }, /* adr size prefix */
740 /* 68 */
741 { "pushT", Iq, XX, XX },
742 { "imulS", Gv, Ev, Iv },
743 { "pushT", sIb, XX, XX },
744 { "imulS", Gv, Ev, sIb },
745 { "ins{b||b|}", Yb, indirDX, XX },
746 { "ins{R||R|}", Yv, indirDX, XX },
747 { "outs{b||b|}", indirDX, Xb, XX },
748 { "outs{R||R|}", indirDX, Xv, XX },
749 /* 70 */
750 { "joH", Jb, XX, cond_jump_flag },
751 { "jnoH", Jb, XX, cond_jump_flag },
752 { "jbH", Jb, XX, cond_jump_flag },
753 { "jaeH", Jb, XX, cond_jump_flag },
754 { "jeH", Jb, XX, cond_jump_flag },
755 { "jneH", Jb, XX, cond_jump_flag },
756 { "jbeH", Jb, XX, cond_jump_flag },
757 { "jaH", Jb, XX, cond_jump_flag },
758 /* 78 */
759 { "jsH", Jb, XX, cond_jump_flag },
760 { "jnsH", Jb, XX, cond_jump_flag },
761 { "jpH", Jb, XX, cond_jump_flag },
762 { "jnpH", Jb, XX, cond_jump_flag },
763 { "jlH", Jb, XX, cond_jump_flag },
764 { "jgeH", Jb, XX, cond_jump_flag },
765 { "jleH", Jb, XX, cond_jump_flag },
766 { "jgH", Jb, XX, cond_jump_flag },
767 /* 80 */
768 { GRP1b },
769 { GRP1S },
770 { "(bad)", XX, XX, XX },
771 { GRP1Ss },
772 { "testB", Eb, Gb, XX },
773 { "testS", Ev, Gv, XX },
774 { "xchgB", Eb, Gb, XX },
775 { "xchgS", Ev, Gv, XX },
776 /* 88 */
777 { "movB", Eb, Gb, XX },
778 { "movS", Ev, Gv, XX },
779 { "movB", Gb, Eb, XX },
780 { "movS", Gv, Ev, XX },
781 { "movQ", Ev, Sw, XX },
782 { "leaS", Gv, M, XX },
783 { "movQ", Sw, Ev, XX },
784 { "popU", Ev, XX, XX },
785 /* 90 */
786 { "nop", XX, XX, XX },
787 /* FIXME: NOP with REPz prefix is called PAUSE. */
788 { "xchgS", RMeCX, eAX, XX },
789 { "xchgS", RMeDX, eAX, XX },
790 { "xchgS", RMeBX, eAX, XX },
791 { "xchgS", RMeSP, eAX, XX },
792 { "xchgS", RMeBP, eAX, XX },
793 { "xchgS", RMeSI, eAX, XX },
794 { "xchgS", RMeDI, eAX, XX },
795 /* 98 */
796 { "cW{tR||tR|}", XX, XX, XX },
797 { "cR{tO||tO|}", XX, XX, XX },
798 { "lcall{T|}", Ap, XX, XX },
799 { "(bad)", XX, XX, XX }, /* fwait */
800 { "pushfT", XX, XX, XX },
801 { "popfT", XX, XX, XX },
802 { "sahf{|}", XX, XX, XX },
803 { "lahf{|}", XX, XX, XX },
804 /* a0 */
805 { "movB", AL, Ob64, XX },
806 { "movS", eAX, Ov64, XX },
807 { "movB", Ob64, AL, XX },
808 { "movS", Ov64, eAX, XX },
809 { "movs{b||b|}", Yb, Xb, XX },
810 { "movs{R||R|}", Yv, Xv, XX },
811 { "cmps{b||b|}", Xb, Yb, XX },
812 { "cmps{R||R|}", Xv, Yv, XX },
813 /* a8 */
814 { "testB", AL, Ib, XX },
815 { "testS", eAX, Iv, XX },
816 { "stosB", Yb, AL, XX },
817 { "stosS", Yv, eAX, XX },
818 { "lodsB", AL, Xb, XX },
819 { "lodsS", eAX, Xv, XX },
820 { "scasB", AL, Yb, XX },
821 { "scasS", eAX, Yv, XX },
822 /* b0 */
823 { "movB", RMAL, Ib, XX },
824 { "movB", RMCL, Ib, XX },
825 { "movB", RMDL, Ib, XX },
826 { "movB", RMBL, Ib, XX },
827 { "movB", RMAH, Ib, XX },
828 { "movB", RMCH, Ib, XX },
829 { "movB", RMDH, Ib, XX },
830 { "movB", RMBH, Ib, XX },
831 /* b8 */
832 { "movS", RMeAX, Iv64, XX },
833 { "movS", RMeCX, Iv64, XX },
834 { "movS", RMeDX, Iv64, XX },
835 { "movS", RMeBX, Iv64, XX },
836 { "movS", RMeSP, Iv64, XX },
837 { "movS", RMeBP, Iv64, XX },
838 { "movS", RMeSI, Iv64, XX },
839 { "movS", RMeDI, Iv64, XX },
840 /* c0 */
841 { GRP2b },
842 { GRP2S },
843 { "retT", Iw, XX, XX },
844 { "retT", XX, XX, XX },
845 { "les{S|}", Gv, Mp, XX },
846 { "ldsS", Gv, Mp, XX },
847 { "movA", Eb, Ib, XX },
848 { "movQ", Ev, Iv, XX },
849 /* c8 */
850 { "enterT", Iw, Ib, XX },
851 { "leaveT", XX, XX, XX },
852 { "lretP", Iw, XX, XX },
853 { "lretP", XX, XX, XX },
854 { "int3", XX, XX, XX },
855 { "int", Ib, XX, XX },
856 { "into{|}", XX, XX, XX },
857 { "iretP", XX, XX, XX },
858 /* d0 */
859 { GRP2b_one },
860 { GRP2S_one },
861 { GRP2b_cl },
862 { GRP2S_cl },
863 { "aam{|}", sIb, XX, XX },
864 { "aad{|}", sIb, XX, XX },
865 { "(bad)", XX, XX, XX },
866 { "xlat", DSBX, XX, XX },
867 /* d8 */
868 { FLOAT },
869 { FLOAT },
870 { FLOAT },
871 { FLOAT },
872 { FLOAT },
873 { FLOAT },
874 { FLOAT },
875 { FLOAT },
876 /* e0 */
877 { "loopneFH", Jb, XX, loop_jcxz_flag },
878 { "loopeFH", Jb, XX, loop_jcxz_flag },
879 { "loopFH", Jb, XX, loop_jcxz_flag },
880 { "jEcxzH", Jb, XX, loop_jcxz_flag },
881 { "inB", AL, Ib, XX },
882 { "inS", eAX, Ib, XX },
883 { "outB", Ib, AL, XX },
884 { "outS", Ib, eAX, XX },
885 /* e8 */
886 { "callT", Jv, XX, XX },
887 { "jmpT", Jv, XX, XX },
888 { "ljmp{T|}", Ap, XX, XX },
889 { "jmp", Jb, XX, XX },
890 { "inB", AL, indirDX, XX },
891 { "inS", eAX, indirDX, XX },
892 { "outB", indirDX, AL, XX },
893 { "outS", indirDX, eAX, XX },
894 /* f0 */
895 { "(bad)", XX, XX, XX }, /* lock prefix */
896 { "(bad)", XX, XX, XX },
897 { "(bad)", XX, XX, XX }, /* repne */
898 { "(bad)", XX, XX, XX }, /* repz */
899 { "hlt", XX, XX, XX },
900 { "cmc", XX, XX, XX },
901 { GRP3b },
902 { GRP3S },
903 /* f8 */
904 { "clc", XX, XX, XX },
905 { "stc", XX, XX, XX },
906 { "cli", XX, XX, XX },
907 { "sti", XX, XX, XX },
908 { "cld", XX, XX, XX },
909 { "std", XX, XX, XX },
910 { GRP4 },
911 { GRP5 },
912 };
913
914 static const struct dis386 dis386_twobyte[] = {
915 /* 00 */
916 { GRP6 },
917 { GRP7 },
918 { "larS", Gv, Ew, XX },
919 { "lslS", Gv, Ew, XX },
920 { "(bad)", XX, XX, XX },
921 { "syscall", XX, XX, XX },
922 { "clts", XX, XX, XX },
923 { "sysretP", XX, XX, XX },
924 /* 08 */
925 { "invd", XX, XX, XX },
926 { "wbinvd", XX, XX, XX },
927 { "(bad)", XX, XX, XX },
928 { "ud2a", XX, XX, XX },
929 { "(bad)", XX, XX, XX },
930 { GRPAMD },
931 { "femms", XX, XX, XX },
932 { "", MX, EM, OPSUF }, /* See OP_3DNowSuffix. */
933 /* 10 */
934 { PREGRP8 },
935 { PREGRP9 },
936 { "movlpX", XM, EX, SIMD_Fixup, 'h' }, /* really only 2 operands */
937 { "movlpX", EX, XM, SIMD_Fixup, 'h' },
938 { "unpcklpX", XM, EX, XX },
939 { "unpckhpX", XM, EX, XX },
940 { "movhpX", XM, EX, SIMD_Fixup, 'l' },
941 { "movhpX", EX, XM, SIMD_Fixup, 'l' },
942 /* 18 */
943 { GRP14 },
944 { "(bad)", XX, XX, XX },
945 { "(bad)", XX, XX, XX },
946 { "(bad)", XX, XX, XX },
947 { "(bad)", XX, XX, XX },
948 { "(bad)", XX, XX, XX },
949 { "(bad)", XX, XX, XX },
950 { "(bad)", XX, XX, XX },
951 /* 20 */
952 { "movL", Rm, Cm, XX },
953 { "movL", Rm, Dm, XX },
954 { "movL", Cm, Rm, XX },
955 { "movL", Dm, Rm, XX },
956 { "movL", Rd, Td, XX },
957 { "(bad)", XX, XX, XX },
958 { "movL", Td, Rd, XX },
959 { "(bad)", XX, XX, XX },
960 /* 28 */
961 { "movapX", XM, EX, XX },
962 { "movapX", EX, XM, XX },
963 { PREGRP2 },
964 { "movntpX", Ev, XM, XX },
965 { PREGRP4 },
966 { PREGRP3 },
967 { "ucomisX", XM,EX, XX },
968 { "comisX", XM,EX, XX },
969 /* 30 */
970 { "wrmsr", XX, XX, XX },
971 { "rdtsc", XX, XX, XX },
972 { "rdmsr", XX, XX, XX },
973 { "rdpmc", XX, XX, XX },
974 { "sysenter", XX, XX, XX },
975 { "sysexit", XX, XX, XX },
976 { "(bad)", XX, XX, XX },
977 { "(bad)", XX, XX, XX },
978 /* 38 */
979 { "(bad)", XX, XX, XX },
980 { "(bad)", XX, XX, XX },
981 { "(bad)", XX, XX, XX },
982 { "(bad)", XX, XX, XX },
983 { "(bad)", XX, XX, XX },
984 { "(bad)", XX, XX, XX },
985 { "(bad)", XX, XX, XX },
986 { "(bad)", XX, XX, XX },
987 /* 40 */
988 { "cmovo", Gv, Ev, XX },
989 { "cmovno", Gv, Ev, XX },
990 { "cmovb", Gv, Ev, XX },
991 { "cmovae", Gv, Ev, XX },
992 { "cmove", Gv, Ev, XX },
993 { "cmovne", Gv, Ev, XX },
994 { "cmovbe", Gv, Ev, XX },
995 { "cmova", Gv, Ev, XX },
996 /* 48 */
997 { "cmovs", Gv, Ev, XX },
998 { "cmovns", Gv, Ev, XX },
999 { "cmovp", Gv, Ev, XX },
1000 { "cmovnp", Gv, Ev, XX },
1001 { "cmovl", Gv, Ev, XX },
1002 { "cmovge", Gv, Ev, XX },
1003 { "cmovle", Gv, Ev, XX },
1004 { "cmovg", Gv, Ev, XX },
1005 /* 50 */
1006 { "movmskpX", Gd, XS, XX },
1007 { PREGRP13 },
1008 { PREGRP12 },
1009 { PREGRP11 },
1010 { "andpX", XM, EX, XX },
1011 { "andnpX", XM, EX, XX },
1012 { "orpX", XM, EX, XX },
1013 { "xorpX", XM, EX, XX },
1014 /* 58 */
1015 { PREGRP0 },
1016 { PREGRP10 },
1017 { PREGRP17 },
1018 { PREGRP16 },
1019 { PREGRP14 },
1020 { PREGRP7 },
1021 { PREGRP5 },
1022 { PREGRP6 },
1023 /* 60 */
1024 { "punpcklbw", MX, EM, XX },
1025 { "punpcklwd", MX, EM, XX },
1026 { "punpckldq", MX, EM, XX },
1027 { "packsswb", MX, EM, XX },
1028 { "pcmpgtb", MX, EM, XX },
1029 { "pcmpgtw", MX, EM, XX },
1030 { "pcmpgtd", MX, EM, XX },
1031 { "packuswb", MX, EM, XX },
1032 /* 68 */
1033 { "punpckhbw", MX, EM, XX },
1034 { "punpckhwd", MX, EM, XX },
1035 { "punpckhdq", MX, EM, XX },
1036 { "packssdw", MX, EM, XX },
1037 { PREGRP26 },
1038 { PREGRP24 },
1039 { "movd", MX, Ed, XX },
1040 { PREGRP19 },
1041 /* 70 */
1042 { PREGRP22 },
1043 { GRP10 },
1044 { GRP11 },
1045 { GRP12 },
1046 { "pcmpeqb", MX, EM, XX },
1047 { "pcmpeqw", MX, EM, XX },
1048 { "pcmpeqd", MX, EM, XX },
1049 { "emms", XX, XX, XX },
1050 /* 78 */
1051 { "(bad)", XX, XX, XX },
1052 { "(bad)", XX, XX, XX },
1053 { "(bad)", XX, XX, XX },
1054 { "(bad)", XX, XX, XX },
1055 { "(bad)", XX, XX, XX },
1056 { "(bad)", XX, XX, XX },
1057 { PREGRP23 },
1058 { PREGRP20 },
1059 /* 80 */
1060 { "joH", Jv, XX, cond_jump_flag },
1061 { "jnoH", Jv, XX, cond_jump_flag },
1062 { "jbH", Jv, XX, cond_jump_flag },
1063 { "jaeH", Jv, XX, cond_jump_flag },
1064 { "jeH", Jv, XX, cond_jump_flag },
1065 { "jneH", Jv, XX, cond_jump_flag },
1066 { "jbeH", Jv, XX, cond_jump_flag },
1067 { "jaH", Jv, XX, cond_jump_flag },
1068 /* 88 */
1069 { "jsH", Jv, XX, cond_jump_flag },
1070 { "jnsH", Jv, XX, cond_jump_flag },
1071 { "jpH", Jv, XX, cond_jump_flag },
1072 { "jnpH", Jv, XX, cond_jump_flag },
1073 { "jlH", Jv, XX, cond_jump_flag },
1074 { "jgeH", Jv, XX, cond_jump_flag },
1075 { "jleH", Jv, XX, cond_jump_flag },
1076 { "jgH", Jv, XX, cond_jump_flag },
1077 /* 90 */
1078 { "seto", Eb, XX, XX },
1079 { "setno", Eb, XX, XX },
1080 { "setb", Eb, XX, XX },
1081 { "setae", Eb, XX, XX },
1082 { "sete", Eb, XX, XX },
1083 { "setne", Eb, XX, XX },
1084 { "setbe", Eb, XX, XX },
1085 { "seta", Eb, XX, XX },
1086 /* 98 */
1087 { "sets", Eb, XX, XX },
1088 { "setns", Eb, XX, XX },
1089 { "setp", Eb, XX, XX },
1090 { "setnp", Eb, XX, XX },
1091 { "setl", Eb, XX, XX },
1092 { "setge", Eb, XX, XX },
1093 { "setle", Eb, XX, XX },
1094 { "setg", Eb, XX, XX },
1095 /* a0 */
1096 { "pushT", fs, XX, XX },
1097 { "popT", fs, XX, XX },
1098 { "cpuid", XX, XX, XX },
1099 { "btS", Ev, Gv, XX },
1100 { "shldS", Ev, Gv, Ib },
1101 { "shldS", Ev, Gv, CL },
1102 { "(bad)", XX, XX, XX },
1103 { "(bad)", XX, XX, XX },
1104 /* a8 */
1105 { "pushT", gs, XX, XX },
1106 { "popT", gs, XX, XX },
1107 { "rsm", XX, XX, XX },
1108 { "btsS", Ev, Gv, XX },
1109 { "shrdS", Ev, Gv, Ib },
1110 { "shrdS", Ev, Gv, CL },
1111 { GRP13 },
1112 { "imulS", Gv, Ev, XX },
1113 /* b0 */
1114 { "cmpxchgB", Eb, Gb, XX },
1115 { "cmpxchgS", Ev, Gv, XX },
1116 { "lssS", Gv, Mp, XX },
1117 { "btrS", Ev, Gv, XX },
1118 { "lfsS", Gv, Mp, XX },
1119 { "lgsS", Gv, Mp, XX },
1120 { "movz{bR|x|bR|x}", Gv, Eb, XX },
1121 { "movz{wR|x|wR|x}", Gv, Ew, XX }, /* yes, there really is movzww ! */
1122 /* b8 */
1123 { "(bad)", XX, XX, XX },
1124 { "ud2b", XX, XX, XX },
1125 { GRP8 },
1126 { "btcS", Ev, Gv, XX },
1127 { "bsfS", Gv, Ev, XX },
1128 { "bsrS", Gv, Ev, XX },
1129 { "movs{bR|x|bR|x}", Gv, Eb, XX },
1130 { "movs{wR|x|wR|x}", Gv, Ew, XX }, /* yes, there really is movsww ! */
1131 /* c0 */
1132 { "xaddB", Eb, Gb, XX },
1133 { "xaddS", Ev, Gv, XX },
1134 { PREGRP1 },
1135 { "movntiS", Ev, Gv, XX },
1136 { "pinsrw", MX, Ed, Ib },
1137 { "pextrw", Gd, MS, Ib },
1138 { "shufpX", XM, EX, Ib },
1139 { GRP9 },
1140 /* c8 */
1141 { "bswap", RMeAX, XX, XX },
1142 { "bswap", RMeCX, XX, XX },
1143 { "bswap", RMeDX, XX, XX },
1144 { "bswap", RMeBX, XX, XX },
1145 { "bswap", RMeSP, XX, XX },
1146 { "bswap", RMeBP, XX, XX },
1147 { "bswap", RMeSI, XX, XX },
1148 { "bswap", RMeDI, XX, XX },
1149 /* d0 */
1150 { "(bad)", XX, XX, XX },
1151 { "psrlw", MX, EM, XX },
1152 { "psrld", MX, EM, XX },
1153 { "psrlq", MX, EM, XX },
1154 { "paddq", MX, EM, XX },
1155 { "pmullw", MX, EM, XX },
1156 { PREGRP21 },
1157 { "pmovmskb", Gd, MS, XX },
1158 /* d8 */
1159 { "psubusb", MX, EM, XX },
1160 { "psubusw", MX, EM, XX },
1161 { "pminub", MX, EM, XX },
1162 { "pand", MX, EM, XX },
1163 { "paddusb", MX, EM, XX },
1164 { "paddusw", MX, EM, XX },
1165 { "pmaxub", MX, EM, XX },
1166 { "pandn", MX, EM, XX },
1167 /* e0 */
1168 { "pavgb", MX, EM, XX },
1169 { "psraw", MX, EM, XX },
1170 { "psrad", MX, EM, XX },
1171 { "pavgw", MX, EM, XX },
1172 { "pmulhuw", MX, EM, XX },
1173 { "pmulhw", MX, EM, XX },
1174 { PREGRP15 },
1175 { PREGRP25 },
1176 /* e8 */
1177 { "psubsb", MX, EM, XX },
1178 { "psubsw", MX, EM, XX },
1179 { "pminsw", MX, EM, XX },
1180 { "por", MX, EM, XX },
1181 { "paddsb", MX, EM, XX },
1182 { "paddsw", MX, EM, XX },
1183 { "pmaxsw", MX, EM, XX },
1184 { "pxor", MX, EM, XX },
1185 /* f0 */
1186 { "(bad)", XX, XX, XX },
1187 { "psllw", MX, EM, XX },
1188 { "pslld", MX, EM, XX },
1189 { "psllq", MX, EM, XX },
1190 { "pmuludq", MX, EM, XX },
1191 { "pmaddwd", MX, EM, XX },
1192 { "psadbw", MX, EM, XX },
1193 { PREGRP18 },
1194 /* f8 */
1195 { "psubb", MX, EM, XX },
1196 { "psubw", MX, EM, XX },
1197 { "psubd", MX, EM, XX },
1198 { "psubq", MX, EM, XX },
1199 { "paddb", MX, EM, XX },
1200 { "paddw", MX, EM, XX },
1201 { "paddd", MX, EM, XX },
1202 { "(bad)", XX, XX, XX }
1203 };
1204
1205 static const unsigned char onebyte_has_modrm[256] = {
1206 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1207 /* ------------------------------- */
1208 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1209 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1210 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1211 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1212 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1213 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1214 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1215 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1216 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1217 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1218 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1219 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1220 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1221 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1222 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1223 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1224 /* ------------------------------- */
1225 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1226 };
1227
1228 static const unsigned char twobyte_has_modrm[256] = {
1229 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1230 /* ------------------------------- */
1231 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
1232 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0, /* 1f */
1233 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
1234 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1235 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
1236 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1237 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
1238 /* 70 */ 1,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1, /* 7f */
1239 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1240 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
1241 /* a0 */ 0,0,0,1,1,1,0,0,0,0,0,1,1,1,1,1, /* af */
1242 /* b0 */ 1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1, /* bf */
1243 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
1244 /* d0 */ 0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
1245 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
1246 /* f0 */ 0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
1247 /* ------------------------------- */
1248 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1249 };
1250
1251 static const unsigned char twobyte_uses_SSE_prefix[256] = {
1252 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1253 /* ------------------------------- */
1254 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1255 /* 10 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1256 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,0,1,1,0,0, /* 2f */
1257 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1258 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1259 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1260 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
1261 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1, /* 7f */
1262 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1263 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1264 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1265 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1266 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1267 /* d0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1268 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1269 /* f0 */ 0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
1270 /* ------------------------------- */
1271 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1272 };
1273
1274 static char obuf[100];
1275 static char *obufp;
1276 static char scratchbuf[100];
1277 static unsigned char *start_codep;
1278 static unsigned char *insn_codep;
1279 static unsigned char *codep;
1280 static disassemble_info *the_info;
1281 static int mod;
1282 static int rm;
1283 static int reg;
1284 static unsigned char need_modrm;
1285
1286 /* If we are accessing mod/rm/reg without need_modrm set, then the
1287 values are stale. Hitting this abort likely indicates that you
1288 need to update onebyte_has_modrm or twobyte_has_modrm. */
1289 #define MODRM_CHECK if (!need_modrm) abort ()
1290
1291 static const char **names64;
1292 static const char **names32;
1293 static const char **names16;
1294 static const char **names8;
1295 static const char **names8rex;
1296 static const char **names_seg;
1297 static const char **index16;
1298
1299 static const char *intel_names64[] = {
1300 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1301 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1302 };
1303 static const char *intel_names32[] = {
1304 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1305 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1306 };
1307 static const char *intel_names16[] = {
1308 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1309 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1310 };
1311 static const char *intel_names8[] = {
1312 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1313 };
1314 static const char *intel_names8rex[] = {
1315 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1316 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1317 };
1318 static const char *intel_names_seg[] = {
1319 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1320 };
1321 static const char *intel_index16[] = {
1322 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1323 };
1324
1325 static const char *att_names64[] = {
1326 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
1327 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1328 };
1329 static const char *att_names32[] = {
1330 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
1331 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
1332 };
1333 static const char *att_names16[] = {
1334 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
1335 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
1336 };
1337 static const char *att_names8[] = {
1338 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
1339 };
1340 static const char *att_names8rex[] = {
1341 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
1342 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1343 };
1344 static const char *att_names_seg[] = {
1345 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
1346 };
1347 static const char *att_index16[] = {
1348 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
1349 };
1350
1351 static const struct dis386 grps[][8] = {
1352 /* GRP1b */
1353 {
1354 { "addA", Eb, Ib, XX },
1355 { "orA", Eb, Ib, XX },
1356 { "adcA", Eb, Ib, XX },
1357 { "sbbA", Eb, Ib, XX },
1358 { "andA", Eb, Ib, XX },
1359 { "subA", Eb, Ib, XX },
1360 { "xorA", Eb, Ib, XX },
1361 { "cmpA", Eb, Ib, XX }
1362 },
1363 /* GRP1S */
1364 {
1365 { "addQ", Ev, Iv, XX },
1366 { "orQ", Ev, Iv, XX },
1367 { "adcQ", Ev, Iv, XX },
1368 { "sbbQ", Ev, Iv, XX },
1369 { "andQ", Ev, Iv, XX },
1370 { "subQ", Ev, Iv, XX },
1371 { "xorQ", Ev, Iv, XX },
1372 { "cmpQ", Ev, Iv, XX }
1373 },
1374 /* GRP1Ss */
1375 {
1376 { "addQ", Ev, sIb, XX },
1377 { "orQ", Ev, sIb, XX },
1378 { "adcQ", Ev, sIb, XX },
1379 { "sbbQ", Ev, sIb, XX },
1380 { "andQ", Ev, sIb, XX },
1381 { "subQ", Ev, sIb, XX },
1382 { "xorQ", Ev, sIb, XX },
1383 { "cmpQ", Ev, sIb, XX }
1384 },
1385 /* GRP2b */
1386 {
1387 { "rolA", Eb, Ib, XX },
1388 { "rorA", Eb, Ib, XX },
1389 { "rclA", Eb, Ib, XX },
1390 { "rcrA", Eb, Ib, XX },
1391 { "shlA", Eb, Ib, XX },
1392 { "shrA", Eb, Ib, XX },
1393 { "(bad)", XX, XX, XX },
1394 { "sarA", Eb, Ib, XX },
1395 },
1396 /* GRP2S */
1397 {
1398 { "rolQ", Ev, Ib, XX },
1399 { "rorQ", Ev, Ib, XX },
1400 { "rclQ", Ev, Ib, XX },
1401 { "rcrQ", Ev, Ib, XX },
1402 { "shlQ", Ev, Ib, XX },
1403 { "shrQ", Ev, Ib, XX },
1404 { "(bad)", XX, XX, XX },
1405 { "sarQ", Ev, Ib, XX },
1406 },
1407 /* GRP2b_one */
1408 {
1409 { "rolA", Eb, XX, XX },
1410 { "rorA", Eb, XX, XX },
1411 { "rclA", Eb, XX, XX },
1412 { "rcrA", Eb, XX, XX },
1413 { "shlA", Eb, XX, XX },
1414 { "shrA", Eb, XX, XX },
1415 { "(bad)", XX, XX, XX },
1416 { "sarA", Eb, XX, XX },
1417 },
1418 /* GRP2S_one */
1419 {
1420 { "rolQ", Ev, XX, XX },
1421 { "rorQ", Ev, XX, XX },
1422 { "rclQ", Ev, XX, XX },
1423 { "rcrQ", Ev, XX, XX },
1424 { "shlQ", Ev, XX, XX },
1425 { "shrQ", Ev, XX, XX },
1426 { "(bad)", XX, XX, XX},
1427 { "sarQ", Ev, XX, XX },
1428 },
1429 /* GRP2b_cl */
1430 {
1431 { "rolA", Eb, CL, XX },
1432 { "rorA", Eb, CL, XX },
1433 { "rclA", Eb, CL, XX },
1434 { "rcrA", Eb, CL, XX },
1435 { "shlA", Eb, CL, XX },
1436 { "shrA", Eb, CL, XX },
1437 { "(bad)", XX, XX, XX },
1438 { "sarA", Eb, CL, XX },
1439 },
1440 /* GRP2S_cl */
1441 {
1442 { "rolQ", Ev, CL, XX },
1443 { "rorQ", Ev, CL, XX },
1444 { "rclQ", Ev, CL, XX },
1445 { "rcrQ", Ev, CL, XX },
1446 { "shlQ", Ev, CL, XX },
1447 { "shrQ", Ev, CL, XX },
1448 { "(bad)", XX, XX, XX },
1449 { "sarQ", Ev, CL, XX }
1450 },
1451 /* GRP3b */
1452 {
1453 { "testA", Eb, Ib, XX },
1454 { "(bad)", Eb, XX, XX },
1455 { "notA", Eb, XX, XX },
1456 { "negA", Eb, XX, XX },
1457 { "mulA", Eb, XX, XX }, /* Don't print the implicit %al register, */
1458 { "imulA", Eb, XX, XX }, /* to distinguish these opcodes from other */
1459 { "divA", Eb, XX, XX }, /* mul/imul opcodes. Do the same for div */
1460 { "idivA", Eb, XX, XX } /* and idiv for consistency. */
1461 },
1462 /* GRP3S */
1463 {
1464 { "testQ", Ev, Iv, XX },
1465 { "(bad)", XX, XX, XX },
1466 { "notQ", Ev, XX, XX },
1467 { "negQ", Ev, XX, XX },
1468 { "mulQ", Ev, XX, XX }, /* Don't print the implicit register. */
1469 { "imulQ", Ev, XX, XX },
1470 { "divQ", Ev, XX, XX },
1471 { "idivQ", Ev, XX, XX },
1472 },
1473 /* GRP4 */
1474 {
1475 { "incA", Eb, XX, XX },
1476 { "decA", Eb, XX, XX },
1477 { "(bad)", XX, XX, XX },
1478 { "(bad)", XX, XX, XX },
1479 { "(bad)", XX, XX, XX },
1480 { "(bad)", XX, XX, XX },
1481 { "(bad)", XX, XX, XX },
1482 { "(bad)", XX, XX, XX },
1483 },
1484 /* GRP5 */
1485 {
1486 { "incQ", Ev, XX, XX },
1487 { "decQ", Ev, XX, XX },
1488 { "callT", indirEv, XX, XX },
1489 { "lcallT", indirEv, XX, XX },
1490 { "jmpT", indirEv, XX, XX },
1491 { "ljmpT", indirEv, XX, XX },
1492 { "pushU", Ev, XX, XX },
1493 { "(bad)", XX, XX, XX },
1494 },
1495 /* GRP6 */
1496 {
1497 { "sldtQ", Ev, XX, XX },
1498 { "strQ", Ev, XX, XX },
1499 { "lldt", Ew, XX, XX },
1500 { "ltr", Ew, XX, XX },
1501 { "verr", Ew, XX, XX },
1502 { "verw", Ew, XX, XX },
1503 { "(bad)", XX, XX, XX },
1504 { "(bad)", XX, XX, XX }
1505 },
1506 /* GRP7 */
1507 {
1508 { "sgdtQ", M, XX, XX },
1509 { "sidtQ", M, XX, XX },
1510 { "lgdtQ", M, XX, XX },
1511 { "lidtQ", M, XX, XX },
1512 { "smswQ", Ev, XX, XX },
1513 { "(bad)", XX, XX, XX },
1514 { "lmsw", Ew, XX, XX },
1515 { "invlpg", Ew, XX, XX },
1516 },
1517 /* GRP8 */
1518 {
1519 { "(bad)", XX, XX, XX },
1520 { "(bad)", XX, XX, XX },
1521 { "(bad)", XX, XX, XX },
1522 { "(bad)", XX, XX, XX },
1523 { "btQ", Ev, Ib, XX },
1524 { "btsQ", Ev, Ib, XX },
1525 { "btrQ", Ev, Ib, XX },
1526 { "btcQ", Ev, Ib, XX },
1527 },
1528 /* GRP9 */
1529 {
1530 { "(bad)", XX, XX, XX },
1531 { "cmpxchg8b", Ev, XX, XX },
1532 { "(bad)", XX, XX, XX },
1533 { "(bad)", XX, XX, XX },
1534 { "(bad)", XX, XX, XX },
1535 { "(bad)", XX, XX, XX },
1536 { "(bad)", XX, XX, XX },
1537 { "(bad)", XX, XX, XX },
1538 },
1539 /* GRP10 */
1540 {
1541 { "(bad)", XX, XX, XX },
1542 { "(bad)", XX, XX, XX },
1543 { "psrlw", MS, Ib, XX },
1544 { "(bad)", XX, XX, XX },
1545 { "psraw", MS, Ib, XX },
1546 { "(bad)", XX, XX, XX },
1547 { "psllw", MS, Ib, XX },
1548 { "(bad)", XX, XX, XX },
1549 },
1550 /* GRP11 */
1551 {
1552 { "(bad)", XX, XX, XX },
1553 { "(bad)", XX, XX, XX },
1554 { "psrld", MS, Ib, XX },
1555 { "(bad)", XX, XX, XX },
1556 { "psrad", MS, Ib, XX },
1557 { "(bad)", XX, XX, XX },
1558 { "pslld", MS, Ib, XX },
1559 { "(bad)", XX, XX, XX },
1560 },
1561 /* GRP12 */
1562 {
1563 { "(bad)", XX, XX, XX },
1564 { "(bad)", XX, XX, XX },
1565 { "psrlq", MS, Ib, XX },
1566 { "psrldq", MS, Ib, XX },
1567 { "(bad)", XX, XX, XX },
1568 { "(bad)", XX, XX, XX },
1569 { "psllq", MS, Ib, XX },
1570 { "pslldq", MS, Ib, XX },
1571 },
1572 /* GRP13 */
1573 {
1574 { "fxsave", Ev, XX, XX },
1575 { "fxrstor", Ev, XX, XX },
1576 { "ldmxcsr", Ev, XX, XX },
1577 { "stmxcsr", Ev, XX, XX },
1578 { "(bad)", XX, XX, XX },
1579 { "lfence", None, XX, XX },
1580 { "mfence", None, XX, XX },
1581 { "sfence", None, XX, XX },
1582 /* FIXME: the sfence with memory operand is clflush! */
1583 },
1584 /* GRP14 */
1585 {
1586 { "prefetchnta", Ev, XX, XX },
1587 { "prefetcht0", Ev, XX, XX },
1588 { "prefetcht1", Ev, XX, XX },
1589 { "prefetcht2", Ev, XX, XX },
1590 { "(bad)", XX, XX, XX },
1591 { "(bad)", XX, XX, XX },
1592 { "(bad)", XX, XX, XX },
1593 { "(bad)", XX, XX, XX },
1594 },
1595 /* GRPAMD */
1596 {
1597 { "prefetch", Eb, XX, XX },
1598 { "prefetchw", Eb, XX, XX },
1599 { "(bad)", XX, XX, XX },
1600 { "(bad)", XX, XX, XX },
1601 { "(bad)", XX, XX, XX },
1602 { "(bad)", XX, XX, XX },
1603 { "(bad)", XX, XX, XX },
1604 { "(bad)", XX, XX, XX },
1605 }
1606 };
1607
1608 static const struct dis386 prefix_user_table[][4] = {
1609 /* PREGRP0 */
1610 {
1611 { "addps", XM, EX, XX },
1612 { "addss", XM, EX, XX },
1613 { "addpd", XM, EX, XX },
1614 { "addsd", XM, EX, XX },
1615 },
1616 /* PREGRP1 */
1617 {
1618 { "", XM, EX, OPSIMD }, /* See OP_SIMD_SUFFIX. */
1619 { "", XM, EX, OPSIMD },
1620 { "", XM, EX, OPSIMD },
1621 { "", XM, EX, OPSIMD },
1622 },
1623 /* PREGRP2 */
1624 {
1625 { "cvtpi2ps", XM, EM, XX },
1626 { "cvtsi2ssY", XM, Ev, XX },
1627 { "cvtpi2pd", XM, EM, XX },
1628 { "cvtsi2sdY", XM, Ev, XX },
1629 },
1630 /* PREGRP3 */
1631 {
1632 { "cvtps2pi", MX, EX, XX },
1633 { "cvtss2siY", Gv, EX, XX },
1634 { "cvtpd2pi", MX, EX, XX },
1635 { "cvtsd2siY", Gv, EX, XX },
1636 },
1637 /* PREGRP4 */
1638 {
1639 { "cvttps2pi", MX, EX, XX },
1640 { "cvttss2siY", Gv, EX, XX },
1641 { "cvttpd2pi", MX, EX, XX },
1642 { "cvttsd2siY", Gv, EX, XX },
1643 },
1644 /* PREGRP5 */
1645 {
1646 { "divps", XM, EX, XX },
1647 { "divss", XM, EX, XX },
1648 { "divpd", XM, EX, XX },
1649 { "divsd", XM, EX, XX },
1650 },
1651 /* PREGRP6 */
1652 {
1653 { "maxps", XM, EX, XX },
1654 { "maxss", XM, EX, XX },
1655 { "maxpd", XM, EX, XX },
1656 { "maxsd", XM, EX, XX },
1657 },
1658 /* PREGRP7 */
1659 {
1660 { "minps", XM, EX, XX },
1661 { "minss", XM, EX, XX },
1662 { "minpd", XM, EX, XX },
1663 { "minsd", XM, EX, XX },
1664 },
1665 /* PREGRP8 */
1666 {
1667 { "movups", XM, EX, XX },
1668 { "movss", XM, EX, XX },
1669 { "movupd", XM, EX, XX },
1670 { "movsd", XM, EX, XX },
1671 },
1672 /* PREGRP9 */
1673 {
1674 { "movups", EX, XM, XX },
1675 { "movss", EX, XM, XX },
1676 { "movupd", EX, XM, XX },
1677 { "movsd", EX, XM, XX },
1678 },
1679 /* PREGRP10 */
1680 {
1681 { "mulps", XM, EX, XX },
1682 { "mulss", XM, EX, XX },
1683 { "mulpd", XM, EX, XX },
1684 { "mulsd", XM, EX, XX },
1685 },
1686 /* PREGRP11 */
1687 {
1688 { "rcpps", XM, EX, XX },
1689 { "rcpss", XM, EX, XX },
1690 { "(bad)", XM, EX, XX },
1691 { "(bad)", XM, EX, XX },
1692 },
1693 /* PREGRP12 */
1694 {
1695 { "rsqrtps", XM, EX, XX },
1696 { "rsqrtss", XM, EX, XX },
1697 { "(bad)", XM, EX, XX },
1698 { "(bad)", XM, EX, XX },
1699 },
1700 /* PREGRP13 */
1701 {
1702 { "sqrtps", XM, EX, XX },
1703 { "sqrtss", XM, EX, XX },
1704 { "sqrtpd", XM, EX, XX },
1705 { "sqrtsd", XM, EX, XX },
1706 },
1707 /* PREGRP14 */
1708 {
1709 { "subps", XM, EX, XX },
1710 { "subss", XM, EX, XX },
1711 { "subpd", XM, EX, XX },
1712 { "subsd", XM, EX, XX },
1713 },
1714 /* PREGRP15 */
1715 {
1716 { "(bad)", XM, EX, XX },
1717 { "cvtdq2pd", XM, EX, XX },
1718 { "cvttpd2dq", XM, EX, XX },
1719 { "cvtpd2dq", XM, EX, XX },
1720 },
1721 /* PREGRP16 */
1722 {
1723 { "cvtdq2ps", XM, EX, XX },
1724 { "cvttps2dq",XM, EX, XX },
1725 { "cvtps2dq",XM, EX, XX },
1726 { "(bad)", XM, EX, XX },
1727 },
1728 /* PREGRP17 */
1729 {
1730 { "cvtps2pd", XM, EX, XX },
1731 { "cvtss2sd", XM, EX, XX },
1732 { "cvtpd2ps", XM, EX, XX },
1733 { "cvtsd2ss", XM, EX, XX },
1734 },
1735 /* PREGRP18 */
1736 {
1737 { "maskmovq", MX, MS, XX },
1738 { "(bad)", XM, EX, XX },
1739 { "maskmovdqu", XM, EX, XX },
1740 { "(bad)", XM, EX, XX },
1741 },
1742 /* PREGRP19 */
1743 {
1744 { "movq", MX, EM, XX },
1745 { "movdqu", XM, EX, XX },
1746 { "movdqa", XM, EX, XX },
1747 { "(bad)", XM, EX, XX },
1748 },
1749 /* PREGRP20 */
1750 {
1751 { "movq", EM, MX, XX },
1752 { "movdqu", EX, XM, XX },
1753 { "movdqa", EX, XM, XX },
1754 { "(bad)", EX, XM, XX },
1755 },
1756 /* PREGRP21 */
1757 {
1758 { "(bad)", EX, XM, XX },
1759 { "movq2dq", XM, MS, XX },
1760 { "movq", EX, XM, XX },
1761 { "movdq2q", MX, XS, XX },
1762 },
1763 /* PREGRP22 */
1764 {
1765 { "pshufw", MX, EM, Ib },
1766 { "pshufhw", XM, EX, Ib },
1767 { "pshufd", XM, EX, Ib },
1768 { "pshuflw", XM, EX, Ib },
1769 },
1770 /* PREGRP23 */
1771 {
1772 { "movd", Ed, MX, XX },
1773 { "movq", XM, EX, XX },
1774 { "movd", Ed, XM, XX },
1775 { "(bad)", Ed, XM, XX },
1776 },
1777 /* PREGRP24 */
1778 {
1779 { "(bad)", MX, EX, XX },
1780 { "(bad)", XM, EX, XX },
1781 { "punpckhqdq", XM, EX, XX },
1782 { "(bad)", XM, EX, XX },
1783 },
1784 /* PREGRP25 */
1785 {
1786 { "movntq", Ev, MX, XX },
1787 { "(bad)", Ev, XM, XX },
1788 { "movntdq", Ev, XM, XX },
1789 { "(bad)", Ev, XM, XX },
1790 },
1791 /* PREGRP26 */
1792 {
1793 { "(bad)", MX, EX, XX },
1794 { "(bad)", XM, EX, XX },
1795 { "punpcklqdq", XM, EX, XX },
1796 { "(bad)", XM, EX, XX },
1797 },
1798 };
1799
1800 static const struct dis386 x86_64_table[][2] = {
1801 {
1802 { "arpl", Ew, Gw, XX },
1803 { "movs{||lq|xd}", Gv, Ed, XX },
1804 },
1805 };
1806
1807 #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
1808
1809 static void
1810 ckprefix ()
1811 {
1812 int newrex;
1813 rex = 0;
1814 prefixes = 0;
1815 used_prefixes = 0;
1816 rex_used = 0;
1817 while (1)
1818 {
1819 FETCH_DATA (the_info, codep + 1);
1820 newrex = 0;
1821 switch (*codep)
1822 {
1823 /* REX prefixes family. */
1824 case 0x40:
1825 case 0x41:
1826 case 0x42:
1827 case 0x43:
1828 case 0x44:
1829 case 0x45:
1830 case 0x46:
1831 case 0x47:
1832 case 0x48:
1833 case 0x49:
1834 case 0x4a:
1835 case 0x4b:
1836 case 0x4c:
1837 case 0x4d:
1838 case 0x4e:
1839 case 0x4f:
1840 if (mode_64bit)
1841 newrex = *codep;
1842 else
1843 return;
1844 break;
1845 case 0xf3:
1846 prefixes |= PREFIX_REPZ;
1847 break;
1848 case 0xf2:
1849 prefixes |= PREFIX_REPNZ;
1850 break;
1851 case 0xf0:
1852 prefixes |= PREFIX_LOCK;
1853 break;
1854 case 0x2e:
1855 prefixes |= PREFIX_CS;
1856 break;
1857 case 0x36:
1858 prefixes |= PREFIX_SS;
1859 break;
1860 case 0x3e:
1861 prefixes |= PREFIX_DS;
1862 break;
1863 case 0x26:
1864 prefixes |= PREFIX_ES;
1865 break;
1866 case 0x64:
1867 prefixes |= PREFIX_FS;
1868 break;
1869 case 0x65:
1870 prefixes |= PREFIX_GS;
1871 break;
1872 case 0x66:
1873 prefixes |= PREFIX_DATA;
1874 break;
1875 case 0x67:
1876 prefixes |= PREFIX_ADDR;
1877 break;
1878 case FWAIT_OPCODE:
1879 /* fwait is really an instruction. If there are prefixes
1880 before the fwait, they belong to the fwait, *not* to the
1881 following instruction. */
1882 if (prefixes)
1883 {
1884 prefixes |= PREFIX_FWAIT;
1885 codep++;
1886 return;
1887 }
1888 prefixes = PREFIX_FWAIT;
1889 break;
1890 default:
1891 return;
1892 }
1893 /* Rex is ignored when followed by another prefix. */
1894 if (rex)
1895 {
1896 oappend (prefix_name (rex, 0));
1897 oappend (" ");
1898 }
1899 rex = newrex;
1900 codep++;
1901 }
1902 }
1903
1904 /* Return the name of the prefix byte PREF, or NULL if PREF is not a
1905 prefix byte. */
1906
1907 static const char *
1908 prefix_name (pref, sizeflag)
1909 int pref;
1910 int sizeflag;
1911 {
1912 switch (pref)
1913 {
1914 /* REX prefixes family. */
1915 case 0x40:
1916 return "rex";
1917 case 0x41:
1918 return "rexZ";
1919 case 0x42:
1920 return "rexY";
1921 case 0x43:
1922 return "rexYZ";
1923 case 0x44:
1924 return "rexX";
1925 case 0x45:
1926 return "rexXZ";
1927 case 0x46:
1928 return "rexXY";
1929 case 0x47:
1930 return "rexXYZ";
1931 case 0x48:
1932 return "rex64";
1933 case 0x49:
1934 return "rex64Z";
1935 case 0x4a:
1936 return "rex64Y";
1937 case 0x4b:
1938 return "rex64YZ";
1939 case 0x4c:
1940 return "rex64X";
1941 case 0x4d:
1942 return "rex64XZ";
1943 case 0x4e:
1944 return "rex64XY";
1945 case 0x4f:
1946 return "rex64XYZ";
1947 case 0xf3:
1948 return "repz";
1949 case 0xf2:
1950 return "repnz";
1951 case 0xf0:
1952 return "lock";
1953 case 0x2e:
1954 return "cs";
1955 case 0x36:
1956 return "ss";
1957 case 0x3e:
1958 return "ds";
1959 case 0x26:
1960 return "es";
1961 case 0x64:
1962 return "fs";
1963 case 0x65:
1964 return "gs";
1965 case 0x66:
1966 return (sizeflag & DFLAG) ? "data16" : "data32";
1967 case 0x67:
1968 if (mode_64bit)
1969 return (sizeflag & AFLAG) ? "addr32" : "addr64";
1970 else
1971 return ((sizeflag & AFLAG) && !mode_64bit) ? "addr16" : "addr32";
1972 case FWAIT_OPCODE:
1973 return "fwait";
1974 default:
1975 return NULL;
1976 }
1977 }
1978
1979 static char op1out[100], op2out[100], op3out[100];
1980 static int op_ad, op_index[3];
1981 static bfd_vma op_address[3];
1982 static bfd_vma op_riprel[3];
1983 static bfd_vma start_pc;
1984 \f
1985 /*
1986 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
1987 * (see topic "Redundant prefixes" in the "Differences from 8086"
1988 * section of the "Virtual 8086 Mode" chapter.)
1989 * 'pc' should be the address of this instruction, it will
1990 * be used to print the target address if this is a relative jump or call
1991 * The function returns the length of this instruction in bytes.
1992 */
1993
1994 static char intel_syntax;
1995 static char open_char;
1996 static char close_char;
1997 static char separator_char;
1998 static char scale_char;
1999
2000 /* Here for backwards compatibility. When gdb stops using
2001 print_insn_i386_att and print_insn_i386_intel these functions can
2002 disappear, and print_insn_i386 be merged into print_insn. */
2003 int
2004 print_insn_i386_att (pc, info)
2005 bfd_vma pc;
2006 disassemble_info *info;
2007 {
2008 intel_syntax = 0;
2009
2010 return print_insn (pc, info);
2011 }
2012
2013 int
2014 print_insn_i386_intel (pc, info)
2015 bfd_vma pc;
2016 disassemble_info *info;
2017 {
2018 intel_syntax = 1;
2019
2020 return print_insn (pc, info);
2021 }
2022
2023 int
2024 print_insn_i386 (pc, info)
2025 bfd_vma pc;
2026 disassemble_info *info;
2027 {
2028 intel_syntax = -1;
2029
2030 return print_insn (pc, info);
2031 }
2032
2033 static int
2034 print_insn (pc, info)
2035 bfd_vma pc;
2036 disassemble_info *info;
2037 {
2038 const struct dis386 *dp;
2039 int i;
2040 int two_source_ops;
2041 char *first, *second, *third;
2042 int needcomma;
2043 unsigned char uses_SSE_prefix;
2044 int sizeflag;
2045 /*const char *p;*/
2046 struct dis_private priv;
2047
2048 mode_64bit = (info->mach == bfd_mach_x86_64_intel_syntax
2049 || info->mach == bfd_mach_x86_64);
2050
2051 if (intel_syntax == -1)
2052 intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax
2053 || info->mach == bfd_mach_x86_64_intel_syntax);
2054
2055 if (info->mach == bfd_mach_i386_i386
2056 || info->mach == bfd_mach_x86_64
2057 || info->mach == bfd_mach_i386_i386_intel_syntax
2058 || info->mach == bfd_mach_x86_64_intel_syntax)
2059 priv.orig_sizeflag = AFLAG | DFLAG;
2060 else if (info->mach == bfd_mach_i386_i8086)
2061 priv.orig_sizeflag = 0;
2062 else
2063 abort ();
2064
2065 #if 0
2066 for (p = info->disassembler_options; p != NULL; )
2067 {
2068 if (strncmp (p, "x86-64", 6) == 0)
2069 {
2070 mode_64bit = 1;
2071 priv.orig_sizeflag = AFLAG | DFLAG;
2072 }
2073 else if (strncmp (p, "i386", 4) == 0)
2074 {
2075 mode_64bit = 0;
2076 priv.orig_sizeflag = AFLAG | DFLAG;
2077 }
2078 else if (strncmp (p, "i8086", 5) == 0)
2079 {
2080 mode_64bit = 0;
2081 priv.orig_sizeflag = 0;
2082 }
2083 else if (strncmp (p, "intel", 5) == 0)
2084 {
2085 intel_syntax = 1;
2086 }
2087 else if (strncmp (p, "att", 3) == 0)
2088 {
2089 intel_syntax = 0;
2090 }
2091 else if (strncmp (p, "addr", 4) == 0)
2092 {
2093 if (p[4] == '1' && p[5] == '6')
2094 priv.orig_sizeflag &= ~AFLAG;
2095 else if (p[4] == '3' && p[5] == '2')
2096 priv.orig_sizeflag |= AFLAG;
2097 }
2098 else if (strncmp (p, "data", 4) == 0)
2099 {
2100 if (p[4] == '1' && p[5] == '6')
2101 priv.orig_sizeflag &= ~DFLAG;
2102 else if (p[4] == '3' && p[5] == '2')
2103 priv.orig_sizeflag |= DFLAG;
2104 }
2105 else if (strncmp (p, "suffix", 6) == 0)
2106 priv.orig_sizeflag |= SUFFIX_ALWAYS;
2107
2108 p = strchr (p, ',');
2109 if (p != NULL)
2110 p++;
2111 }
2112 #else
2113 mode_64bit = 0;
2114 priv.orig_sizeflag = AFLAG | DFLAG;
2115 /*intel_syntax = 0;*/
2116 #endif
2117
2118 if (intel_syntax)
2119 {
2120 names64 = intel_names64;
2121 names32 = intel_names32;
2122 names16 = intel_names16;
2123 names8 = intel_names8;
2124 names8rex = intel_names8rex;
2125 names_seg = intel_names_seg;
2126 index16 = intel_index16;
2127 open_char = '[';
2128 close_char = ']';
2129 separator_char = '+';
2130 scale_char = '*';
2131 }
2132 else
2133 {
2134 names64 = att_names64;
2135 names32 = att_names32;
2136 names16 = att_names16;
2137 names8 = att_names8;
2138 names8rex = att_names8rex;
2139 names_seg = att_names_seg;
2140 index16 = att_index16;
2141 open_char = '(';
2142 close_char = ')';
2143 separator_char = ',';
2144 scale_char = ',';
2145 }
2146
2147 /* The output looks better if we put 7 bytes on a line, since that
2148 puts most long word instructions on a single line. */
2149 info->bytes_per_line = 7;
2150
2151 info->private_data = (PTR) &priv;
2152 priv.max_fetched = priv.the_buffer;
2153 priv.insn_start = pc;
2154
2155 obuf[0] = 0;
2156 op1out[0] = 0;
2157 op2out[0] = 0;
2158 op3out[0] = 0;
2159
2160 op_index[0] = op_index[1] = op_index[2] = -1;
2161
2162 the_info = info;
2163 start_pc = pc;
2164 start_codep = priv.the_buffer;
2165 codep = priv.the_buffer;
2166
2167 if (setjmp (priv.bailout) != 0)
2168 {
2169 const char *name;
2170
2171 /* Getting here means we tried for data but didn't get it. That
2172 means we have an incomplete instruction of some sort. Just
2173 print the first byte as a prefix or a .byte pseudo-op. */
2174 if (codep > priv.the_buffer)
2175 {
2176 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
2177 if (name != NULL)
2178 (*info->fprintf_func) (info->stream, "%s", name);
2179 else
2180 {
2181 /* Just print the first byte as a .byte instruction. */
2182 (*info->fprintf_func) (info->stream, ".byte 0x%x",
2183 (unsigned int) priv.the_buffer[0]);
2184 }
2185
2186 return 1;
2187 }
2188
2189 return -1;
2190 }
2191
2192 obufp = obuf;
2193 ckprefix ();
2194
2195 insn_codep = codep;
2196 sizeflag = priv.orig_sizeflag;
2197
2198 FETCH_DATA (info, codep + 1);
2199 two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
2200
2201 if ((prefixes & PREFIX_FWAIT)
2202 && ((*codep < 0xd8) || (*codep > 0xdf)))
2203 {
2204 const char *name;
2205
2206 /* fwait not followed by floating point instruction. Print the
2207 first prefix, which is probably fwait itself. */
2208 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
2209 if (name == NULL)
2210 name = INTERNAL_DISASSEMBLER_ERROR;
2211 (*info->fprintf_func) (info->stream, "%s", name);
2212 return 1;
2213 }
2214
2215 if (*codep == 0x0f)
2216 {
2217 FETCH_DATA (info, codep + 2);
2218 dp = &dis386_twobyte[*++codep];
2219 need_modrm = twobyte_has_modrm[*codep];
2220 uses_SSE_prefix = twobyte_uses_SSE_prefix[*codep];
2221 }
2222 else
2223 {
2224 dp = &dis386[*codep];
2225 need_modrm = onebyte_has_modrm[*codep];
2226 uses_SSE_prefix = 0;
2227 }
2228 codep++;
2229
2230 if (!uses_SSE_prefix && (prefixes & PREFIX_REPZ))
2231 {
2232 oappend ("repz ");
2233 used_prefixes |= PREFIX_REPZ;
2234 }
2235 if (!uses_SSE_prefix && (prefixes & PREFIX_REPNZ))
2236 {
2237 oappend ("repnz ");
2238 used_prefixes |= PREFIX_REPNZ;
2239 }
2240 if (prefixes & PREFIX_LOCK)
2241 {
2242 oappend ("lock ");
2243 used_prefixes |= PREFIX_LOCK;
2244 }
2245
2246 if (prefixes & PREFIX_ADDR)
2247 {
2248 sizeflag ^= AFLAG;
2249 if (dp->bytemode3 != loop_jcxz_mode || intel_syntax)
2250 {
2251 if ((sizeflag & AFLAG) || mode_64bit)
2252 oappend ("addr32 ");
2253 else
2254 oappend ("addr16 ");
2255 used_prefixes |= PREFIX_ADDR;
2256 }
2257 }
2258
2259 if (!uses_SSE_prefix && (prefixes & PREFIX_DATA))
2260 {
2261 sizeflag ^= DFLAG;
2262 if (dp->bytemode3 == cond_jump_mode
2263 && dp->bytemode1 == v_mode
2264 && !intel_syntax)
2265 {
2266 if (sizeflag & DFLAG)
2267 oappend ("data32 ");
2268 else
2269 oappend ("data16 ");
2270 used_prefixes |= PREFIX_DATA;
2271 }
2272 }
2273
2274 if (need_modrm)
2275 {
2276 FETCH_DATA (info, codep + 1);
2277 mod = (*codep >> 6) & 3;
2278 reg = (*codep >> 3) & 7;
2279 rm = *codep & 7;
2280 }
2281
2282 if (dp->name == NULL && dp->bytemode1 == FLOATCODE)
2283 {
2284 dofloat (sizeflag);
2285 }
2286 else
2287 {
2288 int index;
2289 if (dp->name == NULL)
2290 {
2291 switch (dp->bytemode1)
2292 {
2293 case USE_GROUPS:
2294 dp = &grps[dp->bytemode2][reg];
2295 break;
2296
2297 case USE_PREFIX_USER_TABLE:
2298 index = 0;
2299 used_prefixes |= (prefixes & PREFIX_REPZ);
2300 if (prefixes & PREFIX_REPZ)
2301 index = 1;
2302 else
2303 {
2304 used_prefixes |= (prefixes & PREFIX_DATA);
2305 if (prefixes & PREFIX_DATA)
2306 index = 2;
2307 else
2308 {
2309 used_prefixes |= (prefixes & PREFIX_REPNZ);
2310 if (prefixes & PREFIX_REPNZ)
2311 index = 3;
2312 }
2313 }
2314 dp = &prefix_user_table[dp->bytemode2][index];
2315 break;
2316
2317 case X86_64_SPECIAL:
2318 dp = &x86_64_table[dp->bytemode2][mode_64bit];
2319 break;
2320
2321 default:
2322 oappend (INTERNAL_DISASSEMBLER_ERROR);
2323 break;
2324 }
2325 }
2326
2327 if (putop (dp->name, sizeflag) == 0)
2328 {
2329 obufp = op1out;
2330 op_ad = 2;
2331 if (dp->op1)
2332 (*dp->op1) (dp->bytemode1, sizeflag);
2333
2334 obufp = op2out;
2335 op_ad = 1;
2336 if (dp->op2)
2337 (*dp->op2) (dp->bytemode2, sizeflag);
2338
2339 obufp = op3out;
2340 op_ad = 0;
2341 if (dp->op3)
2342 (*dp->op3) (dp->bytemode3, sizeflag);
2343 }
2344 }
2345
2346 /* See if any prefixes were not used. If so, print the first one
2347 separately. If we don't do this, we'll wind up printing an
2348 instruction stream which does not precisely correspond to the
2349 bytes we are disassembling. */
2350 if ((prefixes & ~used_prefixes) != 0)
2351 {
2352 const char *name;
2353
2354 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
2355 if (name == NULL)
2356 name = INTERNAL_DISASSEMBLER_ERROR;
2357 (*info->fprintf_func) (info->stream, "%s", name);
2358 return 1;
2359 }
2360 if (rex & ~rex_used)
2361 {
2362 const char *name;
2363 name = prefix_name (rex | 0x40, priv.orig_sizeflag);
2364 if (name == NULL)
2365 name = INTERNAL_DISASSEMBLER_ERROR;
2366 (*info->fprintf_func) (info->stream, "%s ", name);
2367 }
2368
2369 obufp = obuf + strlen (obuf);
2370 for (i = strlen (obuf); i < 6; i++)
2371 oappend (" ");
2372 oappend (" ");
2373 (*info->fprintf_func) (info->stream, "%s", obuf);
2374
2375 /* The enter and bound instructions are printed with operands in the same
2376 order as the intel book; everything else is printed in reverse order. */
2377 if (intel_syntax || two_source_ops)
2378 {
2379 first = op1out;
2380 second = op2out;
2381 third = op3out;
2382 op_ad = op_index[0];
2383 op_index[0] = op_index[2];
2384 op_index[2] = op_ad;
2385 }
2386 else
2387 {
2388 first = op3out;
2389 second = op2out;
2390 third = op1out;
2391 }
2392 needcomma = 0;
2393 if (*first)
2394 {
2395 if (op_index[0] != -1 && !op_riprel[0])
2396 (*info->print_address_func) ((bfd_vma) op_address[op_index[0]], info);
2397 else
2398 (*info->fprintf_func) (info->stream, "%s", first);
2399 needcomma = 1;
2400 }
2401 if (*second)
2402 {
2403 if (needcomma)
2404 (*info->fprintf_func) (info->stream, ",");
2405 if (op_index[1] != -1 && !op_riprel[1])
2406 (*info->print_address_func) ((bfd_vma) op_address[op_index[1]], info);
2407 else
2408 (*info->fprintf_func) (info->stream, "%s", second);
2409 needcomma = 1;
2410 }
2411 if (*third)
2412 {
2413 if (needcomma)
2414 (*info->fprintf_func) (info->stream, ",");
2415 if (op_index[2] != -1 && !op_riprel[2])
2416 (*info->print_address_func) ((bfd_vma) op_address[op_index[2]], info);
2417 else
2418 (*info->fprintf_func) (info->stream, "%s", third);
2419 }
2420 for (i = 0; i < 3; i++)
2421 if (op_index[i] != -1 && op_riprel[i])
2422 {
2423 (*info->fprintf_func) (info->stream, " # ");
2424 (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
2425 + op_address[op_index[i]]), info);
2426 }
2427 return codep - priv.the_buffer;
2428 }
2429
2430 static const char *float_mem[] = {
2431 /* d8 */
2432 "fadd{s||s|}",
2433 "fmul{s||s|}",
2434 "fcom{s||s|}",
2435 "fcomp{s||s|}",
2436 "fsub{s||s|}",
2437 "fsubr{s||s|}",
2438 "fdiv{s||s|}",
2439 "fdivr{s||s|}",
2440 /* d9 */
2441 "fld{s||s|}",
2442 "(bad)",
2443 "fst{s||s|}",
2444 "fstp{s||s|}",
2445 "fldenv",
2446 "fldcw",
2447 "fNstenv",
2448 "fNstcw",
2449 /* da */
2450 "fiadd{l||l|}",
2451 "fimul{l||l|}",
2452 "ficom{l||l|}",
2453 "ficomp{l||l|}",
2454 "fisub{l||l|}",
2455 "fisubr{l||l|}",
2456 "fidiv{l||l|}",
2457 "fidivr{l||l|}",
2458 /* db */
2459 "fild{l||l|}",
2460 "(bad)",
2461 "fist{l||l|}",
2462 "fistp{l||l|}",
2463 "(bad)",
2464 "fld{t||t|}",
2465 "(bad)",
2466 "fstp{t||t|}",
2467 /* dc */
2468 "fadd{l||l|}",
2469 "fmul{l||l|}",
2470 "fcom{l||l|}",
2471 "fcomp{l||l|}",
2472 "fsub{l||l|}",
2473 "fsubr{l||l|}",
2474 "fdiv{l||l|}",
2475 "fdivr{l||l|}",
2476 /* dd */
2477 "fld{l||l|}",
2478 "(bad)",
2479 "fst{l||l|}",
2480 "fstp{l||l|}",
2481 "frstor",
2482 "(bad)",
2483 "fNsave",
2484 "fNstsw",
2485 /* de */
2486 "fiadd",
2487 "fimul",
2488 "ficom",
2489 "ficomp",
2490 "fisub",
2491 "fisubr",
2492 "fidiv",
2493 "fidivr",
2494 /* df */
2495 "fild",
2496 "(bad)",
2497 "fist",
2498 "fistp",
2499 "fbld",
2500 "fild{ll||ll|}",
2501 "fbstp",
2502 "fistpll",
2503 };
2504
2505 #define ST OP_ST, 0
2506 #define STi OP_STi, 0
2507
2508 #define FGRPd9_2 NULL, NULL, 0, NULL, 0, NULL, 0
2509 #define FGRPd9_4 NULL, NULL, 1, NULL, 0, NULL, 0
2510 #define FGRPd9_5 NULL, NULL, 2, NULL, 0, NULL, 0
2511 #define FGRPd9_6 NULL, NULL, 3, NULL, 0, NULL, 0
2512 #define FGRPd9_7 NULL, NULL, 4, NULL, 0, NULL, 0
2513 #define FGRPda_5 NULL, NULL, 5, NULL, 0, NULL, 0
2514 #define FGRPdb_4 NULL, NULL, 6, NULL, 0, NULL, 0
2515 #define FGRPde_3 NULL, NULL, 7, NULL, 0, NULL, 0
2516 #define FGRPdf_4 NULL, NULL, 8, NULL, 0, NULL, 0
2517
2518 static const struct dis386 float_reg[][8] = {
2519 /* d8 */
2520 {
2521 { "fadd", ST, STi, XX },
2522 { "fmul", ST, STi, XX },
2523 { "fcom", STi, XX, XX },
2524 { "fcomp", STi, XX, XX },
2525 { "fsub", ST, STi, XX },
2526 { "fsubr", ST, STi, XX },
2527 { "fdiv", ST, STi, XX },
2528 { "fdivr", ST, STi, XX },
2529 },
2530 /* d9 */
2531 {
2532 { "fld", STi, XX, XX },
2533 { "fxch", STi, XX, XX },
2534 { FGRPd9_2 },
2535 { "(bad)", XX, XX, XX },
2536 { FGRPd9_4 },
2537 { FGRPd9_5 },
2538 { FGRPd9_6 },
2539 { FGRPd9_7 },
2540 },
2541 /* da */
2542 {
2543 { "fcmovb", ST, STi, XX },
2544 { "fcmove", ST, STi, XX },
2545 { "fcmovbe",ST, STi, XX },
2546 { "fcmovu", ST, STi, XX },
2547 { "(bad)", XX, XX, XX },
2548 { FGRPda_5 },
2549 { "(bad)", XX, XX, XX },
2550 { "(bad)", XX, XX, XX },
2551 },
2552 /* db */
2553 {
2554 { "fcmovnb",ST, STi, XX },
2555 { "fcmovne",ST, STi, XX },
2556 { "fcmovnbe",ST, STi, XX },
2557 { "fcmovnu",ST, STi, XX },
2558 { FGRPdb_4 },
2559 { "fucomi", ST, STi, XX },
2560 { "fcomi", ST, STi, XX },
2561 { "(bad)", XX, XX, XX },
2562 },
2563 /* dc */
2564 {
2565 { "fadd", STi, ST, XX },
2566 { "fmul", STi, ST, XX },
2567 { "(bad)", XX, XX, XX },
2568 { "(bad)", XX, XX, XX },
2569 #if UNIXWARE_COMPAT
2570 { "fsub", STi, ST, XX },
2571 { "fsubr", STi, ST, XX },
2572 { "fdiv", STi, ST, XX },
2573 { "fdivr", STi, ST, XX },
2574 #else
2575 { "fsubr", STi, ST, XX },
2576 { "fsub", STi, ST, XX },
2577 { "fdivr", STi, ST, XX },
2578 { "fdiv", STi, ST, XX },
2579 #endif
2580 },
2581 /* dd */
2582 {
2583 { "ffree", STi, XX, XX },
2584 { "(bad)", XX, XX, XX },
2585 { "fst", STi, XX, XX },
2586 { "fstp", STi, XX, XX },
2587 { "fucom", STi, XX, XX },
2588 { "fucomp", STi, XX, XX },
2589 { "(bad)", XX, XX, XX },
2590 { "(bad)", XX, XX, XX },
2591 },
2592 /* de */
2593 {
2594 { "faddp", STi, ST, XX },
2595 { "fmulp", STi, ST, XX },
2596 { "(bad)", XX, XX, XX },
2597 { FGRPde_3 },
2598 #if UNIXWARE_COMPAT
2599 { "fsubp", STi, ST, XX },
2600 { "fsubrp", STi, ST, XX },
2601 { "fdivp", STi, ST, XX },
2602 { "fdivrp", STi, ST, XX },
2603 #else
2604 { "fsubrp", STi, ST, XX },
2605 { "fsubp", STi, ST, XX },
2606 { "fdivrp", STi, ST, XX },
2607 { "fdivp", STi, ST, XX },
2608 #endif
2609 },
2610 /* df */
2611 {
2612 { "ffreep", STi, XX, XX },
2613 { "(bad)", XX, XX, XX },
2614 { "(bad)", XX, XX, XX },
2615 { "(bad)", XX, XX, XX },
2616 { FGRPdf_4 },
2617 { "fucomip",ST, STi, XX },
2618 { "fcomip", ST, STi, XX },
2619 { "(bad)", XX, XX, XX },
2620 },
2621 };
2622
2623 static char *fgrps[][8] = {
2624 /* d9_2 0 */
2625 {
2626 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2627 },
2628
2629 /* d9_4 1 */
2630 {
2631 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
2632 },
2633
2634 /* d9_5 2 */
2635 {
2636 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
2637 },
2638
2639 /* d9_6 3 */
2640 {
2641 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
2642 },
2643
2644 /* d9_7 4 */
2645 {
2646 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
2647 },
2648
2649 /* da_5 5 */
2650 {
2651 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2652 },
2653
2654 /* db_4 6 */
2655 {
2656 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
2657 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
2658 },
2659
2660 /* de_3 7 */
2661 {
2662 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2663 },
2664
2665 /* df_4 8 */
2666 {
2667 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2668 },
2669 };
2670
2671 static void
2672 dofloat (sizeflag)
2673 int sizeflag;
2674 {
2675 const struct dis386 *dp;
2676 unsigned char floatop;
2677
2678 floatop = codep[-1];
2679
2680 if (mod != 3)
2681 {
2682 putop (float_mem[(floatop - 0xd8) * 8 + reg], sizeflag);
2683 obufp = op1out;
2684 if (floatop == 0xdb)
2685 OP_E (x_mode, sizeflag);
2686 else if (floatop == 0xdd)
2687 OP_E (d_mode, sizeflag);
2688 else
2689 OP_E (v_mode, sizeflag);
2690 return;
2691 }
2692 /* Skip mod/rm byte. */
2693 MODRM_CHECK;
2694 codep++;
2695
2696 dp = &float_reg[floatop - 0xd8][reg];
2697 if (dp->name == NULL)
2698 {
2699 putop (fgrps[dp->bytemode1][rm], sizeflag);
2700
2701 /* Instruction fnstsw is only one with strange arg. */
2702 if (floatop == 0xdf && codep[-1] == 0xe0)
2703 strcpy (op1out, names16[0]);
2704 }
2705 else
2706 {
2707 putop (dp->name, sizeflag);
2708
2709 obufp = op1out;
2710 if (dp->op1)
2711 (*dp->op1) (dp->bytemode1, sizeflag);
2712 obufp = op2out;
2713 if (dp->op2)
2714 (*dp->op2) (dp->bytemode2, sizeflag);
2715 }
2716 }
2717
2718 static void
2719 OP_ST (bytemode, sizeflag)
2720 int bytemode ATTRIBUTE_UNUSED;
2721 int sizeflag ATTRIBUTE_UNUSED;
2722 {
2723 oappend ("%st");
2724 }
2725
2726 static void
2727 OP_STi (bytemode, sizeflag)
2728 int bytemode ATTRIBUTE_UNUSED;
2729 int sizeflag ATTRIBUTE_UNUSED;
2730 {
2731 sprintf (scratchbuf, "%%st(%d)", rm);
2732 oappend (scratchbuf + intel_syntax);
2733 }
2734
2735 /* Capital letters in template are macros. */
2736 static int
2737 putop (template, sizeflag)
2738 const char *template;
2739 int sizeflag;
2740 {
2741 const char *p;
2742 int alt;
2743
2744 for (p = template; *p; p++)
2745 {
2746 switch (*p)
2747 {
2748 default:
2749 *obufp++ = *p;
2750 break;
2751 case '{':
2752 alt = 0;
2753 if (intel_syntax)
2754 alt += 1;
2755 if (mode_64bit)
2756 alt += 2;
2757 while (alt != 0)
2758 {
2759 while (*++p != '|')
2760 {
2761 if (*p == '}')
2762 {
2763 /* Alternative not valid. */
2764 strcpy (obuf, "(bad)");
2765 obufp = obuf + 5;
2766 return 1;
2767 }
2768 else if (*p == '\0')
2769 abort ();
2770 }
2771 alt--;
2772 }
2773 break;
2774 case '|':
2775 while (*++p != '}')
2776 {
2777 if (*p == '\0')
2778 abort ();
2779 }
2780 break;
2781 case '}':
2782 break;
2783 case 'A':
2784 if (intel_syntax)
2785 break;
2786 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
2787 *obufp++ = 'b';
2788 break;
2789 case 'B':
2790 if (intel_syntax)
2791 break;
2792 if (sizeflag & SUFFIX_ALWAYS)
2793 *obufp++ = 'b';
2794 break;
2795 case 'E': /* For jcxz/jecxz */
2796 if (mode_64bit)
2797 {
2798 if (sizeflag & AFLAG)
2799 *obufp++ = 'r';
2800 else
2801 *obufp++ = 'e';
2802 }
2803 else
2804 if (sizeflag & AFLAG)
2805 *obufp++ = 'e';
2806 used_prefixes |= (prefixes & PREFIX_ADDR);
2807 break;
2808 case 'F':
2809 if (intel_syntax)
2810 break;
2811 if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS))
2812 {
2813 if (sizeflag & AFLAG)
2814 *obufp++ = mode_64bit ? 'q' : 'l';
2815 else
2816 *obufp++ = mode_64bit ? 'l' : 'w';
2817 used_prefixes |= (prefixes & PREFIX_ADDR);
2818 }
2819 break;
2820 case 'H':
2821 if (intel_syntax)
2822 break;
2823 if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS
2824 || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS)
2825 {
2826 used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS);
2827 *obufp++ = ',';
2828 *obufp++ = 'p';
2829 if (prefixes & PREFIX_DS)
2830 *obufp++ = 't';
2831 else
2832 *obufp++ = 'n';
2833 }
2834 break;
2835 case 'L':
2836 if (intel_syntax)
2837 break;
2838 if (sizeflag & SUFFIX_ALWAYS)
2839 *obufp++ = 'l';
2840 break;
2841 case 'N':
2842 if ((prefixes & PREFIX_FWAIT) == 0)
2843 *obufp++ = 'n';
2844 else
2845 used_prefixes |= PREFIX_FWAIT;
2846 break;
2847 case 'O':
2848 USED_REX (REX_MODE64);
2849 if (rex