3 * COPYRIGHT: See COPYING in the top level directory
4 * PROJECT: ReactOS kernel
5 * FILE: ntoskrnl/dbg/i386/i386-dis.c
6 * PURPOSE: No purpose listed.
8 * PROGRAMMERS: No programmer listed.
13 /* ReactOS compatibility stuff. */
16 typedef enum bfd_flavour
18 bfd_target_unknown_flavour
,
20 typedef enum bfd_architecture
24 typedef unsigned int bfd_vma
;
25 typedef unsigned char bfd_byte
;
26 enum bfd_endian
{ BFD_ENDIAN_BIG
, BIG_ENDIAN_LITTLE
, BFD_ENDIAN_UNKNOWN
};
29 typedef signed int bfd_signed_vma
;
31 #define bfd_mach_x86_64_intel_syntax 0
32 #define bfd_mach_x86_64 1
33 #define bfd_mach_i386_i386_intel_syntax 2
34 #define bfd_mach_i386_i386 3
35 #define bfd_mach_i386_i8086 4
36 #define abort() __asm__("int $3\n\t")
38 #define ATTRIBUTE_UNUSED
39 extern char* strcpy(char *dest
, const char *src
);
40 extern unsigned int strlen(const char *s
);
41 extern int sprintf(char *str
, const char *format
, ...);
42 extern int vsprintf(char *buf
, const char *format
, va_list ap
);
43 extern void* memcpy(void *dest
, const void *src
, unsigned int length
);
44 extern void DbgPrint(const char *format
, ...);
45 #define sprintf_vma(BUF, VMA) sprintf(BUF, "0x%X", VMA)
46 #define _setjmp setjmp
47 extern unsigned int KdbSymPrintAddress(void* address
);
48 struct disassemble_info
;
50 extern long KdbpSafeReadMemory(void*, void*, unsigned int);
54 print_insn_i386 (bfd_vma pc
, struct disassemble_info
*info
);
57 KdbpPrintDisasm(void* Ignored
, const char* fmt
, ...)
60 static char buffer
[256];
64 ret
= vsprintf(buffer
, fmt
, ap
);
71 KdbpNopPrintDisasm(void* Ignored
, const char* fmt
, ...)
77 KdbpReadMemory(unsigned int Addr
, unsigned char* Data
, unsigned int Length
,
78 struct disassemble_info
* Ignored
)
80 return KdbpSafeReadMemory(Data
, (void *)Addr
, Length
); /* 0 means no error */
84 KdbpMemoryError(int Status
, unsigned int Addr
,
85 struct disassemble_info
* Ignored
)
90 KdbpPrintAddressInCode(unsigned int Addr
, struct disassemble_info
* Ignored
)
92 if (!KdbSymPrintAddress((void*)Addr
))
94 DbgPrint("<%08x>", Addr
);
99 KdbpNopPrintAddress(unsigned int Addr
, struct disassemble_info
* Ignored
)
106 KdbpGetInstLength(unsigned int Address
)
108 disassemble_info info
;
110 info
.fprintf_func
= KdbpNopPrintDisasm
;
112 info
.application_data
= NULL
;
113 info
.flavour
= bfd_target_unknown_flavour
;
114 info
.arch
= bfd_arch_i386
;
115 info
.mach
= bfd_mach_i386_i386
;
118 info
.read_memory_func
= KdbpReadMemory
;
119 info
.memory_error_func
= KdbpMemoryError
;
120 info
.print_address_func
= KdbpNopPrintAddress
;
121 info
.symbol_at_address_func
= NULL
;
123 info
.buffer_vma
= info
.buffer_length
= 0;
124 info
.bytes_per_chunk
= 0;
125 info
.display_endian
= BIG_ENDIAN_LITTLE
;
126 info
.disassembler_options
= NULL
;
128 return(print_insn_i386(Address
, &info
));
132 KdbpDisassemble(unsigned int Address
, unsigned long IntelSyntax
)
134 disassemble_info info
;
136 info
.fprintf_func
= KdbpPrintDisasm
;
138 info
.application_data
= NULL
;
139 info
.flavour
= bfd_target_unknown_flavour
;
140 info
.arch
= bfd_arch_i386
;
141 info
.mach
= IntelSyntax
? bfd_mach_i386_i386_intel_syntax
: bfd_mach_i386_i386
;
144 info
.read_memory_func
= KdbpReadMemory
;
145 info
.memory_error_func
= KdbpMemoryError
;
146 info
.print_address_func
= KdbpPrintAddressInCode
;
147 info
.symbol_at_address_func
= NULL
;
149 info
.buffer_vma
= info
.buffer_length
= 0;
150 info
.bytes_per_chunk
= 0;
151 info
.display_endian
= BIG_ENDIAN_LITTLE
;
152 info
.disassembler_options
= NULL
;
154 return(print_insn_i386(Address
, &info
));
157 /* Print i386 instructions for GDB, the GNU debugger.
158 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
160 Free Software Foundation, Inc.
162 This file is part of GDB.
164 This program is free software; you can redistribute it and/or modify
165 it under the terms of the GNU General Public License as published by
166 the Free Software Foundation; either version 2 of the License, or
167 (at your option) any later version.
169 This program is distributed in the hope that it will be useful,
170 but WITHOUT ANY WARRANTY; without even the implied warranty of
171 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
172 GNU General Public License for more details.
174 You should have received a copy of the GNU General Public License
175 along with this program; if not, write to the Free Software
176 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
179 * 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
181 * modified by John Hassey (hassey@dg-rtp.dg.com)
182 * x86-64 support added by Jan Hubicka (jh@suse.cz)
186 * The main tables describing the instructions is essentially a copy
187 * of the "Opcode Map" chapter (Appendix A) of the Intel 80386
188 * Programmers Manual. Usually, there is a capital letter, followed
189 * by a small letter. The capital letter tell the addressing mode,
190 * and the small letter tells about the operand size. Refer to
191 * the Intel manual for details.
204 #ifndef UNIXWARE_COMPAT
205 /* Set non-zero for broken, compatible instructions. Set to zero for
206 non-broken opcodes. */
207 #define UNIXWARE_COMPAT 1
210 static int fetch_data
PARAMS ((struct disassemble_info
*, bfd_byte
*));
211 static void ckprefix
PARAMS ((void));
212 static const char *prefix_name
PARAMS ((int, int));
213 static int print_insn
PARAMS ((bfd_vma
, disassemble_info
*));
214 static void dofloat
PARAMS ((int));
215 static void OP_ST
PARAMS ((int, int));
216 static void OP_STi
PARAMS ((int, int));
217 static int putop
PARAMS ((const char *, int));
218 static void oappend
PARAMS ((const char *));
219 static void append_seg
PARAMS ((void));
220 static void OP_indirE
PARAMS ((int, int));
221 static void print_operand_value
PARAMS ((char *, int, bfd_vma
));
222 static void OP_E
PARAMS ((int, int));
223 static void OP_G
PARAMS ((int, int));
224 static bfd_vma get64
PARAMS ((void));
225 static bfd_signed_vma get32
PARAMS ((void));
226 static bfd_signed_vma get32s
PARAMS ((void));
227 static int get16
PARAMS ((void));
228 static void set_op
PARAMS ((bfd_vma
, int));
229 static void OP_REG
PARAMS ((int, int));
230 static void OP_IMREG
PARAMS ((int, int));
231 static void OP_I
PARAMS ((int, int));
232 static void OP_I64
PARAMS ((int, int));
233 static void OP_sI
PARAMS ((int, int));
234 static void OP_J
PARAMS ((int, int));
235 static void OP_SEG
PARAMS ((int, int));
236 static void OP_DIR
PARAMS ((int, int));
237 static void OP_OFF
PARAMS ((int, int));
238 static void OP_OFF64
PARAMS ((int, int));
239 static void ptr_reg
PARAMS ((int, int));
240 static void OP_ESreg
PARAMS ((int, int));
241 static void OP_DSreg
PARAMS ((int, int));
242 static void OP_C
PARAMS ((int, int));
243 static void OP_D
PARAMS ((int, int));
244 static void OP_T
PARAMS ((int, int));
245 static void OP_Rd
PARAMS ((int, int));
246 static void OP_MMX
PARAMS ((int, int));
247 static void OP_XMM
PARAMS ((int, int));
248 static void OP_EM
PARAMS ((int, int));
249 static void OP_EX
PARAMS ((int, int));
250 static void OP_MS
PARAMS ((int, int));
251 static void OP_XS
PARAMS ((int, int));
252 static void OP_3DNowSuffix
PARAMS ((int, int));
253 static void OP_SIMD_Suffix
PARAMS ((int, int));
254 static void SIMD_Fixup
PARAMS ((int, int));
255 static void BadOp
PARAMS ((void));
258 /* Points to first byte not fetched. */
259 bfd_byte
*max_fetched
;
260 bfd_byte the_buffer
[MAXLEN
];
266 /* The opcode for the fwait instruction, which we treat as a prefix
268 #define FWAIT_OPCODE (0x9b)
270 /* Set to 1 for 64bit mode disassembly. */
271 static int mode_64bit
;
273 /* Flags for the prefixes for the current instruction. See below. */
276 /* REX prefix the current instruction. See below. */
278 /* Bits of REX we've already used. */
284 /* Mark parts used in the REX prefix. When we are testing for
285 empty prefix (for 8bit register REX extension), just mask it
286 out. Otherwise test for REX bit is excuse for existence of REX
287 only in case value is nonzero. */
288 #define USED_REX(value) \
291 rex_used |= (rex & value) ? (value) | 0x40 : 0; \
296 /* Flags for prefixes which we somehow handled when printing the
297 current instruction. */
298 static int used_prefixes
;
300 /* Flags stored in PREFIXES. */
301 #define PREFIX_REPZ 1
302 #define PREFIX_REPNZ 2
303 #define PREFIX_LOCK 4
305 #define PREFIX_SS 0x10
306 #define PREFIX_DS 0x20
307 #define PREFIX_ES 0x40
308 #define PREFIX_FS 0x80
309 #define PREFIX_GS 0x100
310 #define PREFIX_DATA 0x200
311 #define PREFIX_ADDR 0x400
312 #define PREFIX_FWAIT 0x800
314 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
315 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
317 #define FETCH_DATA(info, addr) \
318 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
319 ? 1 : fetch_data ((info), (addr)))
322 fetch_data (info
, addr
)
323 struct disassemble_info
*info
;
327 struct dis_private
*priv
= (struct dis_private
*) info
->private_data
;
328 bfd_vma start
= priv
->insn_start
+ (priv
->max_fetched
- priv
->the_buffer
);
330 status
= (*info
->read_memory_func
) (start
,
332 addr
- priv
->max_fetched
,
336 /* If we did manage to read at least one byte, then
337 print_insn_i386 will do something sensible. Otherwise, print
338 an error. We do that here because this is where we know
340 if (priv
->max_fetched
== priv
->the_buffer
)
341 (*info
->memory_error_func
) (status
, start
, info
);
342 longjmp (priv
->bailout
, 1);
345 priv
->max_fetched
= addr
;
351 #define Eb OP_E, b_mode
352 #define Ev OP_E, v_mode
353 #define Ed OP_E, d_mode
354 #define indirEb OP_indirE, b_mode
355 #define indirEv OP_indirE, v_mode
356 #define Ew OP_E, w_mode
357 #define Ma OP_E, v_mode
358 #define M OP_E, 0 /* lea, lgdt, etc. */
359 #define Mp OP_E, 0 /* 32 or 48 bit memory operand for LDS, LES etc */
360 #define Gb OP_G, b_mode
361 #define Gv OP_G, v_mode
362 #define Gd OP_G, d_mode
363 #define Gw OP_G, w_mode
364 #define Rd OP_Rd, d_mode
365 #define Rm OP_Rd, m_mode
366 #define Ib OP_I, b_mode
367 #define sIb OP_sI, b_mode /* sign extened byte */
368 #define Iv OP_I, v_mode
369 #define Iq OP_I, q_mode
370 #define Iv64 OP_I64, v_mode
371 #define Iw OP_I, w_mode
372 #define Jb OP_J, b_mode
373 #define Jv OP_J, v_mode
374 #define Cm OP_C, m_mode
375 #define Dm OP_D, m_mode
376 #define Td OP_T, d_mode
378 #define RMeAX OP_REG, eAX_reg
379 #define RMeBX OP_REG, eBX_reg
380 #define RMeCX OP_REG, eCX_reg
381 #define RMeDX OP_REG, eDX_reg
382 #define RMeSP OP_REG, eSP_reg
383 #define RMeBP OP_REG, eBP_reg
384 #define RMeSI OP_REG, eSI_reg
385 #define RMeDI OP_REG, eDI_reg
386 #define RMrAX OP_REG, rAX_reg
387 #define RMrBX OP_REG, rBX_reg
388 #define RMrCX OP_REG, rCX_reg
389 #define RMrDX OP_REG, rDX_reg
390 #define RMrSP OP_REG, rSP_reg
391 #define RMrBP OP_REG, rBP_reg
392 #define RMrSI OP_REG, rSI_reg
393 #define RMrDI OP_REG, rDI_reg
394 #define RMAL OP_REG, al_reg
395 #define RMAL OP_REG, al_reg
396 #define RMCL OP_REG, cl_reg
397 #define RMDL OP_REG, dl_reg
398 #define RMBL OP_REG, bl_reg
399 #define RMAH OP_REG, ah_reg
400 #define RMCH OP_REG, ch_reg
401 #define RMDH OP_REG, dh_reg
402 #define RMBH OP_REG, bh_reg
403 #define RMAX OP_REG, ax_reg
404 #define RMDX OP_REG, dx_reg
406 #define eAX OP_IMREG, eAX_reg
407 #define eBX OP_IMREG, eBX_reg
408 #define eCX OP_IMREG, eCX_reg
409 #define eDX OP_IMREG, eDX_reg
410 #define eSP OP_IMREG, eSP_reg
411 #define eBP OP_IMREG, eBP_reg
412 #define eSI OP_IMREG, eSI_reg
413 #define eDI OP_IMREG, eDI_reg
414 #define AL OP_IMREG, al_reg
415 #define AL OP_IMREG, al_reg
416 #define CL OP_IMREG, cl_reg
417 #define DL OP_IMREG, dl_reg
418 #define BL OP_IMREG, bl_reg
419 #define AH OP_IMREG, ah_reg
420 #define CH OP_IMREG, ch_reg
421 #define DH OP_IMREG, dh_reg
422 #define BH OP_IMREG, bh_reg
423 #define AX OP_IMREG, ax_reg
424 #define DX OP_IMREG, dx_reg
425 #define indirDX OP_IMREG, indir_dx_reg
427 #define Sw OP_SEG, w_mode
429 #define Ob OP_OFF, b_mode
430 #define Ob64 OP_OFF64, b_mode
431 #define Ov OP_OFF, v_mode
432 #define Ov64 OP_OFF64, v_mode
433 #define Xb OP_DSreg, eSI_reg
434 #define Xv OP_DSreg, eSI_reg
435 #define Yb OP_ESreg, eDI_reg
436 #define Yv OP_ESreg, eDI_reg
437 #define DSBX OP_DSreg, eBX_reg
439 #define es OP_REG, es_reg
440 #define ss OP_REG, ss_reg
441 #define cs OP_REG, cs_reg
442 #define ds OP_REG, ds_reg
443 #define fs OP_REG, fs_reg
444 #define gs OP_REG, gs_reg
448 #define EM OP_EM, v_mode
449 #define EX OP_EX, v_mode
450 #define MS OP_MS, v_mode
451 #define XS OP_XS, v_mode
453 #define OPSUF OP_3DNowSuffix, 0
454 #define OPSIMD OP_SIMD_Suffix, 0
456 #define cond_jump_flag NULL, cond_jump_mode
457 #define loop_jcxz_flag NULL, loop_jcxz_mode
459 /* bits in sizeflag */
460 #define SUFFIX_ALWAYS 4
464 #define b_mode 1 /* byte operand */
465 #define v_mode 2 /* operand size depends on prefixes */
466 #define w_mode 3 /* word operand */
467 #define d_mode 4 /* double word operand */
468 #define q_mode 5 /* quad word operand */
470 #define m_mode 7 /* d_mode in 32bit, q_mode in 64bit mode. */
471 #define cond_jump_mode 8
472 #define loop_jcxz_mode 9
517 #define indir_dx_reg 150
521 #define USE_PREFIX_USER_TABLE 3
522 #define X86_64_SPECIAL 4
524 #define FLOAT NULL, NULL, FLOATCODE, NULL, 0, NULL, 0
526 #define GRP1b NULL, NULL, USE_GROUPS, NULL, 0, NULL, 0
527 #define GRP1S NULL, NULL, USE_GROUPS, NULL, 1, NULL, 0
528 #define GRP1Ss NULL, NULL, USE_GROUPS, NULL, 2, NULL, 0
529 #define GRP2b NULL, NULL, USE_GROUPS, NULL, 3, NULL, 0
530 #define GRP2S NULL, NULL, USE_GROUPS, NULL, 4, NULL, 0
531 #define GRP2b_one NULL, NULL, USE_GROUPS, NULL, 5, NULL, 0
532 #define GRP2S_one NULL, NULL, USE_GROUPS, NULL, 6, NULL, 0
533 #define GRP2b_cl NULL, NULL, USE_GROUPS, NULL, 7, NULL, 0
534 #define GRP2S_cl NULL, NULL, USE_GROUPS, NULL, 8, NULL, 0
535 #define GRP3b NULL, NULL, USE_GROUPS, NULL, 9, NULL, 0
536 #define GRP3S NULL, NULL, USE_GROUPS, NULL, 10, NULL, 0
537 #define GRP4 NULL, NULL, USE_GROUPS, NULL, 11, NULL, 0
538 #define GRP5 NULL, NULL, USE_GROUPS, NULL, 12, NULL, 0
539 #define GRP6 NULL, NULL, USE_GROUPS, NULL, 13, NULL, 0
540 #define GRP7 NULL, NULL, USE_GROUPS, NULL, 14, NULL, 0
541 #define GRP8 NULL, NULL, USE_GROUPS, NULL, 15, NULL, 0
542 #define GRP9 NULL, NULL, USE_GROUPS, NULL, 16, NULL, 0
543 #define GRP10 NULL, NULL, USE_GROUPS, NULL, 17, NULL, 0
544 #define GRP11 NULL, NULL, USE_GROUPS, NULL, 18, NULL, 0
545 #define GRP12 NULL, NULL, USE_GROUPS, NULL, 19, NULL, 0
546 #define GRP13 NULL, NULL, USE_GROUPS, NULL, 20, NULL, 0
547 #define GRP14 NULL, NULL, USE_GROUPS, NULL, 21, NULL, 0
548 #define GRPAMD NULL, NULL, USE_GROUPS, NULL, 22, NULL, 0
550 #define PREGRP0 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 0, NULL, 0
551 #define PREGRP1 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 1, NULL, 0
552 #define PREGRP2 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 2, NULL, 0
553 #define PREGRP3 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 3, NULL, 0
554 #define PREGRP4 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 4, NULL, 0
555 #define PREGRP5 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 5, NULL, 0
556 #define PREGRP6 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 6, NULL, 0
557 #define PREGRP7 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 7, NULL, 0
558 #define PREGRP8 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 8, NULL, 0
559 #define PREGRP9 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 9, NULL, 0
560 #define PREGRP10 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 10, NULL, 0
561 #define PREGRP11 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 11, NULL, 0
562 #define PREGRP12 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 12, NULL, 0
563 #define PREGRP13 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 13, NULL, 0
564 #define PREGRP14 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 14, NULL, 0
565 #define PREGRP15 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 15, NULL, 0
566 #define PREGRP16 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 16, NULL, 0
567 #define PREGRP17 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 17, NULL, 0
568 #define PREGRP18 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 18, NULL, 0
569 #define PREGRP19 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 19, NULL, 0
570 #define PREGRP20 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 20, NULL, 0
571 #define PREGRP21 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 21, NULL, 0
572 #define PREGRP22 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 22, NULL, 0
573 #define PREGRP23 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 23, NULL, 0
574 #define PREGRP24 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 24, NULL, 0
575 #define PREGRP25 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 25, NULL, 0
576 #define PREGRP26 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 26, NULL, 0
578 #define X86_64_0 NULL, NULL, X86_64_SPECIAL, NULL, 0, NULL, 0
580 typedef void (*op_rtn
) PARAMS ((int bytemode
, int sizeflag
));
592 /* Upper case letters in the instruction names here are macros.
593 'A' => print 'b' if no register operands or suffix_always is true
594 'B' => print 'b' if suffix_always is true
595 'E' => print 'e' if 32-bit form of jcxz
596 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
597 'H' => print ",pt" or ",pn" branch hint
598 'L' => print 'l' if suffix_always is true
599 'N' => print 'n' if instruction has no wait "prefix"
600 'O' => print 'd', or 'o'
601 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
602 . or suffix_always is true. print 'q' if rex prefix is present.
603 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
605 'R' => print 'w', 'l' or 'q' ("wd" or "dq" in intel mode)
606 'S' => print 'w', 'l' or 'q' if suffix_always is true
607 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
608 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
609 'X' => print 's', 'd' depending on data16 prefix (for XMM)
610 'W' => print 'b' or 'w' ("w" or "de" in intel mode)
611 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
613 Many of the above letters print nothing in Intel mode. See "putop"
616 Braces '{' and '}', and vertical bars '|', indicate alternative
617 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
618 modes. In cases where there are only two alternatives, the X86_64
619 instruction is reserved, and "(bad)" is printed.
622 static const struct dis386 dis386
[] = {
624 { "addB", Eb
, Gb
, XX
},
625 { "addS", Ev
, Gv
, XX
},
626 { "addB", Gb
, Eb
, XX
},
627 { "addS", Gv
, Ev
, XX
},
628 { "addB", AL
, Ib
, XX
},
629 { "addS", eAX
, Iv
, XX
},
630 { "push{T|}", es
, XX
, XX
},
631 { "pop{T|}", es
, XX
, XX
},
633 { "orB", Eb
, Gb
, XX
},
634 { "orS", Ev
, Gv
, XX
},
635 { "orB", Gb
, Eb
, XX
},
636 { "orS", Gv
, Ev
, XX
},
637 { "orB", AL
, Ib
, XX
},
638 { "orS", eAX
, Iv
, XX
},
639 { "push{T|}", cs
, XX
, XX
},
640 { "(bad)", XX
, XX
, XX
}, /* 0x0f extended opcode escape */
642 { "adcB", Eb
, Gb
, XX
},
643 { "adcS", Ev
, Gv
, XX
},
644 { "adcB", Gb
, Eb
, XX
},
645 { "adcS", Gv
, Ev
, XX
},
646 { "adcB", AL
, Ib
, XX
},
647 { "adcS", eAX
, Iv
, XX
},
648 { "push{T|}", ss
, XX
, XX
},
649 { "popT|}", ss
, XX
, XX
},
651 { "sbbB", Eb
, Gb
, XX
},
652 { "sbbS", Ev
, Gv
, XX
},
653 { "sbbB", Gb
, Eb
, XX
},
654 { "sbbS", Gv
, Ev
, XX
},
655 { "sbbB", AL
, Ib
, XX
},
656 { "sbbS", eAX
, Iv
, XX
},
657 { "push{T|}", ds
, XX
, XX
},
658 { "pop{T|}", ds
, XX
, XX
},
660 { "andB", Eb
, Gb
, XX
},
661 { "andS", Ev
, Gv
, XX
},
662 { "andB", Gb
, Eb
, XX
},
663 { "andS", Gv
, Ev
, XX
},
664 { "andB", AL
, Ib
, XX
},
665 { "andS", eAX
, Iv
, XX
},
666 { "(bad)", XX
, XX
, XX
}, /* SEG ES prefix */
667 { "daa{|}", XX
, XX
, XX
},
669 { "subB", Eb
, Gb
, XX
},
670 { "subS", Ev
, Gv
, XX
},
671 { "subB", Gb
, Eb
, XX
},
672 { "subS", Gv
, Ev
, XX
},
673 { "subB", AL
, Ib
, XX
},
674 { "subS", eAX
, Iv
, XX
},
675 { "(bad)", XX
, XX
, XX
}, /* SEG CS prefix */
676 { "das{|}", XX
, XX
, XX
},
678 { "xorB", Eb
, Gb
, XX
},
679 { "xorS", Ev
, Gv
, XX
},
680 { "xorB", Gb
, Eb
, XX
},
681 { "xorS", Gv
, Ev
, XX
},
682 { "xorB", AL
, Ib
, XX
},
683 { "xorS", eAX
, Iv
, XX
},
684 { "(bad)", XX
, XX
, XX
}, /* SEG SS prefix */
685 { "aaa{|}", XX
, XX
, XX
},
687 { "cmpB", Eb
, Gb
, XX
},
688 { "cmpS", Ev
, Gv
, XX
},
689 { "cmpB", Gb
, Eb
, XX
},
690 { "cmpS", Gv
, Ev
, XX
},
691 { "cmpB", AL
, Ib
, XX
},
692 { "cmpS", eAX
, Iv
, XX
},
693 { "(bad)", XX
, XX
, XX
}, /* SEG DS prefix */
694 { "aas{|}", XX
, XX
, XX
},
696 { "inc{S|}", RMeAX
, XX
, XX
},
697 { "inc{S|}", RMeCX
, XX
, XX
},
698 { "inc{S|}", RMeDX
, XX
, XX
},
699 { "inc{S|}", RMeBX
, XX
, XX
},
700 { "inc{S|}", RMeSP
, XX
, XX
},
701 { "inc{S|}", RMeBP
, XX
, XX
},
702 { "inc{S|}", RMeSI
, XX
, XX
},
703 { "inc{S|}", RMeDI
, XX
, XX
},
705 { "dec{S|}", RMeAX
, XX
, XX
},
706 { "dec{S|}", RMeCX
, XX
, XX
},
707 { "dec{S|}", RMeDX
, XX
, XX
},
708 { "dec{S|}", RMeBX
, XX
, XX
},
709 { "dec{S|}", RMeSP
, XX
, XX
},
710 { "dec{S|}", RMeBP
, XX
, XX
},
711 { "dec{S|}", RMeSI
, XX
, XX
},
712 { "dec{S|}", RMeDI
, XX
, XX
},
714 { "pushS", RMrAX
, XX
, XX
},
715 { "pushS", RMrCX
, XX
, XX
},
716 { "pushS", RMrDX
, XX
, XX
},
717 { "pushS", RMrBX
, XX
, XX
},
718 { "pushS", RMrSP
, XX
, XX
},
719 { "pushS", RMrBP
, XX
, XX
},
720 { "pushS", RMrSI
, XX
, XX
},
721 { "pushS", RMrDI
, XX
, XX
},
723 { "popS", RMrAX
, XX
, XX
},
724 { "popS", RMrCX
, XX
, XX
},
725 { "popS", RMrDX
, XX
, XX
},
726 { "popS", RMrBX
, XX
, XX
},
727 { "popS", RMrSP
, XX
, XX
},
728 { "popS", RMrBP
, XX
, XX
},
729 { "popS", RMrSI
, XX
, XX
},
730 { "popS", RMrDI
, XX
, XX
},
732 { "pusha{P|}", XX
, XX
, XX
},
733 { "popa{P|}", XX
, XX
, XX
},
734 { "bound{S|}", Gv
, Ma
, XX
},
736 { "(bad)", XX
, XX
, XX
}, /* seg fs */
737 { "(bad)", XX
, XX
, XX
}, /* seg gs */
738 { "(bad)", XX
, XX
, XX
}, /* op size prefix */
739 { "(bad)", XX
, XX
, XX
}, /* adr size prefix */
741 { "pushT", Iq
, XX
, XX
},
742 { "imulS", Gv
, Ev
, Iv
},
743 { "pushT", sIb
, XX
, XX
},
744 { "imulS", Gv
, Ev
, sIb
},
745 { "ins{b||b|}", Yb
, indirDX
, XX
},
746 { "ins{R||R|}", Yv
, indirDX
, XX
},
747 { "outs{b||b|}", indirDX
, Xb
, XX
},
748 { "outs{R||R|}", indirDX
, Xv
, XX
},
750 { "joH", Jb
, XX
, cond_jump_flag
},
751 { "jnoH", Jb
, XX
, cond_jump_flag
},
752 { "jbH", Jb
, XX
, cond_jump_flag
},
753 { "jaeH", Jb
, XX
, cond_jump_flag
},
754 { "jeH", Jb
, XX
, cond_jump_flag
},
755 { "jneH", Jb
, XX
, cond_jump_flag
},
756 { "jbeH", Jb
, XX
, cond_jump_flag
},
757 { "jaH", Jb
, XX
, cond_jump_flag
},
759 { "jsH", Jb
, XX
, cond_jump_flag
},
760 { "jnsH", Jb
, XX
, cond_jump_flag
},
761 { "jpH", Jb
, XX
, cond_jump_flag
},
762 { "jnpH", Jb
, XX
, cond_jump_flag
},
763 { "jlH", Jb
, XX
, cond_jump_flag
},
764 { "jgeH", Jb
, XX
, cond_jump_flag
},
765 { "jleH", Jb
, XX
, cond_jump_flag
},
766 { "jgH", Jb
, XX
, cond_jump_flag
},
770 { "(bad)", XX
, XX
, XX
},
772 { "testB", Eb
, Gb
, XX
},
773 { "testS", Ev
, Gv
, XX
},
774 { "xchgB", Eb
, Gb
, XX
},
775 { "xchgS", Ev
, Gv
, XX
},
777 { "movB", Eb
, Gb
, XX
},
778 { "movS", Ev
, Gv
, XX
},
779 { "movB", Gb
, Eb
, XX
},
780 { "movS", Gv
, Ev
, XX
},
781 { "movQ", Ev
, Sw
, XX
},
782 { "leaS", Gv
, M
, XX
},
783 { "movQ", Sw
, Ev
, XX
},
784 { "popU", Ev
, XX
, XX
},
786 { "nop", XX
, XX
, XX
},
787 /* FIXME: NOP with REPz prefix is called PAUSE. */
788 { "xchgS", RMeCX
, eAX
, XX
},
789 { "xchgS", RMeDX
, eAX
, XX
},
790 { "xchgS", RMeBX
, eAX
, XX
},
791 { "xchgS", RMeSP
, eAX
, XX
},
792 { "xchgS", RMeBP
, eAX
, XX
},
793 { "xchgS", RMeSI
, eAX
, XX
},
794 { "xchgS", RMeDI
, eAX
, XX
},
796 { "cW{tR||tR|}", XX
, XX
, XX
},
797 { "cR{tO||tO|}", XX
, XX
, XX
},
798 { "lcall{T|}", Ap
, XX
, XX
},
799 { "(bad)", XX
, XX
, XX
}, /* fwait */
800 { "pushfT", XX
, XX
, XX
},
801 { "popfT", XX
, XX
, XX
},
802 { "sahf{|}", XX
, XX
, XX
},
803 { "lahf{|}", XX
, XX
, XX
},
805 { "movB", AL
, Ob64
, XX
},
806 { "movS", eAX
, Ov64
, XX
},
807 { "movB", Ob64
, AL
, XX
},
808 { "movS", Ov64
, eAX
, XX
},
809 { "movs{b||b|}", Yb
, Xb
, XX
},
810 { "movs{R||R|}", Yv
, Xv
, XX
},
811 { "cmps{b||b|}", Xb
, Yb
, XX
},
812 { "cmps{R||R|}", Xv
, Yv
, XX
},
814 { "testB", AL
, Ib
, XX
},
815 { "testS", eAX
, Iv
, XX
},
816 { "stosB", Yb
, AL
, XX
},
817 { "stosS", Yv
, eAX
, XX
},
818 { "lodsB", AL
, Xb
, XX
},
819 { "lodsS", eAX
, Xv
, XX
},
820 { "scasB", AL
, Yb
, XX
},
821 { "scasS", eAX
, Yv
, XX
},
823 { "movB", RMAL
, Ib
, XX
},
824 { "movB", RMCL
, Ib
, XX
},
825 { "movB", RMDL
, Ib
, XX
},
826 { "movB", RMBL
, Ib
, XX
},
827 { "movB", RMAH
, Ib
, XX
},
828 { "movB", RMCH
, Ib
, XX
},
829 { "movB", RMDH
, Ib
, XX
},
830 { "movB", RMBH
, Ib
, XX
},
832 { "movS", RMeAX
, Iv64
, XX
},
833 { "movS", RMeCX
, Iv64
, XX
},
834 { "movS", RMeDX
, Iv64
, XX
},
835 { "movS", RMeBX
, Iv64
, XX
},
836 { "movS", RMeSP
, Iv64
, XX
},
837 { "movS", RMeBP
, Iv64
, XX
},
838 { "movS", RMeSI
, Iv64
, XX
},
839 { "movS", RMeDI
, Iv64
, XX
},
843 { "retT", Iw
, XX
, XX
},
844 { "retT", XX
, XX
, XX
},
845 { "les{S|}", Gv
, Mp
, XX
},
846 { "ldsS", Gv
, Mp
, XX
},
847 { "movA", Eb
, Ib
, XX
},
848 { "movQ", Ev
, Iv
, XX
},
850 { "enterT", Iw
, Ib
, XX
},
851 { "leaveT", XX
, XX
, XX
},
852 { "lretP", Iw
, XX
, XX
},
853 { "lretP", XX
, XX
, XX
},
854 { "int3", XX
, XX
, XX
},
855 { "int", Ib
, XX
, XX
},
856 { "into{|}", XX
, XX
, XX
},
857 { "iretP", XX
, XX
, XX
},
863 { "aam{|}", sIb
, XX
, XX
},
864 { "aad{|}", sIb
, XX
, XX
},
865 { "(bad)", XX
, XX
, XX
},
866 { "xlat", DSBX
, XX
, XX
},
877 { "loopneFH", Jb
, XX
, loop_jcxz_flag
},
878 { "loopeFH", Jb
, XX
, loop_jcxz_flag
},
879 { "loopFH", Jb
, XX
, loop_jcxz_flag
},
880 { "jEcxzH", Jb
, XX
, loop_jcxz_flag
},
881 { "inB", AL
, Ib
, XX
},
882 { "inS", eAX
, Ib
, XX
},
883 { "outB", Ib
, AL
, XX
},
884 { "outS", Ib
, eAX
, XX
},
886 { "callT", Jv
, XX
, XX
},
887 { "jmpT", Jv
, XX
, XX
},
888 { "ljmp{T|}", Ap
, XX
, XX
},
889 { "jmp", Jb
, XX
, XX
},
890 { "inB", AL
, indirDX
, XX
},
891 { "inS", eAX
, indirDX
, XX
},
892 { "outB", indirDX
, AL
, XX
},
893 { "outS", indirDX
, eAX
, XX
},
895 { "(bad)", XX
, XX
, XX
}, /* lock prefix */
896 { "(bad)", XX
, XX
, XX
},
897 { "(bad)", XX
, XX
, XX
}, /* repne */
898 { "(bad)", XX
, XX
, XX
}, /* repz */
899 { "hlt", XX
, XX
, XX
},
900 { "cmc", XX
, XX
, XX
},
904 { "clc", XX
, XX
, XX
},
905 { "stc", XX
, XX
, XX
},
906 { "cli", XX
, XX
, XX
},
907 { "sti", XX
, XX
, XX
},
908 { "cld", XX
, XX
, XX
},
909 { "std", XX
, XX
, XX
},
914 static const struct dis386 dis386_twobyte
[] = {
918 { "larS", Gv
, Ew
, XX
},
919 { "lslS", Gv
, Ew
, XX
},
920 { "(bad)", XX
, XX
, XX
},
921 { "syscall", XX
, XX
, XX
},
922 { "clts", XX
, XX
, XX
},
923 { "sysretP", XX
, XX
, XX
},
925 { "invd", XX
, XX
, XX
},
926 { "wbinvd", XX
, XX
, XX
},
927 { "(bad)", XX
, XX
, XX
},
928 { "ud2a", XX
, XX
, XX
},
929 { "(bad)", XX
, XX
, XX
},
931 { "femms", XX
, XX
, XX
},
932 { "", MX
, EM
, OPSUF
}, /* See OP_3DNowSuffix. */
936 { "movlpX", XM
, EX
, SIMD_Fixup
, 'h' }, /* really only 2 operands */
937 { "movlpX", EX
, XM
, SIMD_Fixup
, 'h' },
938 { "unpcklpX", XM
, EX
, XX
},
939 { "unpckhpX", XM
, EX
, XX
},
940 { "movhpX", XM
, EX
, SIMD_Fixup
, 'l' },
941 { "movhpX", EX
, XM
, SIMD_Fixup
, 'l' },
944 { "(bad)", XX
, XX
, XX
},
945 { "(bad)", XX
, XX
, XX
},
946 { "(bad)", XX
, XX
, XX
},
947 { "(bad)", XX
, XX
, XX
},
948 { "(bad)", XX
, XX
, XX
},
949 { "(bad)", XX
, XX
, XX
},
950 { "(bad)", XX
, XX
, XX
},
952 { "movL", Rm
, Cm
, XX
},
953 { "movL", Rm
, Dm
, XX
},
954 { "movL", Cm
, Rm
, XX
},
955 { "movL", Dm
, Rm
, XX
},
956 { "movL", Rd
, Td
, XX
},
957 { "(bad)", XX
, XX
, XX
},
958 { "movL", Td
, Rd
, XX
},
959 { "(bad)", XX
, XX
, XX
},
961 { "movapX", XM
, EX
, XX
},
962 { "movapX", EX
, XM
, XX
},
964 { "movntpX", Ev
, XM
, XX
},
967 { "ucomisX", XM
,EX
, XX
},
968 { "comisX", XM
,EX
, XX
},
970 { "wrmsr", XX
, XX
, XX
},
971 { "rdtsc", XX
, XX
, XX
},
972 { "rdmsr", XX
, XX
, XX
},
973 { "rdpmc", XX
, XX
, XX
},
974 { "sysenter", XX
, XX
, XX
},
975 { "sysexit", XX
, XX
, XX
},
976 { "(bad)", XX
, XX
, XX
},
977 { "(bad)", XX
, XX
, XX
},
979 { "(bad)", XX
, XX
, XX
},
980 { "(bad)", XX
, XX
, XX
},
981 { "(bad)", XX
, XX
, XX
},
982 { "(bad)", XX
, XX
, XX
},
983 { "(bad)", XX
, XX
, XX
},
984 { "(bad)", XX
, XX
, XX
},
985 { "(bad)", XX
, XX
, XX
},
986 { "(bad)", XX
, XX
, XX
},
988 { "cmovo", Gv
, Ev
, XX
},
989 { "cmovno", Gv
, Ev
, XX
},
990 { "cmovb", Gv
, Ev
, XX
},
991 { "cmovae", Gv
, Ev
, XX
},
992 { "cmove", Gv
, Ev
, XX
},
993 { "cmovne", Gv
, Ev
, XX
},
994 { "cmovbe", Gv
, Ev
, XX
},
995 { "cmova", Gv
, Ev
, XX
},
997 { "cmovs", Gv
, Ev
, XX
},
998 { "cmovns", Gv
, Ev
, XX
},
999 { "cmovp", Gv
, Ev
, XX
},
1000 { "cmovnp", Gv
, Ev
, XX
},
1001 { "cmovl", Gv
, Ev
, XX
},
1002 { "cmovge", Gv
, Ev
, XX
},
1003 { "cmovle", Gv
, Ev
, XX
},
1004 { "cmovg", Gv
, Ev
, XX
},
1006 { "movmskpX", Gd
, XS
, XX
},
1010 { "andpX", XM
, EX
, XX
},
1011 { "andnpX", XM
, EX
, XX
},
1012 { "orpX", XM
, EX
, XX
},
1013 { "xorpX", XM
, EX
, XX
},
1024 { "punpcklbw", MX
, EM
, XX
},
1025 { "punpcklwd", MX
, EM
, XX
},
1026 { "punpckldq", MX
, EM
, XX
},
1027 { "packsswb", MX
, EM
, XX
},
1028 { "pcmpgtb", MX
, EM
, XX
},
1029 { "pcmpgtw", MX
, EM
, XX
},
1030 { "pcmpgtd", MX
, EM
, XX
},
1031 { "packuswb", MX
, EM
, XX
},
1033 { "punpckhbw", MX
, EM
, XX
},
1034 { "punpckhwd", MX
, EM
, XX
},
1035 { "punpckhdq", MX
, EM
, XX
},
1036 { "packssdw", MX
, EM
, XX
},
1039 { "movd", MX
, Ed
, XX
},
1046 { "pcmpeqb", MX
, EM
, XX
},
1047 { "pcmpeqw", MX
, EM
, XX
},
1048 { "pcmpeqd", MX
, EM
, XX
},
1049 { "emms", XX
, XX
, XX
},
1051 { "(bad)", XX
, XX
, XX
},
1052 { "(bad)", XX
, XX
, XX
},
1053 { "(bad)", XX
, XX
, XX
},
1054 { "(bad)", XX
, XX
, XX
},
1055 { "(bad)", XX
, XX
, XX
},
1056 { "(bad)", XX
, XX
, XX
},
1060 { "joH", Jv
, XX
, cond_jump_flag
},
1061 { "jnoH", Jv
, XX
, cond_jump_flag
},
1062 { "jbH", Jv
, XX
, cond_jump_flag
},
1063 { "jaeH", Jv
, XX
, cond_jump_flag
},
1064 { "jeH", Jv
, XX
, cond_jump_flag
},
1065 { "jneH", Jv
, XX
, cond_jump_flag
},
1066 { "jbeH", Jv
, XX
, cond_jump_flag
},
1067 { "jaH", Jv
, XX
, cond_jump_flag
},
1069 { "jsH", Jv
, XX
, cond_jump_flag
},
1070 { "jnsH", Jv
, XX
, cond_jump_flag
},
1071 { "jpH", Jv
, XX
, cond_jump_flag
},
1072 { "jnpH", Jv
, XX
, cond_jump_flag
},
1073 { "jlH", Jv
, XX
, cond_jump_flag
},
1074 { "jgeH", Jv
, XX
, cond_jump_flag
},
1075 { "jleH", Jv
, XX
, cond_jump_flag
},
1076 { "jgH", Jv
, XX
, cond_jump_flag
},
1078 { "seto", Eb
, XX
, XX
},
1079 { "setno", Eb
, XX
, XX
},
1080 { "setb", Eb
, XX
, XX
},
1081 { "setae", Eb
, XX
, XX
},
1082 { "sete", Eb
, XX
, XX
},
1083 { "setne", Eb
, XX
, XX
},
1084 { "setbe", Eb
, XX
, XX
},
1085 { "seta", Eb
, XX
, XX
},
1087 { "sets", Eb
, XX
, XX
},
1088 { "setns", Eb
, XX
, XX
},
1089 { "setp", Eb
, XX
, XX
},
1090 { "setnp", Eb
, XX
, XX
},
1091 { "setl", Eb
, XX
, XX
},
1092 { "setge", Eb
, XX
, XX
},
1093 { "setle", Eb
, XX
, XX
},
1094 { "setg", Eb
, XX
, XX
},
1096 { "pushT", fs
, XX
, XX
},
1097 { "popT", fs
, XX
, XX
},
1098 { "cpuid", XX
, XX
, XX
},
1099 { "btS", Ev
, Gv
, XX
},
1100 { "shldS", Ev
, Gv
, Ib
},
1101 { "shldS", Ev
, Gv
, CL
},
1102 { "(bad)", XX
, XX
, XX
},
1103 { "(bad)", XX
, XX
, XX
},
1105 { "pushT", gs
, XX
, XX
},
1106 { "popT", gs
, XX
, XX
},
1107 { "rsm", XX
, XX
, XX
},
1108 { "btsS", Ev
, Gv
, XX
},
1109 { "shrdS", Ev
, Gv
, Ib
},
1110 { "shrdS", Ev
, Gv
, CL
},
1112 { "imulS", Gv
, Ev
, XX
},
1114 { "cmpxchgB", Eb
, Gb
, XX
},
1115 { "cmpxchgS", Ev
, Gv
, XX
},
1116 { "lssS", Gv
, Mp
, XX
},
1117 { "btrS", Ev
, Gv
, XX
},
1118 { "lfsS", Gv
, Mp
, XX
},
1119 { "lgsS", Gv
, Mp
, XX
},
1120 { "movz{bR|x|bR|x}", Gv
, Eb
, XX
},
1121 { "movz{wR|x|wR|x}", Gv
, Ew
, XX
}, /* yes, there really is movzww ! */
1123 { "(bad)", XX
, XX
, XX
},
1124 { "ud2b", XX
, XX
, XX
},
1126 { "btcS", Ev
, Gv
, XX
},
1127 { "bsfS", Gv
, Ev
, XX
},
1128 { "bsrS", Gv
, Ev
, XX
},
1129 { "movs{bR|x|bR|x}", Gv
, Eb
, XX
},
1130 { "movs{wR|x|wR|x}", Gv
, Ew
, XX
}, /* yes, there really is movsww ! */
1132 { "xaddB", Eb
, Gb
, XX
},
1133 { "xaddS", Ev
, Gv
, XX
},
1135 { "movntiS", Ev
, Gv
, XX
},
1136 { "pinsrw", MX
, Ed
, Ib
},
1137 { "pextrw", Gd
, MS
, Ib
},
1138 { "shufpX", XM
, EX
, Ib
},
1141 { "bswap", RMeAX
, XX
, XX
},
1142 { "bswap", RMeCX
, XX
, XX
},
1143 { "bswap", RMeDX
, XX
, XX
},
1144 { "bswap", RMeBX
, XX
, XX
},
1145 { "bswap", RMeSP
, XX
, XX
},
1146 { "bswap", RMeBP
, XX
, XX
},
1147 { "bswap", RMeSI
, XX
, XX
},
1148 { "bswap", RMeDI
, XX
, XX
},
1150 { "(bad)", XX
, XX
, XX
},
1151 { "psrlw", MX
, EM
, XX
},
1152 { "psrld", MX
, EM
, XX
},
1153 { "psrlq", MX
, EM
, XX
},
1154 { "paddq", MX
, EM
, XX
},
1155 { "pmullw", MX
, EM
, XX
},
1157 { "pmovmskb", Gd
, MS
, XX
},
1159 { "psubusb", MX
, EM
, XX
},
1160 { "psubusw", MX
, EM
, XX
},
1161 { "pminub", MX
, EM
, XX
},
1162 { "pand", MX
, EM
, XX
},
1163 { "paddusb", MX
, EM
, XX
},
1164 { "paddusw", MX
, EM
, XX
},
1165 { "pmaxub", MX
, EM
, XX
},
1166 { "pandn", MX
, EM
, XX
},
1168 { "pavgb", MX
, EM
, XX
},
1169 { "psraw", MX
, EM
, XX
},
1170 { "psrad", MX
, EM
, XX
},
1171 { "pavgw", MX
, EM
, XX
},
1172 { "pmulhuw", MX
, EM
, XX
},
1173 { "pmulhw", MX
, EM
, XX
},
1177 { "psubsb", MX
, EM
, XX
},
1178 { "psubsw", MX
, EM
, XX
},
1179 { "pminsw", MX
, EM
, XX
},
1180 { "por", MX
, EM
, XX
},
1181 { "paddsb", MX
, EM
, XX
},
1182 { "paddsw", MX
, EM
, XX
},
1183 { "pmaxsw", MX
, EM
, XX
},
1184 { "pxor", MX
, EM
, XX
},
1186 { "(bad)", XX
, XX
, XX
},
1187 { "psllw", MX
, EM
, XX
},
1188 { "pslld", MX
, EM
, XX
},
1189 { "psllq", MX
, EM
, XX
},
1190 { "pmuludq", MX
, EM
, XX
},
1191 { "pmaddwd", MX
, EM
, XX
},
1192 { "psadbw", MX
, EM
, XX
},
1195 { "psubb", MX
, EM
, XX
},
1196 { "psubw", MX
, EM
, XX
},
1197 { "psubd", MX
, EM
, XX
},
1198 { "psubq", MX
, EM
, XX
},
1199 { "paddb", MX
, EM
, XX
},
1200 { "paddw", MX
, EM
, XX
},
1201 { "paddd", MX
, EM
, XX
},
1202 { "(bad)", XX
, XX
, XX
}
1205 static const unsigned char onebyte_has_modrm
[256] = {
1206 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1207 /* ------------------------------- */
1208 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1209 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1210 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1211 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1212 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1213 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1214 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1215 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1216 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1217 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1218 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1219 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1220 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1221 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1222 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1223 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1224 /* ------------------------------- */
1225 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1228 static const unsigned char twobyte_has_modrm
[256] = {
1229 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1230 /* ------------------------------- */
1231 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
1232 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0, /* 1f */
1233 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
1234 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1235 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
1236 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1237 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
1238 /* 70 */ 1,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1, /* 7f */
1239 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1240 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
1241 /* a0 */ 0,0,0,1,1,1,0,0,0,0,0,1,1,1,1,1, /* af */
1242 /* b0 */ 1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1, /* bf */
1243 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
1244 /* d0 */ 0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
1245 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
1246 /* f0 */ 0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
1247 /* ------------------------------- */
1248 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1251 static const unsigned char twobyte_uses_SSE_prefix
[256] = {
1252 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1253 /* ------------------------------- */
1254 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1255 /* 10 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1256 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,0,1,1,0,0, /* 2f */
1257 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1258 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1259 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1260 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
1261 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1, /* 7f */
1262 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1263 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1264 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1265 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1266 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1267 /* d0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1268 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1269 /* f0 */ 0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
1270 /* ------------------------------- */
1271 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1274 static char obuf
[100];
1276 static char scratchbuf
[100];
1277 static unsigned char *start_codep
;
1278 static unsigned char *insn_codep
;
1279 static unsigned char *codep
;
1280 static disassemble_info
*the_info
;
1284 static unsigned char need_modrm
;
1286 /* If we are accessing mod/rm/reg without need_modrm set, then the
1287 values are stale. Hitting this abort likely indicates that you
1288 need to update onebyte_has_modrm or twobyte_has_modrm. */
1289 #define MODRM_CHECK if (!need_modrm) abort ()
1291 static const char **names64
;
1292 static const char **names32
;
1293 static const char **names16
;
1294 static const char **names8
;
1295 static const char **names8rex
;
1296 static const char **names_seg
;
1297 static const char **index16
;
1299 static const char *intel_names64
[] = {
1300 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1301 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1303 static const char *intel_names32
[] = {
1304 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1305 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1307 static const char *intel_names16
[] = {
1308 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1309 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1311 static const char *intel_names8
[] = {
1312 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1314 static const char *intel_names8rex
[] = {
1315 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1316 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1318 static const char *intel_names_seg
[] = {
1319 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1321 static const char *intel_index16
[] = {
1322 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1325 static const char *att_names64
[] = {
1326 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
1327 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1329 static const char *att_names32
[] = {
1330 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
1331 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
1333 static const char *att_names16
[] = {
1334 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
1335 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
1337 static const char *att_names8
[] = {
1338 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
1340 static const char *att_names8rex
[] = {
1341 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
1342 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1344 static const char *att_names_seg
[] = {
1345 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
1347 static const char *att_index16
[] = {
1348 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
1351 static const struct dis386 grps
[][8] = {
1354 { "addA", Eb
, Ib
, XX
},
1355 { "orA", Eb
, Ib
, XX
},
1356 { "adcA", Eb
, Ib
, XX
},
1357 { "sbbA", Eb
, Ib
, XX
},
1358 { "andA", Eb
, Ib
, XX
},
1359 { "subA", Eb
, Ib
, XX
},
1360 { "xorA", Eb
, Ib
, XX
},
1361 { "cmpA", Eb
, Ib
, XX
}
1365 { "addQ", Ev
, Iv
, XX
},
1366 { "orQ", Ev
, Iv
, XX
},
1367 { "adcQ", Ev
, Iv
, XX
},
1368 { "sbbQ", Ev
, Iv
, XX
},
1369 { "andQ", Ev
, Iv
, XX
},
1370 { "subQ", Ev
, Iv
, XX
},
1371 { "xorQ", Ev
, Iv
, XX
},
1372 { "cmpQ", Ev
, Iv
, XX
}
1376 { "addQ", Ev
, sIb
, XX
},
1377 { "orQ", Ev
, sIb
, XX
},
1378 { "adcQ", Ev
, sIb
, XX
},
1379 { "sbbQ", Ev
, sIb
, XX
},
1380 { "andQ", Ev
, sIb
, XX
},
1381 { "subQ", Ev
, sIb
, XX
},
1382 { "xorQ", Ev
, sIb
, XX
},
1383 { "cmpQ", Ev
, sIb
, XX
}
1387 { "rolA", Eb
, Ib
, XX
},
1388 { "rorA", Eb
, Ib
, XX
},
1389 { "rclA", Eb
, Ib
, XX
},
1390 { "rcrA", Eb
, Ib
, XX
},
1391 { "shlA", Eb
, Ib
, XX
},
1392 { "shrA", Eb
, Ib
, XX
},
1393 { "(bad)", XX
, XX
, XX
},
1394 { "sarA", Eb
, Ib
, XX
},
1398 { "rolQ", Ev
, Ib
, XX
},
1399 { "rorQ", Ev
, Ib
, XX
},
1400 { "rclQ", Ev
, Ib
, XX
},
1401 { "rcrQ", Ev
, Ib
, XX
},
1402 { "shlQ", Ev
, Ib
, XX
},
1403 { "shrQ", Ev
, Ib
, XX
},
1404 { "(bad)", XX
, XX
, XX
},
1405 { "sarQ", Ev
, Ib
, XX
},
1409 { "rolA", Eb
, XX
, XX
},
1410 { "rorA", Eb
, XX
, XX
},
1411 { "rclA", Eb
, XX
, XX
},
1412 { "rcrA", Eb
, XX
, XX
},
1413 { "shlA", Eb
, XX
, XX
},
1414 { "shrA", Eb
, XX
, XX
},
1415 { "(bad)", XX
, XX
, XX
},
1416 { "sarA", Eb
, XX
, XX
},
1420 { "rolQ", Ev
, XX
, XX
},
1421 { "rorQ", Ev
, XX
, XX
},
1422 { "rclQ", Ev
, XX
, XX
},
1423 { "rcrQ", Ev
, XX
, XX
},
1424 { "shlQ", Ev
, XX
, XX
},
1425 { "shrQ", Ev
, XX
, XX
},
1426 { "(bad)", XX
, XX
, XX
},
1427 { "sarQ", Ev
, XX
, XX
},
1431 { "rolA", Eb
, CL
, XX
},
1432 { "rorA", Eb
, CL
, XX
},
1433 { "rclA", Eb
, CL
, XX
},
1434 { "rcrA", Eb
, CL
, XX
},
1435 { "shlA", Eb
, CL
, XX
},
1436 { "shrA", Eb
, CL
, XX
},
1437 { "(bad)", XX
, XX
, XX
},
1438 { "sarA", Eb
, CL
, XX
},
1442 { "rolQ", Ev
, CL
, XX
},
1443 { "rorQ", Ev
, CL
, XX
},
1444 { "rclQ", Ev
, CL
, XX
},
1445 { "rcrQ", Ev
, CL
, XX
},
1446 { "shlQ", Ev
, CL
, XX
},
1447 { "shrQ", Ev
, CL
, XX
},
1448 { "(bad)", XX
, XX
, XX
},
1449 { "sarQ", Ev
, CL
, XX
}
1453 { "testA", Eb
, Ib
, XX
},
1454 { "(bad)", Eb
, XX
, XX
},
1455 { "notA", Eb
, XX
, XX
},
1456 { "negA", Eb
, XX
, XX
},
1457 { "mulA", Eb
, XX
, XX
}, /* Don't print the implicit %al register, */
1458 { "imulA", Eb
, XX
, XX
}, /* to distinguish these opcodes from other */
1459 { "divA", Eb
, XX
, XX
}, /* mul/imul opcodes. Do the same for div */
1460 { "idivA", Eb
, XX
, XX
} /* and idiv for consistency. */
1464 { "testQ", Ev
, Iv
, XX
},
1465 { "(bad)", XX
, XX
, XX
},
1466 { "notQ", Ev
, XX
, XX
},
1467 { "negQ", Ev
, XX
, XX
},
1468 { "mulQ", Ev
, XX
, XX
}, /* Don't print the implicit register. */
1469 { "imulQ", Ev
, XX
, XX
},
1470 { "divQ", Ev
, XX
, XX
},
1471 { "idivQ", Ev
, XX
, XX
},
1475 { "incA", Eb
, XX
, XX
},
1476 { "decA", Eb
, XX
, XX
},
1477 { "(bad)", XX
, XX
, XX
},
1478 { "(bad)", XX
, XX
, XX
},
1479 { "(bad)", XX
, XX
, XX
},
1480 { "(bad)", XX
, XX
, XX
},
1481 { "(bad)", XX
, XX
, XX
},
1482 { "(bad)", XX
, XX
, XX
},
1486 { "incQ", Ev
, XX
, XX
},
1487 { "decQ", Ev
, XX
, XX
},
1488 { "callT", indirEv
, XX
, XX
},
1489 { "lcallT", indirEv
, XX
, XX
},
1490 { "jmpT", indirEv
, XX
, XX
},
1491 { "ljmpT", indirEv
, XX
, XX
},
1492 { "pushU", Ev
, XX
, XX
},
1493 { "(bad)", XX
, XX
, XX
},
1497 { "sldtQ", Ev
, XX
, XX
},
1498 { "strQ", Ev
, XX
, XX
},
1499 { "lldt", Ew
, XX
, XX
},
1500 { "ltr", Ew
, XX
, XX
},
1501 { "verr", Ew
, XX
, XX
},
1502 { "verw", Ew
, XX
, XX
},
1503 { "(bad)", XX
, XX
, XX
},
1504 { "(bad)", XX
, XX
, XX
}
1508 { "sgdtQ", M
, XX
, XX
},
1509 { "sidtQ", M
, XX
, XX
},
1510 { "lgdtQ", M
, XX
, XX
},
1511 { "lidtQ", M
, XX
, XX
},
1512 { "smswQ", Ev
, XX
, XX
},
1513 { "(bad)", XX
, XX
, XX
},
1514 { "lmsw", Ew
, XX
, XX
},
1515 { "invlpg", Ew
, XX
, XX
},
1519 { "(bad)", XX
, XX
, XX
},
1520 { "(bad)", XX
, XX
, XX
},
1521 { "(bad)", XX
, XX
, XX
},
1522 { "(bad)", XX
, XX
, XX
},
1523 { "btQ", Ev
, Ib
, XX
},
1524 { "btsQ", Ev
, Ib
, XX
},
1525 { "btrQ", Ev
, Ib
, XX
},
1526 { "btcQ", Ev
, Ib
, XX
},
1530 { "(bad)", XX
, XX
, XX
},
1531 { "cmpxchg8b", Ev
, XX
, XX
},
1532 { "(bad)", XX
, XX
, XX
},
1533 { "(bad)", XX
, XX
, XX
},
1534 { "(bad)", XX
, XX
, XX
},
1535 { "(bad)", XX
, XX
, XX
},
1536 { "(bad)", XX
, XX
, XX
},
1537 { "(bad)", XX
, XX
, XX
},
1541 { "(bad)", XX
, XX
, XX
},
1542 { "(bad)", XX
, XX
, XX
},
1543 { "psrlw", MS
, Ib
, XX
},
1544 { "(bad)", XX
, XX
, XX
},
1545 { "psraw", MS
, Ib
, XX
},
1546 { "(bad)", XX
, XX
, XX
},
1547 { "psllw", MS
, Ib
, XX
},
1548 { "(bad)", XX
, XX
, XX
},
1552 { "(bad)", XX
, XX
, XX
},
1553 { "(bad)", XX
, XX
, XX
},
1554 { "psrld", MS
, Ib
, XX
},
1555 { "(bad)", XX
, XX
, XX
},
1556 { "psrad", MS
, Ib
, XX
},
1557 { "(bad)", XX
, XX
, XX
},
1558 { "pslld", MS
, Ib
, XX
},
1559 { "(bad)", XX
, XX
, XX
},
1563 { "(bad)", XX
, XX
, XX
},
1564 { "(bad)", XX
, XX
, XX
},
1565 { "psrlq", MS
, Ib
, XX
},
1566 { "psrldq", MS
, Ib
, XX
},
1567 { "(bad)", XX
, XX
, XX
},
1568 { "(bad)", XX
, XX
, XX
},
1569 { "psllq", MS
, Ib
, XX
},
1570 { "pslldq", MS
, Ib
, XX
},
1574 { "fxsave", Ev
, XX
, XX
},
1575 { "fxrstor", Ev
, XX
, XX
},
1576 { "ldmxcsr", Ev
, XX
, XX
},
1577 { "stmxcsr", Ev
, XX
, XX
},
1578 { "(bad)", XX
, XX
, XX
},
1579 { "lfence", None
, XX
, XX
},
1580 { "mfence", None
, XX
, XX
},
1581 { "sfence", None
, XX
, XX
},
1582 /* FIXME: the sfence with memory operand is clflush! */
1586 { "prefetchnta", Ev
, XX
, XX
},
1587 { "prefetcht0", Ev
, XX
, XX
},
1588 { "prefetcht1", Ev
, XX
, XX
},
1589 { "prefetcht2", Ev
, XX
, XX
},
1590 { "(bad)", XX
, XX
, XX
},
1591 { "(bad)", XX
, XX
, XX
},
1592 { "(bad)", XX
, XX
, XX
},
1593 { "(bad)", XX
, XX
, XX
},
1597 { "prefetch", Eb
, XX
, XX
},
1598 { "prefetchw", Eb
, XX
, XX
},
1599 { "(bad)", XX
, XX
, XX
},
1600 { "(bad)", XX
, XX
, XX
},
1601 { "(bad)", XX
, XX
, XX
},
1602 { "(bad)", XX
, XX
, XX
},
1603 { "(bad)", XX
, XX
, XX
},
1604 { "(bad)", XX
, XX
, XX
},
1608 static const struct dis386 prefix_user_table
[][4] = {
1611 { "addps", XM
, EX
, XX
},
1612 { "addss", XM
, EX
, XX
},
1613 { "addpd", XM
, EX
, XX
},
1614 { "addsd", XM
, EX
, XX
},
1618 { "", XM
, EX
, OPSIMD
}, /* See OP_SIMD_SUFFIX. */
1619 { "", XM
, EX
, OPSIMD
},
1620 { "", XM
, EX
, OPSIMD
},
1621 { "", XM
, EX
, OPSIMD
},
1625 { "cvtpi2ps", XM
, EM
, XX
},
1626 { "cvtsi2ssY", XM
, Ev
, XX
},
1627 { "cvtpi2pd", XM
, EM
, XX
},
1628 { "cvtsi2sdY", XM
, Ev
, XX
},
1632 { "cvtps2pi", MX
, EX
, XX
},
1633 { "cvtss2siY", Gv
, EX
, XX
},
1634 { "cvtpd2pi", MX
, EX
, XX
},
1635 { "cvtsd2siY", Gv
, EX
, XX
},
1639 { "cvttps2pi", MX
, EX
, XX
},
1640 { "cvttss2siY", Gv
, EX
, XX
},
1641 { "cvttpd2pi", MX
, EX
, XX
},
1642 { "cvttsd2siY", Gv
, EX
, XX
},
1646 { "divps", XM
, EX
, XX
},
1647 { "divss", XM
, EX
, XX
},
1648 { "divpd", XM
, EX
, XX
},
1649 { "divsd", XM
, EX
, XX
},
1653 { "maxps", XM
, EX
, XX
},
1654 { "maxss", XM
, EX
, XX
},
1655 { "maxpd", XM
, EX
, XX
},
1656 { "maxsd", XM
, EX
, XX
},
1660 { "minps", XM
, EX
, XX
},
1661 { "minss", XM
, EX
, XX
},
1662 { "minpd", XM
, EX
, XX
},
1663 { "minsd", XM
, EX
, XX
},
1667 { "movups", XM
, EX
, XX
},
1668 { "movss", XM
, EX
, XX
},
1669 { "movupd", XM
, EX
, XX
},
1670 { "movsd", XM
, EX
, XX
},
1674 { "movups", EX
, XM
, XX
},
1675 { "movss", EX
, XM
, XX
},
1676 { "movupd", EX
, XM
, XX
},
1677 { "movsd", EX
, XM
, XX
},
1681 { "mulps", XM
, EX
, XX
},
1682 { "mulss", XM
, EX
, XX
},
1683 { "mulpd", XM
, EX
, XX
},
1684 { "mulsd", XM
, EX
, XX
},
1688 { "rcpps", XM
, EX
, XX
},
1689 { "rcpss", XM
, EX
, XX
},
1690 { "(bad)", XM
, EX
, XX
},
1691 { "(bad)", XM
, EX
, XX
},
1695 { "rsqrtps", XM
, EX
, XX
},
1696 { "rsqrtss", XM
, EX
, XX
},
1697 { "(bad)", XM
, EX
, XX
},
1698 { "(bad)", XM
, EX
, XX
},
1702 { "sqrtps", XM
, EX
, XX
},
1703 { "sqrtss", XM
, EX
, XX
},
1704 { "sqrtpd", XM
, EX
, XX
},
1705 { "sqrtsd", XM
, EX
, XX
},
1709 { "subps", XM
, EX
, XX
},
1710 { "subss", XM
, EX
, XX
},
1711 { "subpd", XM
, EX
, XX
},
1712 { "subsd", XM
, EX
, XX
},
1716 { "(bad)", XM
, EX
, XX
},
1717 { "cvtdq2pd", XM
, EX
, XX
},
1718 { "cvttpd2dq", XM
, EX
, XX
},
1719 { "cvtpd2dq", XM
, EX
, XX
},
1723 { "cvtdq2ps", XM
, EX
, XX
},
1724 { "cvttps2dq",XM
, EX
, XX
},
1725 { "cvtps2dq",XM
, EX
, XX
},
1726 { "(bad)", XM
, EX
, XX
},
1730 { "cvtps2pd", XM
, EX
, XX
},
1731 { "cvtss2sd", XM
, EX
, XX
},
1732 { "cvtpd2ps", XM
, EX
, XX
},
1733 { "cvtsd2ss", XM
, EX
, XX
},
1737 { "maskmovq", MX
, MS
, XX
},
1738 { "(bad)", XM
, EX
, XX
},
1739 { "maskmovdqu", XM
, EX
, XX
},
1740 { "(bad)", XM
, EX
, XX
},
1744 { "movq", MX
, EM
, XX
},
1745 { "movdqu", XM
, EX
, XX
},
1746 { "movdqa", XM
, EX
, XX
},
1747 { "(bad)", XM
, EX
, XX
},
1751 { "movq", EM
, MX
, XX
},
1752 { "movdqu", EX
, XM
, XX
},
1753 { "movdqa", EX
, XM
, XX
},
1754 { "(bad)", EX
, XM
, XX
},
1758 { "(bad)", EX
, XM
, XX
},
1759 { "movq2dq", XM
, MS
, XX
},
1760 { "movq", EX
, XM
, XX
},
1761 { "movdq2q", MX
, XS
, XX
},
1765 { "pshufw", MX
, EM
, Ib
},
1766 { "pshufhw", XM
, EX
, Ib
},
1767 { "pshufd", XM
, EX
, Ib
},
1768 { "pshuflw", XM
, EX
, Ib
},
1772 { "movd", Ed
, MX
, XX
},
1773 { "movq", XM
, EX
, XX
},
1774 { "movd", Ed
, XM
, XX
},
1775 { "(bad)", Ed
, XM
, XX
},
1779 { "(bad)", MX
, EX
, XX
},
1780 { "(bad)", XM
, EX
, XX
},
1781 { "punpckhqdq", XM
, EX
, XX
},
1782 { "(bad)", XM
, EX
, XX
},
1786 { "movntq", Ev
, MX
, XX
},
1787 { "(bad)", Ev
, XM
, XX
},
1788 { "movntdq", Ev
, XM
, XX
},
1789 { "(bad)", Ev
, XM
, XX
},
1793 { "(bad)", MX
, EX
, XX
},
1794 { "(bad)", XM
, EX
, XX
},
1795 { "punpcklqdq", XM
, EX
, XX
},
1796 { "(bad)", XM
, EX
, XX
},
1800 static const struct dis386 x86_64_table
[][2] = {
1802 { "arpl", Ew
, Gw
, XX
},
1803 { "movs{||lq|xd}", Gv
, Ed
, XX
},
1807 #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
1819 FETCH_DATA (the_info
, codep
+ 1);
1823 /* REX prefixes family. */
1846 prefixes
|= PREFIX_REPZ
;
1849 prefixes
|= PREFIX_REPNZ
;
1852 prefixes
|= PREFIX_LOCK
;
1855 prefixes
|= PREFIX_CS
;
1858 prefixes
|= PREFIX_SS
;
1861 prefixes
|= PREFIX_DS
;
1864 prefixes
|= PREFIX_ES
;
1867 prefixes
|= PREFIX_FS
;
1870 prefixes
|= PREFIX_GS
;
1873 prefixes
|= PREFIX_DATA
;
1876 prefixes
|= PREFIX_ADDR
;
1879 /* fwait is really an instruction. If there are prefixes
1880 before the fwait, they belong to the fwait, *not* to the
1881 following instruction. */
1884 prefixes
|= PREFIX_FWAIT
;
1888 prefixes
= PREFIX_FWAIT
;
1893 /* Rex is ignored when followed by another prefix. */
1896 oappend (prefix_name (rex
, 0));
1904 /* Return the name of the prefix byte PREF, or NULL if PREF is not a
1908 prefix_name (pref
, sizeflag
)
1914 /* REX prefixes family. */
1966 return (sizeflag
& DFLAG
) ? "data16" : "data32";
1969 return (sizeflag
& AFLAG
) ? "addr32" : "addr64";
1971 return ((sizeflag
& AFLAG
) && !mode_64bit
) ? "addr16" : "addr32";
1979 static char op1out
[100], op2out
[100], op3out
[100];
1980 static int op_ad
, op_index
[3];
1981 static bfd_vma op_address
[3];
1982 static bfd_vma op_riprel
[3];
1983 static bfd_vma start_pc
;
1986 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
1987 * (see topic "Redundant prefixes" in the "Differences from 8086"
1988 * section of the "Virtual 8086 Mode" chapter.)
1989 * 'pc' should be the address of this instruction, it will
1990 * be used to print the target address if this is a relative jump or call
1991 * The function returns the length of this instruction in bytes.
1994 static char intel_syntax
;
1995 static char open_char
;
1996 static char close_char
;
1997 static char separator_char
;
1998 static char scale_char
;
2000 /* Here for backwards compatibility. When gdb stops using
2001 print_insn_i386_att and print_insn_i386_intel these functions can
2002 disappear, and print_insn_i386 be merged into print_insn. */
2004 print_insn_i386_att (pc
, info
)
2006 disassemble_info
*info
;
2010 return print_insn (pc
, info
);
2014 print_insn_i386_intel (pc
, info
)
2016 disassemble_info
*info
;
2020 return print_insn (pc
, info
);
2024 print_insn_i386 (pc
, info
)
2026 disassemble_info
*info
;
2030 return print_insn (pc
, info
);
2034 print_insn (pc
, info
)
2036 disassemble_info
*info
;
2038 const struct dis386
*dp
;
2041 char *first
, *second
, *third
;
2043 unsigned char uses_SSE_prefix
;
2046 struct dis_private priv
;
2048 mode_64bit
= (info
->mach
== bfd_mach_x86_64_intel_syntax
2049 || info
->mach
== bfd_mach_x86_64
);
2051 if (intel_syntax
== -1)
2052 intel_syntax
= (info
->mach
== bfd_mach_i386_i386_intel_syntax
2053 || info
->mach
== bfd_mach_x86_64_intel_syntax
);
2055 if (info
->mach
== bfd_mach_i386_i386
2056 || info
->mach
== bfd_mach_x86_64
2057 || info
->mach
== bfd_mach_i386_i386_intel_syntax
2058 || info
->mach
== bfd_mach_x86_64_intel_syntax
)
2059 priv
.orig_sizeflag
= AFLAG
| DFLAG
;
2060 else if (info
->mach
== bfd_mach_i386_i8086
)
2061 priv
.orig_sizeflag
= 0;
2066 for (p
= info
->disassembler_options
; p
!= NULL
; )
2068 if (strncmp (p
, "x86-64", 6) == 0)
2071 priv
.orig_sizeflag
= AFLAG
| DFLAG
;
2073 else if (strncmp (p
, "i386", 4) == 0)
2076 priv
.orig_sizeflag
= AFLAG
| DFLAG
;
2078 else if (strncmp (p
, "i8086", 5) == 0)
2081 priv
.orig_sizeflag
= 0;
2083 else if (strncmp (p
, "intel", 5) == 0)
2087 else if (strncmp (p
, "att", 3) == 0)
2091 else if (strncmp (p
, "addr", 4) == 0)
2093 if (p
[4] == '1' && p
[5] == '6')
2094 priv
.orig_sizeflag
&= ~AFLAG
;
2095 else if (p
[4] == '3' && p
[5] == '2')
2096 priv
.orig_sizeflag
|= AFLAG
;
2098 else if (strncmp (p
, "data", 4) == 0)
2100 if (p
[4] == '1' && p
[5] == '6')
2101 priv
.orig_sizeflag
&= ~DFLAG
;
2102 else if (p
[4] == '3' && p
[5] == '2')
2103 priv
.orig_sizeflag
|= DFLAG
;
2105 else if (strncmp (p
, "suffix", 6) == 0)
2106 priv
.orig_sizeflag
|= SUFFIX_ALWAYS
;
2108 p
= strchr (p
, ',');
2114 priv
.orig_sizeflag
= AFLAG
| DFLAG
;
2115 /*intel_syntax = 0;*/
2120 names64
= intel_names64
;
2121 names32
= intel_names32
;
2122 names16
= intel_names16
;
2123 names8
= intel_names8
;
2124 names8rex
= intel_names8rex
;
2125 names_seg
= intel_names_seg
;
2126 index16
= intel_index16
;
2129 separator_char
= '+';
2134 names64
= att_names64
;
2135 names32
= att_names32
;
2136 names16
= att_names16
;
2137 names8
= att_names8
;
2138 names8rex
= att_names8rex
;
2139 names_seg
= att_names_seg
;
2140 index16
= att_index16
;
2143 separator_char
= ',';
2147 /* The output looks better if we put 7 bytes on a line, since that
2148 puts most long word instructions on a single line. */
2149 info
->bytes_per_line
= 7;
2151 info
->private_data
= (PTR
) &priv
;
2152 priv
.max_fetched
= priv
.the_buffer
;
2153 priv
.insn_start
= pc
;
2160 op_index
[0] = op_index
[1] = op_index
[2] = -1;
2164 start_codep
= priv
.the_buffer
;
2165 codep
= priv
.the_buffer
;
2167 if (setjmp (priv
.bailout
) != 0)
2171 /* Getting here means we tried for data but didn't get it. That
2172 means we have an incomplete instruction of some sort. Just
2173 print the first byte as a prefix or a .byte pseudo-op. */
2174 if (codep
> priv
.the_buffer
)
2176 name
= prefix_name (priv
.the_buffer
[0], priv
.orig_sizeflag
);
2178 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
2181 /* Just print the first byte as a .byte instruction. */
2182 (*info
->fprintf_func
) (info
->stream
, ".byte 0x%x",
2183 (unsigned int) priv
.the_buffer
[0]);
2196 sizeflag
= priv
.orig_sizeflag
;
2198 FETCH_DATA (info
, codep
+ 1);
2199 two_source_ops
= (*codep
== 0x62) || (*codep
== 0xc8);
2201 if ((prefixes
& PREFIX_FWAIT
)
2202 && ((*codep
< 0xd8) || (*codep
> 0xdf)))
2206 /* fwait not followed by floating point instruction. Print the
2207 first prefix, which is probably fwait itself. */
2208 name
= prefix_name (priv
.the_buffer
[0], priv
.orig_sizeflag
);
2210 name
= INTERNAL_DISASSEMBLER_ERROR
;
2211 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
2217 FETCH_DATA (info
, codep
+ 2);
2218 dp
= &dis386_twobyte
[*++codep
];
2219 need_modrm
= twobyte_has_modrm
[*codep
];
2220 uses_SSE_prefix
= twobyte_uses_SSE_prefix
[*codep
];
2224 dp
= &dis386
[*codep
];
2225 need_modrm
= onebyte_has_modrm
[*codep
];
2226 uses_SSE_prefix
= 0;
2230 if (!uses_SSE_prefix
&& (prefixes
& PREFIX_REPZ
))
2233 used_prefixes
|= PREFIX_REPZ
;
2235 if (!uses_SSE_prefix
&& (prefixes
& PREFIX_REPNZ
))
2238 used_prefixes
|= PREFIX_REPNZ
;
2240 if (prefixes
& PREFIX_LOCK
)
2243 used_prefixes
|= PREFIX_LOCK
;
2246 if (prefixes
& PREFIX_ADDR
)
2249 if (dp
->bytemode3
!= loop_jcxz_mode
|| intel_syntax
)
2251 if ((sizeflag
& AFLAG
) || mode_64bit
)
2252 oappend ("addr32 ");
2254 oappend ("addr16 ");
2255 used_prefixes
|= PREFIX_ADDR
;
2259 if (!uses_SSE_prefix
&& (prefixes
& PREFIX_DATA
))
2262 if (dp
->bytemode3
== cond_jump_mode
2263 && dp
->bytemode1
== v_mode
2266 if (sizeflag
& DFLAG
)
2267 oappend ("data32 ");
2269 oappend ("data16 ");
2270 used_prefixes
|= PREFIX_DATA
;
2276 FETCH_DATA (info
, codep
+ 1);
2277 mod
= (*codep
>> 6) & 3;
2278 reg
= (*codep
>> 3) & 7;
2282 if (dp
->name
== NULL
&& dp
->bytemode1
== FLOATCODE
)
2289 if (dp
->name
== NULL
)
2291 switch (dp
->bytemode1
)
2294 dp
= &grps
[dp
->bytemode2
][reg
];
2297 case USE_PREFIX_USER_TABLE
:
2299 used_prefixes
|= (prefixes
& PREFIX_REPZ
);
2300 if (prefixes
& PREFIX_REPZ
)
2304 used_prefixes
|= (prefixes
& PREFIX_DATA
);
2305 if (prefixes
& PREFIX_DATA
)
2309 used_prefixes
|= (prefixes
& PREFIX_REPNZ
);
2310 if (prefixes
& PREFIX_REPNZ
)
2314 dp
= &prefix_user_table
[dp
->bytemode2
][index
];
2317 case X86_64_SPECIAL
:
2318 dp
= &x86_64_table
[dp
->bytemode2
][mode_64bit
];
2322 oappend (INTERNAL_DISASSEMBLER_ERROR
);
2327 if (putop (dp
->name
, sizeflag
) == 0)
2332 (*dp
->op1
) (dp
->bytemode1
, sizeflag
);
2337 (*dp
->op2
) (dp
->bytemode2
, sizeflag
);
2342 (*dp
->op3
) (dp
->bytemode3
, sizeflag
);
2346 /* See if any prefixes were not used. If so, print the first one
2347 separately. If we don't do this, we'll wind up printing an
2348 instruction stream which does not precisely correspond to the
2349 bytes we are disassembling. */
2350 if ((prefixes
& ~used_prefixes
) != 0)
2354 name
= prefix_name (priv
.the_buffer
[0], priv
.orig_sizeflag
);
2356 name
= INTERNAL_DISASSEMBLER_ERROR
;
2357 (*info
->fprintf_func
) (info
->stream
, "%s", name
);
2360 if (rex
& ~rex_used
)
2363 name
= prefix_name (rex
| 0x40, priv
.orig_sizeflag
);
2365 name
= INTERNAL_DISASSEMBLER_ERROR
;
2366 (*info
->fprintf_func
) (info
->stream
, "%s ", name
);
2369 obufp
= obuf
+ strlen (obuf
);
2370 for (i
= strlen (obuf
); i
< 6; i
++)
2373 (*info
->fprintf_func
) (info
->stream
, "%s", obuf
);
2375 /* The enter and bound instructions are printed with operands in the same
2376 order as the intel book; everything else is printed in reverse order. */
2377 if (intel_syntax
|| two_source_ops
)
2382 op_ad
= op_index
[0];
2383 op_index
[0] = op_index
[2];
2384 op_index
[2] = op_ad
;
2395 if (op_index
[0] != -1 && !op_riprel
[0])
2396 (*info
->print_address_func
) ((bfd_vma
) op_address
[op_index
[0]], info
);
2398 (*info
->fprintf_func
) (info
->stream
, "%s", first
);
2404 (*info
->fprintf_func
) (info
->stream
, ",");
2405 if (op_index
[1] != -1 && !op_riprel
[1])
2406 (*info
->print_address_func
) ((bfd_vma
) op_address
[op_index
[1]], info
);
2408 (*info
->fprintf_func
) (info
->stream
, "%s", second
);
2414 (*info
->fprintf_func
) (info
->stream
, ",");
2415 if (op_index
[2] != -1 && !op_riprel
[2])
2416 (*info
->print_address_func
) ((bfd_vma
) op_address
[op_index
[2]], info
);
2418 (*info
->fprintf_func
) (info
->stream
, "%s", third
);
2420 for (i
= 0; i
< 3; i
++)
2421 if (op_index
[i
] != -1 && op_riprel
[i
])
2423 (*info
->fprintf_func
) (info
->stream
, " # ");
2424 (*info
->print_address_func
) ((bfd_vma
) (start_pc
+ codep
- start_codep
2425 + op_address
[op_index
[i
]]), info
);
2427 return codep
- priv
.the_buffer
;
2430 static const char *float_mem
[] = {
2506 #define STi OP_STi, 0
2508 #define FGRPd9_2 NULL, NULL, 0, NULL, 0, NULL, 0
2509 #define FGRPd9_4 NULL, NULL, 1, NULL, 0, NULL, 0
2510 #define FGRPd9_5 NULL, NULL, 2, NULL, 0, NULL, 0
2511 #define FGRPd9_6 NULL, NULL, 3, NULL, 0, NULL, 0
2512 #define FGRPd9_7 NULL, NULL, 4, NULL, 0, NULL, 0
2513 #define FGRPda_5 NULL, NULL, 5, NULL, 0, NULL, 0
2514 #define FGRPdb_4 NULL, NULL, 6, NULL, 0, NULL, 0
2515 #define FGRPde_3 NULL, NULL, 7, NULL, 0, NULL, 0
2516 #define FGRPdf_4 NULL, NULL, 8, NULL, 0, NULL, 0
2518 static const struct dis386 float_reg
[][8] = {
2521 { "fadd", ST
, STi
, XX
},
2522 { "fmul", ST
, STi
, XX
},
2523 { "fcom", STi
, XX
, XX
},
2524 { "fcomp", STi
, XX
, XX
},
2525 { "fsub", ST
, STi
, XX
},
2526 { "fsubr", ST
, STi
, XX
},
2527 { "fdiv", ST
, STi
, XX
},
2528 { "fdivr", ST
, STi
, XX
},
2532 { "fld", STi
, XX
, XX
},
2533 { "fxch", STi
, XX
, XX
},
2535 { "(bad)", XX
, XX
, XX
},
2543 { "fcmovb", ST
, STi
, XX
},
2544 { "fcmove", ST
, STi
, XX
},
2545 { "fcmovbe",ST
, STi
, XX
},
2546 { "fcmovu", ST
, STi
, XX
},
2547 { "(bad)", XX
, XX
, XX
},
2549 { "(bad)", XX
, XX
, XX
},
2550 { "(bad)", XX
, XX
, XX
},
2554 { "fcmovnb",ST
, STi
, XX
},
2555 { "fcmovne",ST
, STi
, XX
},
2556 { "fcmovnbe",ST
, STi
, XX
},
2557 { "fcmovnu",ST
, STi
, XX
},
2559 { "fucomi", ST
, STi
, XX
},
2560 { "fcomi", ST
, STi
, XX
},
2561 { "(bad)", XX
, XX
, XX
},
2565 { "fadd", STi
, ST
, XX
},
2566 { "fmul", STi
, ST
, XX
},
2567 { "(bad)", XX
, XX
, XX
},
2568 { "(bad)", XX
, XX
, XX
},
2570 { "fsub", STi
, ST
, XX
},
2571 { "fsubr", STi
, ST
, XX
},
2572 { "fdiv", STi
, ST
, XX
},
2573 { "fdivr", STi
, ST
, XX
},
2575 { "fsubr", STi
, ST
, XX
},
2576 { "fsub", STi
, ST
, XX
},
2577 { "fdivr", STi
, ST
, XX
},
2578 { "fdiv", STi
, ST
, XX
},
2583 { "ffree", STi
, XX
, XX
},
2584 { "(bad)", XX
, XX
, XX
},
2585 { "fst", STi
, XX
, XX
},
2586 { "fstp", STi
, XX
, XX
},
2587 { "fucom", STi
, XX
, XX
},
2588 { "fucomp", STi
, XX
, XX
},
2589 { "(bad)", XX
, XX
, XX
},
2590 { "(bad)", XX
, XX
, XX
},
2594 { "faddp", STi
, ST
, XX
},
2595 { "fmulp", STi
, ST
, XX
},
2596 { "(bad)", XX
, XX
, XX
},
2599 { "fsubp", STi
, ST
, XX
},
2600 { "fsubrp", STi
, ST
, XX
},
2601 { "fdivp", STi
, ST
, XX
},
2602 { "fdivrp", STi
, ST
, XX
},
2604 { "fsubrp", STi
, ST
, XX
},
2605 { "fsubp", STi
, ST
, XX
},
2606 { "fdivrp", STi
, ST
, XX
},
2607 { "fdivp", STi
, ST
, XX
},
2612 { "ffreep", STi
, XX
, XX
},
2613 { "(bad)", XX
, XX
, XX
},
2614 { "(bad)", XX
, XX
, XX
},
2615 { "(bad)", XX
, XX
, XX
},
2617 { "fucomip",ST
, STi
, XX
},
2618 { "fcomip", ST
, STi
, XX
},
2619 { "(bad)", XX
, XX
, XX
},
2623 static char *fgrps
[][8] = {
2626 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2631 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
2636 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
2641 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
2646 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
2651 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2656 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
2657 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
2662 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2667 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2675 const struct dis386
*dp
;
2676 unsigned char floatop
;
2678 floatop
= codep
[-1];
2682 putop (float_mem
[(floatop
- 0xd8) * 8 + reg
], sizeflag
);
2684 if (floatop
== 0xdb)
2685 OP_E (x_mode
, sizeflag
);
2686 else if (floatop
== 0xdd)
2687 OP_E (d_mode
, sizeflag
);
2689 OP_E (v_mode
, sizeflag
);
2692 /* Skip mod/rm byte. */
2696 dp
= &float_reg
[floatop
- 0xd8][reg
];
2697 if (dp
->name
== NULL
)
2699 putop (fgrps
[dp
->bytemode1
][rm
], sizeflag
);
2701 /* Instruction fnstsw is only one with strange arg. */
2702 if (floatop
== 0xdf && codep
[-1] == 0xe0)
2703 strcpy (op1out
, names16
[0]);
2707 putop (dp
->name
, sizeflag
);
2711 (*dp
->op1
) (dp
->bytemode1
, sizeflag
);
2714 (*dp
->op2
) (dp
->bytemode2
, sizeflag
);
2719 OP_ST (bytemode
, sizeflag
)
2720 int bytemode ATTRIBUTE_UNUSED
;
2721 int sizeflag ATTRIBUTE_UNUSED
;
2727 OP_STi (bytemode
, sizeflag
)
2728 int bytemode ATTRIBUTE_UNUSED
;
2729 int sizeflag ATTRIBUTE_UNUSED
;
2731 sprintf (scratchbuf
, "%%st(%d)", rm
);
2732 oappend (scratchbuf
+ intel_syntax
);
2735 /* Capital letters in template are macros. */
2737 putop (template, sizeflag
)
2738 const char *template;
2744 for (p
= template; *p
; p
++)
2763 /* Alternative not valid. */
2764 strcpy (obuf
, "(bad)");
2768 else if (*p
== '\0')
2786 if (mod
!= 3 || (sizeflag
& SUFFIX_ALWAYS
))
2792 if (sizeflag
& SUFFIX_ALWAYS
)
2795 case 'E': /* For jcxz/jecxz */
2798 if (sizeflag
& AFLAG
)
2804 if (sizeflag
& AFLAG
)
2806 used_prefixes
|= (prefixes
& PREFIX_ADDR
);
2811 if ((prefixes
& PREFIX_ADDR
) || (sizeflag
& SUFFIX_ALWAYS
))
2813 if (sizeflag
& AFLAG
)
2814 *obufp
++ = mode_64bit
? 'q' : 'l';
2816 *obufp
++ = mode_64bit
? 'l' : 'w';
2817 used_prefixes
|= (prefixes
& PREFIX_ADDR
);
2823 if ((prefixes
& (PREFIX_CS
| PREFIX_DS
)) == PREFIX_CS
2824 || (prefixes
& (PREFIX_CS
| PREFIX_DS
)) == PREFIX_DS
)
2826 used_prefixes
|= prefixes
& (PREFIX_CS
| PREFIX_DS
);
2829 if (prefixes
& PREFIX_DS
)
2838 if (sizeflag
& SUFFIX_ALWAYS
)
2842 if ((prefixes
& PREFIX_FWAIT
) == 0)
2845 used_prefixes
|= PREFIX_FWAIT
;
2848 USED_REX (REX_MODE64
);
2849 if (rex
& REX_MODE64
)
2866 if ((prefixes
& PREFIX_DATA
)
2867 || (rex
& REX_MODE64
)
2868 || (sizeflag
& SUFFIX_ALWAYS
))
2870 USED_REX (REX_MODE64
);
2871 if (rex
& REX_MODE64
)
2875 if (sizeflag
& DFLAG
)
2879 used_prefixes
|= (prefixes
& PREFIX_DATA
);
2895 USED_REX (REX_MODE64
);
2896 if (mod
!= 3 || (sizeflag
& SUFFIX_ALWAYS
))
2898 if (rex
& REX_MODE64
)
2902 if (sizeflag
& DFLAG
)
2906 used_prefixes
|= (prefixes
& PREFIX_DATA
);
2911 USED_REX (REX_MODE64
);
2914 if (rex
& REX_MODE64
)
2919 else if (sizeflag
& DFLAG
)
2932 if (rex
& REX_MODE64
)
2934 else if (sizeflag
& DFLAG
)
2939 if (!(rex
& REX_MODE64
))
2940 used_prefixes
|= (prefixes
& PREFIX_DATA
);
2945 if (sizeflag
& SUFFIX_ALWAYS
)
2947 if (rex
& REX_MODE64
)
2951 if (sizeflag
& DFLAG
)
2955 used_prefixes
|= (prefixes
& PREFIX_DATA
);
2960 if (prefixes
& PREFIX_DATA
)
2964 used_prefixes
|= (prefixes
& PREFIX_DATA
);
2969 if (rex
& REX_MODE64
)
2971 USED_REX (REX_MODE64
);
2975 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
2977 /* operand size flag for cwtl, cbtw */
2981 else if (sizeflag
& DFLAG
)
2992 if (sizeflag
& DFLAG
)
3003 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3016 obufp
+= strlen (s
);
3022 if (prefixes
& PREFIX_CS
)
3024 used_prefixes
|= PREFIX_CS
;
3025 oappend ("%cs:" + intel_syntax
);
3027 if (prefixes
& PREFIX_DS
)
3029 used_prefixes
|= PREFIX_DS
;
3030 oappend ("%ds:" + intel_syntax
);
3032 if (prefixes
& PREFIX_SS
)
3034 used_prefixes
|= PREFIX_SS
;
3035 oappend ("%ss:" + intel_syntax
);
3037 if (prefixes
& PREFIX_ES
)
3039 used_prefixes
|= PREFIX_ES
;
3040 oappend ("%es:" + intel_syntax
);
3042 if (prefixes
& PREFIX_FS
)
3044 used_prefixes
|= PREFIX_FS
;
3045 oappend ("%fs:" + intel_syntax
);
3047 if (prefixes
& PREFIX_GS
)
3049 used_prefixes
|= PREFIX_GS
;
3050 oappend ("%gs:" + intel_syntax
);
3055 OP_indirE (bytemode
, sizeflag
)
3061 OP_E (bytemode
, sizeflag
);
3065 print_operand_value (buf
, hex
, disp
)
3078 sprintf_vma (tmp
, disp
);
3079 for (i
= 0; tmp
[i
] == '0' && tmp
[i
+ 1]; i
++);
3080 strcpy (buf
+ 2, tmp
+ i
);
3084 bfd_signed_vma v
= disp
;
3091 /* Check for possible overflow on 0x8000000000000000. */
3094 strcpy (buf
, "9223372036854775808");
3108 tmp
[28 - i
] = (v
% 10) + '0';
3112 strcpy (buf
, tmp
+ 29 - i
);
3118 sprintf (buf
, "0x%x", (unsigned int) disp
);
3120 sprintf (buf
, "%d", (int) disp
);
3125 OP_E (bytemode
, sizeflag
)
3132 USED_REX (REX_EXTZ
);
3136 /* Skip mod/rm byte. */
3147 oappend (names8rex
[rm
+ add
]);
3149 oappend (names8
[rm
+ add
]);
3152 oappend (names16
[rm
+ add
]);
3155 oappend (names32
[rm
+ add
]);
3158 oappend (names64
[rm
+ add
]);
3162 oappend (names64
[rm
+ add
]);
3164 oappend (names32
[rm
+ add
]);
3167 USED_REX (REX_MODE64
);
3168 if (rex
& REX_MODE64
)
3169 oappend (names64
[rm
+ add
]);
3170 else if (sizeflag
& DFLAG
)
3171 oappend (names32
[rm
+ add
]);
3173 oappend (names16
[rm
+ add
]);
3174 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3177 if (!(codep
[-2] == 0xAE && codep
[-1] == 0xF8 /* sfence */)
3178 && !(codep
[-2] == 0xAE && codep
[-1] == 0xF0 /* mfence */)
3179 && !(codep
[-2] == 0xAE && codep
[-1] == 0xe8 /* lfence */))
3180 BadOp (); /* bad sfence,lea,lds,les,lfs,lgs,lss modrm */
3183 oappend (INTERNAL_DISASSEMBLER_ERROR
);
3192 if ((sizeflag
& AFLAG
) || mode_64bit
) /* 32 bit address mode */
3207 FETCH_DATA (the_info
, codep
+ 1);
3208 scale
= (*codep
>> 6) & 3;
3209 index
= (*codep
>> 3) & 7;
3211 USED_REX (REX_EXTY
);
3212 USED_REX (REX_EXTZ
);
3223 if ((base
& 7) == 5)
3226 if (mode_64bit
&& !havesib
&& (sizeflag
& AFLAG
))
3232 FETCH_DATA (the_info
, codep
+ 1);
3234 if ((disp
& 0x80) != 0)
3243 if (mod
!= 0 || (base
& 7) == 5)
3245 print_operand_value (scratchbuf
, !riprel
, disp
);
3246 oappend (scratchbuf
);
3254 if (havebase
|| (havesib
&& (index
!= 4 || scale
!= 0)))
3261 oappend ("BYTE PTR ");
3264 oappend ("WORD PTR ");
3267 oappend ("DWORD PTR ");
3270 oappend ("QWORD PTR ");
3274 oappend ("DWORD PTR ");
3276 oappend ("QWORD PTR ");
3279 oappend ("XWORD PTR ");
3285 *obufp
++ = open_char
;
3286 if (intel_syntax
&& riprel
)
3289 USED_REX (REX_EXTZ
);
3290 if (!havesib
&& (rex
& REX_EXTZ
))
3293 oappend (mode_64bit
&& (sizeflag
& AFLAG
)
3294 ? names64
[base
] : names32
[base
]);
3303 *obufp
++ = separator_char
;
3306 sprintf (scratchbuf
, "%s",
3307 mode_64bit
&& (sizeflag
& AFLAG
)
3308 ? names64
[index
] : names32
[index
]);
3311 sprintf (scratchbuf
, ",%s",
3312 mode_64bit
&& (sizeflag
& AFLAG
)
3313 ? names64
[index
] : names32
[index
]);
3314 oappend (scratchbuf
);
3318 && bytemode
!= b_mode
3319 && bytemode
!= w_mode
3320 && bytemode
!= v_mode
))
3322 *obufp
++ = scale_char
;
3324 sprintf (scratchbuf
, "%d", 1 << scale
);
3325 oappend (scratchbuf
);
3329 if (mod
!= 0 || (base
& 7) == 5)
3331 /* Don't print zero displacements. */
3334 if ((bfd_signed_vma
) disp
> 0)
3340 print_operand_value (scratchbuf
, 0, disp
);
3341 oappend (scratchbuf
);
3345 *obufp
++ = close_char
;
3348 else if (intel_syntax
)
3350 if (mod
!= 0 || (base
& 7) == 5)
3352 if (prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
3353 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
))
3357 oappend (names_seg
[ds_reg
- es_reg
]);
3360 print_operand_value (scratchbuf
, 1, disp
);
3361 oappend (scratchbuf
);
3366 { /* 16 bit address mode */
3373 if ((disp
& 0x8000) != 0)
3378 FETCH_DATA (the_info
, codep
+ 1);
3380 if ((disp
& 0x80) != 0)
3385 if ((disp
& 0x8000) != 0)
3391 if (mod
!= 0 || (rm
& 7) == 6)
3393 print_operand_value (scratchbuf
, 0, disp
);
3394 oappend (scratchbuf
);
3397 if (mod
!= 0 || (rm
& 7) != 6)
3399 *obufp
++ = open_char
;
3401 oappend (index16
[rm
+ add
]);
3402 *obufp
++ = close_char
;
3409 OP_G (bytemode
, sizeflag
)
3414 USED_REX (REX_EXTX
);
3422 oappend (names8rex
[reg
+ add
]);
3424 oappend (names8
[reg
+ add
]);
3427 oappend (names16
[reg
+ add
]);
3430 oappend (names32
[reg
+ add
]);
3433 oappend (names64
[reg
+ add
]);
3436 USED_REX (REX_MODE64
);
3437 if (rex
& REX_MODE64
)
3438 oappend (names64
[reg
+ add
]);
3439 else if (sizeflag
& DFLAG
)
3440 oappend (names32
[reg
+ add
]);
3442 oappend (names16
[reg
+ add
]);
3443 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3446 oappend (INTERNAL_DISASSEMBLER_ERROR
);
3459 FETCH_DATA (the_info
, codep
+ 8);
3460 a
= *codep
++ & 0xff;
3461 a
|= (*codep
++ & 0xff) << 8;
3462 a
|= (*codep
++ & 0xff) << 16;
3463 a
|= (*codep
++ & 0xff) << 24;
3464 b
= *codep
++ & 0xff;
3465 b
|= (*codep
++ & 0xff) << 8;
3466 b
|= (*codep
++ & 0xff) << 16;
3467 b
|= (*codep
++ & 0xff) << 24;
3468 x
= a
+ ((bfd_vma
) b
<< 32);
3476 static bfd_signed_vma
3479 bfd_signed_vma x
= 0;
3481 FETCH_DATA (the_info
, codep
+ 4);
3482 x
= *codep
++ & (bfd_signed_vma
) 0xff;
3483 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 8;
3484 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 16;
3485 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 24;
3489 static bfd_signed_vma
3492 bfd_signed_vma x
= 0;
3494 FETCH_DATA (the_info
, codep
+ 4);
3495 x
= *codep
++ & (bfd_signed_vma
) 0xff;
3496 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 8;
3497 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 16;
3498 x
|= (*codep
++ & (bfd_signed_vma
) 0xff) << 24;
3500 x
= (x
^ ((bfd_signed_vma
) 1 << 31)) - ((bfd_signed_vma
) 1 << 31);
3510 FETCH_DATA (the_info
, codep
+ 2);
3511 x
= *codep
++ & 0xff;
3512 x
|= (*codep
++ & 0xff) << 8;
3521 op_index
[op_ad
] = op_ad
;
3524 op_address
[op_ad
] = op
;
3525 op_riprel
[op_ad
] = riprel
;
3529 /* Mask to get a 32-bit address. */
3530 op_address
[op_ad
] = op
& 0xffffffff;
3531 op_riprel
[op_ad
] = riprel
& 0xffffffff;
3536 OP_REG (code
, sizeflag
)
3542 USED_REX (REX_EXTZ
);
3554 case ax_reg
: case cx_reg
: case dx_reg
: case bx_reg
:
3555 case sp_reg
: case bp_reg
: case si_reg
: case di_reg
:
3556 s
= names16
[code
- ax_reg
+ add
];
3558 case es_reg
: case ss_reg
: case cs_reg
:
3559 case ds_reg
: case fs_reg
: case gs_reg
:
3560 s
= names_seg
[code
- es_reg
+ add
];
3562 case al_reg
: case ah_reg
: case cl_reg
: case ch_reg
:
3563 case dl_reg
: case dh_reg
: case bl_reg
: case bh_reg
:
3566 s
= names8rex
[code
- al_reg
+ add
];
3568 s
= names8
[code
- al_reg
];
3570 case rAX_reg
: case rCX_reg
: case rDX_reg
: case rBX_reg
:
3571 case rSP_reg
: case rBP_reg
: case rSI_reg
: case rDI_reg
:
3574 s
= names64
[code
- rAX_reg
+ add
];
3577 code
+= eAX_reg
- rAX_reg
;
3579 case eAX_reg
: case eCX_reg
: case eDX_reg
: case eBX_reg
:
3580 case eSP_reg
: case eBP_reg
: case eSI_reg
: case eDI_reg
:
3581 USED_REX (REX_MODE64
);
3582 if (rex
& REX_MODE64
)
3583 s
= names64
[code
- eAX_reg
+ add
];
3584 else if (sizeflag
& DFLAG
)
3585 s
= names32
[code
- eAX_reg
+ add
];
3587 s
= names16
[code
- eAX_reg
+ add
];
3588 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3591 s
= INTERNAL_DISASSEMBLER_ERROR
;
3598 OP_IMREG (code
, sizeflag
)
3612 case ax_reg
: case cx_reg
: case dx_reg
: case bx_reg
:
3613 case sp_reg
: case bp_reg
: case si_reg
: case di_reg
:
3614 s
= names16
[code
- ax_reg
];
3616 case es_reg
: case ss_reg
: case cs_reg
:
3617 case ds_reg
: case fs_reg
: case gs_reg
:
3618 s
= names_seg
[code
- es_reg
];
3620 case al_reg
: case ah_reg
: case cl_reg
: case ch_reg
:
3621 case dl_reg
: case dh_reg
: case bl_reg
: case bh_reg
:
3624 s
= names8rex
[code
- al_reg
];
3626 s
= names8
[code
- al_reg
];
3628 case eAX_reg
: case eCX_reg
: case eDX_reg
: case eBX_reg
:
3629 case eSP_reg
: case eBP_reg
: case eSI_reg
: case eDI_reg
:
3630 USED_REX (REX_MODE64
);
3631 if (rex
& REX_MODE64
)
3632 s
= names64
[code
- eAX_reg
];
3633 else if (sizeflag
& DFLAG
)
3634 s
= names32
[code
- eAX_reg
];
3636 s
= names16
[code
- eAX_reg
];
3637 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3640 s
= INTERNAL_DISASSEMBLER_ERROR
;
3647 OP_I (bytemode
, sizeflag
)
3652 bfd_signed_vma mask
= -1;
3657 FETCH_DATA (the_info
, codep
+ 1);
3669 USED_REX (REX_MODE64
);
3670 if (rex
& REX_MODE64
)
3672 else if (sizeflag
& DFLAG
)
3682 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3689 oappend (INTERNAL_DISASSEMBLER_ERROR
);
3694 scratchbuf
[0] = '$';
3695 print_operand_value (scratchbuf
+ 1, 1, op
);
3696 oappend (scratchbuf
+ intel_syntax
);
3697 scratchbuf
[0] = '\0';
3701 OP_I64 (bytemode
, sizeflag
)
3706 bfd_signed_vma mask
= -1;
3710 OP_I (bytemode
, sizeflag
);
3717 FETCH_DATA (the_info
, codep
+ 1);
3722 USED_REX (REX_MODE64
);
3723 if (rex
& REX_MODE64
)
3725 else if (sizeflag
& DFLAG
)
3735 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3742 oappend (INTERNAL_DISASSEMBLER_ERROR
);
3747 scratchbuf
[0] = '$';
3748 print_operand_value (scratchbuf
+ 1, 1, op
);
3749 oappend (scratchbuf
+ intel_syntax
);
3750 scratchbuf
[0] = '\0';
3754 OP_sI (bytemode
, sizeflag
)
3759 bfd_signed_vma mask
= -1;
3764 FETCH_DATA (the_info
, codep
+ 1);
3766 if ((op
& 0x80) != 0)
3771 USED_REX (REX_MODE64
);
3772 if (rex
& REX_MODE64
)
3774 else if (sizeflag
& DFLAG
)
3783 if ((op
& 0x8000) != 0)
3786 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3791 if ((op
& 0x8000) != 0)
3795 oappend (INTERNAL_DISASSEMBLER_ERROR
);
3799 scratchbuf
[0] = '$';
3800 print_operand_value (scratchbuf
+ 1, 1, op
);
3801 oappend (scratchbuf
+ intel_syntax
);
3805 OP_J (bytemode
, sizeflag
)
3815 FETCH_DATA (the_info
, codep
+ 1);
3817 if ((disp
& 0x80) != 0)
3821 if (sizeflag
& DFLAG
)
3826 /* For some reason, a data16 prefix on a jump instruction
3827 means that the pc is masked to 16 bits after the
3828 displacement is added! */
3833 oappend (INTERNAL_DISASSEMBLER_ERROR
);
3836 disp
= (start_pc
+ codep
- start_codep
+ disp
) & mask
;
3838 print_operand_value (scratchbuf
, 1, disp
);
3839 oappend (scratchbuf
);
3843 OP_SEG (dummy
, sizeflag
)
3844 int dummy ATTRIBUTE_UNUSED
;
3845 int sizeflag ATTRIBUTE_UNUSED
;
3847 oappend (names_seg
[reg
]);
3851 OP_DIR (dummy
, sizeflag
)
3852 int dummy ATTRIBUTE_UNUSED
;
3857 if (sizeflag
& DFLAG
)
3867 used_prefixes
|= (prefixes
& PREFIX_DATA
);
3869 sprintf (scratchbuf
, "0x%x,0x%x", seg
, offset
);
3871 sprintf (scratchbuf
, "$0x%x,$0x%x", seg
, offset
);
3872 oappend (scratchbuf
);
3876 OP_OFF (bytemode
, sizeflag
)
3877 int bytemode ATTRIBUTE_UNUSED
;
3884 if ((sizeflag
& AFLAG
) || mode_64bit
)
3891 if (!(prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
3892 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
)))
3894 oappend (names_seg
[ds_reg
- es_reg
]);
3898 print_operand_value (scratchbuf
, 1, off
);
3899 oappend (scratchbuf
);
3903 OP_OFF64 (bytemode
, sizeflag
)
3904 int bytemode ATTRIBUTE_UNUSED
;
3905 int sizeflag ATTRIBUTE_UNUSED
;
3911 OP_OFF (bytemode
, sizeflag
);
3921 if (!(prefixes
& (PREFIX_CS
| PREFIX_SS
| PREFIX_DS
3922 | PREFIX_ES
| PREFIX_FS
| PREFIX_GS
)))
3924 oappend (names_seg
[ds_reg
- es_reg
]);
3928 print_operand_value (scratchbuf
, 1, off
);
3929 oappend (scratchbuf
);
3933 ptr_reg (code
, sizeflag
)
3943 USED_REX (REX_MODE64
);
3944 if (rex
& REX_MODE64
)
3946 if (!(sizeflag
& AFLAG
))
3947 s
= names32
[code
- eAX_reg
];
3949 s
= names64
[code
- eAX_reg
];
3951 else if (sizeflag
& AFLAG
)
3952 s
= names32
[code
- eAX_reg
];
3954 s
= names16
[code
- eAX_reg
];
3963 OP_ESreg (code
, sizeflag
)
3967 oappend ("%es:" + intel_syntax
);
3968 ptr_reg (code
, sizeflag
);
3972 OP_DSreg (code
, sizeflag
)
3983 prefixes
|= PREFIX_DS
;
3985 ptr_reg (code
, sizeflag
);
3989 OP_C (dummy
, sizeflag
)
3990 int dummy ATTRIBUTE_UNUSED
;
3991 int sizeflag ATTRIBUTE_UNUSED
;
3994 USED_REX (REX_EXTX
);
3997 sprintf (scratchbuf
, "%%cr%d", reg
+ add
);
3998 oappend (scratchbuf
+ intel_syntax
);
4002 OP_D (dummy
, sizeflag
)
4003 int dummy ATTRIBUTE_UNUSED
;
4004 int sizeflag ATTRIBUTE_UNUSED
;
4007 USED_REX (REX_EXTX
);
4011 sprintf (scratchbuf
, "db%d", reg
+ add
);
4013 sprintf (scratchbuf
, "%%db%d", reg
+ add
);
4014 oappend (scratchbuf
);
4018 OP_T (dummy
, sizeflag
)
4019 int dummy ATTRIBUTE_UNUSED
;
4020 int sizeflag ATTRIBUTE_UNUSED
;
4022 sprintf (scratchbuf
, "%%tr%d", reg
);
4023 oappend (scratchbuf
+ intel_syntax
);
4027 OP_Rd (bytemode
, sizeflag
)
4032 OP_E (bytemode
, sizeflag
);
4038 OP_MMX (bytemode
, sizeflag
)
4039 int bytemode ATTRIBUTE_UNUSED
;
4040 int sizeflag ATTRIBUTE_UNUSED
;
4043 USED_REX (REX_EXTX
);
4046 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4047 if (prefixes
& PREFIX_DATA
)
4048 sprintf (scratchbuf
, "%%xmm%d", reg
+ add
);
4050 sprintf (scratchbuf
, "%%mm%d", reg
+ add
);
4051 oappend (scratchbuf
+ intel_syntax
);
4055 OP_XMM (bytemode
, sizeflag
)
4056 int bytemode ATTRIBUTE_UNUSED
;
4057 int sizeflag ATTRIBUTE_UNUSED
;
4060 USED_REX (REX_EXTX
);
4063 sprintf (scratchbuf
, "%%xmm%d", reg
+ add
);
4064 oappend (scratchbuf
+ intel_syntax
);
4068 OP_EM (bytemode
, sizeflag
)
4075 OP_E (bytemode
, sizeflag
);
4078 USED_REX (REX_EXTZ
);
4082 /* Skip mod/rm byte. */
4085 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4086 if (prefixes
& PREFIX_DATA
)
4087 sprintf (scratchbuf
, "%%xmm%d", rm
+ add
);
4089 sprintf (scratchbuf
, "%%mm%d", rm
+ add
);
4090 oappend (scratchbuf
+ intel_syntax
);
4094 OP_EX (bytemode
, sizeflag
)
4101 OP_E (bytemode
, sizeflag
);
4104 USED_REX (REX_EXTZ
);
4108 /* Skip mod/rm byte. */
4111 sprintf (scratchbuf
, "%%xmm%d", rm
+ add
);
4112 oappend (scratchbuf
+ intel_syntax
);
4116 OP_MS (bytemode
, sizeflag
)
4121 OP_EM (bytemode
, sizeflag
);
4127 OP_XS (bytemode
, sizeflag
)
4132 OP_EX (bytemode
, sizeflag
);
4137 static const char *Suffix3DNow
[] = {
4138 /* 00 */ NULL
, NULL
, NULL
, NULL
,
4139 /* 04 */ NULL
, NULL
, NULL
, NULL
,
4140 /* 08 */ NULL
, NULL
, NULL
, NULL
,
4141 /* 0C */ "pi2fw", "pi2fd", NULL
, NULL
,
4142 /* 10 */ NULL
, NULL
, NULL
, NULL
,
4143 /* 14 */ NULL
, NULL
, NULL
, NULL
,
4144 /* 18 */ NULL
, NULL
, NULL
, NULL
,
4145 /* 1C */ "pf2iw", "pf2id", NULL
, NULL
,
4146 /* 20 */ NULL
, NULL
, NULL
, NULL
,
4147 /* 24 */ NULL
, NULL
, NULL
, NULL
,
4148 /* 28 */ NULL
, NULL
, NULL
, NULL
,
4149 /* 2C */ NULL
, NULL
, NULL
, NULL
,
4150 /* 30 */ NULL
, NULL
, NULL
, NULL
,
4151 /* 34 */ NULL
, NULL
, NULL
, NULL
,
4152 /* 38 */ NULL
, NULL
, NULL
, NULL
,
4153 /* 3C */ NULL
, NULL
, NULL
, NULL
,
4154 /* 40 */ NULL
, NULL
, NULL
, NULL
,
4155 /* 44 */ NULL
, NULL
, NULL
, NULL
,
4156 /* 48 */ NULL
, NULL
, NULL
, NULL
,
4157 /* 4C */ NULL
, NULL
, NULL
, NULL
,
4158 /* 50 */ NULL
, NULL
, NULL
, NULL
,
4159 /* 54 */ NULL
, NULL
, NULL
, NULL
,
4160 /* 58 */ NULL
, NULL
, NULL
, NULL
,
4161 /* 5C */ NULL
, NULL
, NULL
, NULL
,
4162 /* 60 */ NULL
, NULL
, NULL
, NULL
,
4163 /* 64 */ NULL
, NULL
, NULL
, NULL
,
4164 /* 68 */ NULL
, NULL
, NULL
, NULL
,
4165 /* 6C */ NULL
, NULL
, NULL
, NULL
,
4166 /* 70 */ NULL
, NULL
, NULL
, NULL
,
4167 /* 74 */ NULL
, NULL
, NULL
, NULL
,
4168 /* 78 */ NULL
, NULL
, NULL
, NULL
,
4169 /* 7C */ NULL
, NULL
, NULL
, NULL
,
4170 /* 80 */ NULL
, NULL
, NULL
, NULL
,
4171 /* 84 */ NULL
, NULL
, NULL
, NULL
,
4172 /* 88 */ NULL
, NULL
, "pfnacc", NULL
,
4173 /* 8C */ NULL
, NULL
, "pfpnacc", NULL
,
4174 /* 90 */ "pfcmpge", NULL
, NULL
, NULL
,
4175 /* 94 */ "pfmin", NULL
, "pfrcp", "pfrsqrt",
4176 /* 98 */ NULL
, NULL
, "pfsub", NULL
,
4177 /* 9C */ NULL
, NULL
, "pfadd", NULL
,
4178 /* A0 */ "pfcmpgt", NULL
, NULL
, NULL
,
4179 /* A4 */ "pfmax", NULL
, "pfrcpit1", "pfrsqit1",
4180 /* A8 */ NULL
, NULL
, "pfsubr", NULL
,
4181 /* AC */ NULL
, NULL
, "pfacc", NULL
,
4182 /* B0 */ "pfcmpeq", NULL
, NULL
, NULL
,
4183 /* B4 */ "pfmul", NULL
, "pfrcpit2", "pfmulhrw",
4184 /* B8 */ NULL
, NULL
, NULL
, "pswapd",
4185 /* BC */ NULL
, NULL
, NULL
, "pavgusb",
4186 /* C0 */ NULL
, NULL
, NULL
, NULL
,
4187 /* C4 */ NULL
, NULL
, NULL
, NULL
,
4188 /* C8 */ NULL
, NULL
, NULL
, NULL
,
4189 /* CC */ NULL
, NULL
, NULL
, NULL
,
4190 /* D0 */ NULL
, NULL
, NULL
, NULL
,
4191 /* D4 */ NULL
, NULL
, NULL
, NULL
,
4192 /* D8 */ NULL
, NULL
, NULL
, NULL
,
4193 /* DC */ NULL
, NULL
, NULL
, NULL
,
4194 /* E0 */ NULL
, NULL
, NULL
, NULL
,
4195 /* E4 */ NULL
, NULL
, NULL
, NULL
,
4196 /* E8 */ NULL
, NULL
, NULL
, NULL
,
4197 /* EC */ NULL
, NULL
, NULL
, NULL
,
4198 /* F0 */ NULL
, NULL
, NULL
, NULL
,
4199 /* F4 */ NULL
, NULL
, NULL
, NULL
,
4200 /* F8 */ NULL
, NULL
, NULL
, NULL
,
4201 /* FC */ NULL
, NULL
, NULL
, NULL
,
4205 OP_3DNowSuffix (bytemode
, sizeflag
)
4206 int bytemode ATTRIBUTE_UNUSED
;
4207 int sizeflag ATTRIBUTE_UNUSED
;
4209 const char *mnemonic
;
4211 FETCH_DATA (the_info
, codep
+ 1);
4212 /* AMD 3DNow! instructions are specified by an opcode suffix in the
4213 place where an 8-bit immediate would normally go. ie. the last
4214 byte of the instruction. */
4215 obufp
= obuf
+ strlen (obuf
);
4216 mnemonic
= Suffix3DNow
[*codep
++ & 0xff];
4221 /* Since a variable sized modrm/sib chunk is between the start
4222 of the opcode (0x0f0f) and the opcode suffix, we need to do
4223 all the modrm processing first, and don't know until now that
4224 we have a bad opcode. This necessitates some cleaning up. */
4231 static const char *simd_cmp_op
[] = {
4243 OP_SIMD_Suffix (bytemode
, sizeflag
)
4244 int bytemode ATTRIBUTE_UNUSED
;
4245 int sizeflag ATTRIBUTE_UNUSED
;
4247 unsigned int cmp_type
;
4249 FETCH_DATA (the_info
, codep
+ 1);
4250 obufp
= obuf
+ strlen (obuf
);
4251 cmp_type
= *codep
++ & 0xff;
4254 char suffix1
= 'p', suffix2
= 's';
4255 used_prefixes
|= (prefixes
& PREFIX_REPZ
);
4256 if (prefixes
& PREFIX_REPZ
)
4260 used_prefixes
|= (prefixes
& PREFIX_DATA
);
4261 if (prefixes
& PREFIX_DATA
)
4265 used_prefixes
|= (prefixes
& PREFIX_REPNZ
);
4266 if (prefixes
& PREFIX_REPNZ
)
4267 suffix1
= 's', suffix2
= 'd';
4270 sprintf (scratchbuf
, "cmp%s%c%c",
4271 simd_cmp_op
[cmp_type
], suffix1
, suffix2
);
4272 used_prefixes
|= (prefixes
& PREFIX_REPZ
);
4273 oappend (scratchbuf
);
4277 /* We have a bad extension byte. Clean up. */
4285 SIMD_Fixup (extrachar
, sizeflag
)
4287 int sizeflag ATTRIBUTE_UNUSED
;
4289 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
4290 forms of these instructions. */
4293 char *p
= obuf
+ strlen (obuf
);
4296 *(p
- 1) = *(p
- 2);
4297 *(p
- 2) = *(p
- 3);
4298 *(p
- 3) = extrachar
;
4305 /* Throw away prefixes and 1st. opcode byte. */
4306 codep
= insn_codep
+ 1;