3 * Copyright (C) 1998, 1999, 2000, 2001 ReactOS Team
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 * PROJECT: ReactOS kernel
21 * FILE: ntoskrnl/ke/i386/kernel.c
22 * PURPOSE: Initializes the kernel
23 * PROGRAMMER: David Welch (welch@mcmail.com)
28 /* INCLUDES *****************************************************************/
32 #include <internal/debug.h>
34 /* GLOBALS *******************************************************************/
36 ULONG KiPcrInitDone
= 0;
37 static ULONG PcrsAllocated
= 0;
38 static ULONG Ke386CpuidFlags2
, Ke386CpuidExFlags
;
39 ULONG Ke386CacheAlignment
;
40 CHAR Ke386CpuidModel
[49] = {0,};
41 ULONG Ke386L1CacheSize
;
42 BOOLEAN Ke386NoExecute
= FALSE
;
43 BOOLEAN Ke386Pae
= FALSE
;
44 BOOLEAN Ke386PaeEnabled
= FALSE
;
45 BOOLEAN Ke386GlobalPagesEnabled
= FALSE
;
46 ULONG KiFastSystemCallDisable
= 1;
48 /* FUNCTIONS *****************************************************************/
50 VOID INIT_FUNCTION STATIC
53 ULONG OrigFlags
, Flags
, FinalFlags
;
55 ULONG Dummy
, Eax
, Ebx
, Ecx
, Edx
;
56 PKPCR Pcr
= KeGetCurrentKPCR();
58 Ke386CpuidFlags2
= Ke386CpuidExFlags
= 0;
59 Ke386CacheAlignment
= 32;
61 /* Try to toggle the id bit in eflags. */
62 Ke386SaveFlags(OrigFlags
);
63 Flags
= OrigFlags
^ X86_EFLAGS_ID
;
64 Ke386RestoreFlags(Flags
);
65 Ke386SaveFlags(FinalFlags
);
66 if ((OrigFlags
& X86_EFLAGS_ID
) == (FinalFlags
& X86_EFLAGS_ID
))
68 /* No cpuid supported. */
69 Pcr
->PrcbData
.CpuID
= FALSE
;
70 Pcr
->PrcbData
.CpuType
= 3;
73 Pcr
->PrcbData
.CpuID
= TRUE
;
75 /* Get the vendor name and the maximum cpuid level supported. */
76 Ki386Cpuid(0, &MaxCpuidLevel
, (PULONG
)&Pcr
->PrcbData
.VendorString
[0], (PULONG
)&Pcr
->PrcbData
.VendorString
[8], (PULONG
)&Pcr
->PrcbData
.VendorString
[4]);
77 if (MaxCpuidLevel
> 0)
79 /* Get the feature flags. */
80 Ki386Cpuid(1, &Eax
, &Ebx
, &Ke386CpuidFlags2
, &Pcr
->PrcbData
.FeatureBits
);
81 /* Get the cache alignment, if it is available */
82 if (Pcr
->PrcbData
.FeatureBits
& (1<<19))
84 Ke386CacheAlignment
= ((Ebx
>> 8) & 0xff) * 8;
86 Pcr
->PrcbData
.CpuType
= (Eax
>> 8) & 0xf;
87 Pcr
->PrcbData
.CpuStep
= (Eax
& 0xf) | ((Eax
<< 4) & 0xf00);
91 Pcr
->PrcbData
.CpuType
= 4;
94 /* Get the maximum extended cpuid level supported. */
95 Ki386Cpuid(0x80000000, &MaxCpuidLevel
, &Dummy
, &Dummy
, &Dummy
);
96 if (MaxCpuidLevel
> 0)
98 /* Get the extended feature flags. */
99 Ki386Cpuid(0x80000001, &Dummy
, &Dummy
, &Dummy
, &Ke386CpuidExFlags
);
102 /* Get the model name. */
103 if (MaxCpuidLevel
>= 0x80000004)
105 PULONG v
= (PULONG
)Ke386CpuidModel
;
106 Ki386Cpuid(0x80000002, v
, v
+ 1, v
+ 2, v
+ 3);
107 Ki386Cpuid(0x80000003, v
+ 4, v
+ 5, v
+ 6, v
+ 7);
108 Ki386Cpuid(0x80000004, v
+ 8, v
+ 9, v
+ 10, v
+ 11);
111 /* Get the L1 cache size */
112 if (MaxCpuidLevel
>= 0x80000005)
114 Ki386Cpuid(0x80000005, &Dummy
, &Dummy
, &Ecx
, &Edx
);
115 Ke386L1CacheSize
= (Ecx
>> 24)+(Edx
>> 24);
116 if ((Ecx
& 0xff) > 0)
118 Ke386CacheAlignment
= Ecx
& 0xff;
122 /* Get the L2 cache size */
123 if (MaxCpuidLevel
>= 0x80000006)
125 Ki386Cpuid(0x80000006, &Dummy
, &Dummy
, &Ecx
, &Dummy
);
126 Pcr
->L2CacheSize
= Ecx
>> 16;
131 KePrepareForApplicationProcessorInit(ULONG Id
)
133 DPRINT("KePrepareForApplicationProcessorInit(Id %d)\n", Id
);
138 BootPcr
= (PKPCR
)KPCR_BASE
;
139 Pcr
= (PKPCR
)((ULONG_PTR
)KPCR_BASE
+ Id
* PAGE_SIZE
);
141 MmRequestPageMemoryConsumer(MC_NPPOOL
, TRUE
, &PrcPfn
);
142 MmCreateVirtualMappingForKernel((PVOID
)Pcr
,
147 * Create a PCR for this processor
149 memset(Pcr
, 0, PAGE_SIZE
);
150 Pcr
->ProcessorNumber
= Id
;
151 Pcr
->Tib
.Self
= &Pcr
->Tib
;
153 Pcr
->Irql
= SYNCH_LEVEL
;
155 Pcr
->PrcbData
.MHz
= BootPcr
->PrcbData
.MHz
;
156 Pcr
->StallScaleFactor
= BootPcr
->StallScaleFactor
;
158 /* Mark the end of the exception handler list */
159 Pcr
->Tib
.ExceptionList
= (PVOID
)-1;
161 KiGdtPrepareForApplicationProcessorInit(Id
);
165 KeApplicationProcessorInit(VOID
)
170 DPRINT("KeApplicationProcessorInit()\n");
172 if (Ke386GlobalPagesEnabled
)
174 /* Enable global pages */
175 Ke386SetCr4(Ke386GetCr4() | X86_CR4_PGE
);
179 Offset
= InterlockedIncrementUL(&PcrsAllocated
) - 1;
180 Pcr
= (PKPCR
)((ULONG_PTR
)KPCR_BASE
+ Offset
* PAGE_SIZE
);
185 KiInitializeGdt(Pcr
);
187 /* Get processor information. */
190 /* Check FPU/MMX/SSE support. */
195 if (Pcr
->PrcbData
.FeatureBits
& X86_FEATURE_SYSCALL
)
197 extern void KiFastCallEntry(void);
199 /* CS Selector of the target segment. */
200 Ke386Wrmsr(0x174, KERNEL_CS
, 0);
202 Ke386Wrmsr(0x175, 0, 0);
204 Ke386Wrmsr(0x176, (ULONG_PTR
)KiFastCallEntry
, 0);
208 * It is now safe to process interrupts
210 KeLowerIrql(DISPATCH_LEVEL
);
215 Ki386ApplicationProcessorInitializeTSS();
218 * Initialize a default LDT
220 Ki386InitializeLdt();
222 /* Now we can enable interrupts. */
223 Ke386EnableInterrupts();
227 KeInit1(PCHAR CommandLine
, PULONG LastKernelAddress
)
231 BOOLEAN NoExecute
= FALSE
;
233 extern USHORT KiBootGdt
[];
234 extern KTSS KiBootTss
;
237 * Initialize the initial PCR region. We can't allocate a page
238 * with MmAllocPage() here because MmInit1() has not yet been
239 * called, so we use a predefined page in low memory
242 KPCR
= (PKPCR
)KPCR_BASE
;
243 memset(KPCR
, 0, PAGE_SIZE
);
245 KPCR
->Irql
= SYNCH_LEVEL
;
246 KPCR
->Tib
.Self
= &KPCR
->Tib
;
247 KPCR
->GDT
= KiBootGdt
;
248 KPCR
->IDT
= (PUSHORT
)KiIdt
;
249 KPCR
->TSS
= &KiBootTss
;
250 KPCR
->ProcessorNumber
= 0;
254 KiInitializeGdt (NULL
);
255 Ki386BootInitializeTSS();
256 Ki386InitializeLdt();
258 /* Get processor information. */
261 /* Check FPU/MMX/SSE support. */
264 /* Mark the end of the exception handler list */
265 KPCR
->Tib
.ExceptionList
= (PVOID
)-1;
272 if (KPCR
->PrcbData
.FeatureBits
& X86_FEATURE_PGE
)
275 /* Enable global pages */
276 Ke386GlobalPagesEnabled
= TRUE
;
277 Ke386SaveFlags(Flags
);
278 Ke386DisableInterrupts();
279 Ke386SetCr4(Ke386GetCr4() | X86_CR4_PGE
);
280 Ke386RestoreFlags(Flags
);
283 /* Search for pae and noexecute */
284 p1
= (PCHAR
)KeLoaderBlock
.CommandLine
;
285 while(*p1
&& (p2
= strchr(p1
, '/')))
288 if (!_strnicmp(p2
, "PAE", 3))
290 if (p2
[3] == ' ' || p2
[3] == 0)
296 else if (!_strnicmp(p2
, "NOEXECUTE", 9))
298 if (p2
[9] == ' ' || p2
[9] == '=' || p2
[9] == 0)
309 * Make the detection of the noexecute feature more portable.
311 if(KPCR
->PrcbData
.CpuType
== 0xf &&
312 RtlCompareMemory("AuthenticAMD", KPCR
->PrcbData
.VendorString
, 12) == 12)
317 Ke386SaveFlags(Flags
);
318 Ke386DisableInterrupts();
320 Ke386Rdmsr(0xc0000080, l
, h
);
322 Ke386Wrmsr(0xc0000080, l
, h
);
323 Ke386NoExecute
= TRUE
;
324 Ke386RestoreFlags(Flags
);
333 /* Enable PAE mode */
334 if ((Pae
&& (KPCR
->PrcbData
.FeatureBits
& X86_FEATURE_PAE
)) || NoExecute
)
336 MiEnablePAE((PVOID
*)LastKernelAddress
);
337 Ke386PaeEnabled
= TRUE
;
340 if (KPCR
->PrcbData
.FeatureBits
& X86_FEATURE_SYSCALL
)
342 extern void KiFastCallEntry(void);
344 /* CS Selector of the target segment. */
345 Ke386Wrmsr(0x174, KERNEL_CS
, 0);
347 Ke386Wrmsr(0x175, 0, 0);
349 Ke386Wrmsr(0x176, (ULONG_PTR
)KiFastCallEntry
, 0);
356 PKPCR Pcr
= KeGetCurrentKPCR();
358 KeInitializeBugCheck();
359 KeInitializeDispatcher();
360 KeInitializeTimerImpl();
362 if (Pcr
->PrcbData
.FeatureBits
& X86_FEATURE_PAE
)
364 DPRINT("CPU supports PAE mode\n");
367 DPRINT("CPU runs in PAE mode\n");
370 DPRINT("NoExecute is enabled\n");
375 DPRINT("CPU doesn't run in PAE mode\n");
378 if ((Pcr
->PrcbData
.FeatureBits
& (X86_FEATURE_FXSR
| X86_FEATURE_MMX
| X86_FEATURE_SSE
| X86_FEATURE_SSE2
)) ||
379 (Ke386CpuidFlags2
& X86_EXT_FEATURE_SSE3
))
381 DPRINT("CPU supports" "%s%s%s%s%s" ".\n",
382 ((Pcr
->PrcbData
.FeatureBits
& X86_FEATURE_FXSR
) ? " FXSR" : ""),
383 ((Pcr
->PrcbData
.FeatureBits
& X86_FEATURE_MMX
) ? " MMX" : ""),
384 ((Pcr
->PrcbData
.FeatureBits
& X86_FEATURE_SSE
) ? " SSE" : ""),
385 ((Pcr
->PrcbData
.FeatureBits
& X86_FEATURE_SSE2
) ? " SSE2" : ""),
386 ((Ke386CpuidFlags2
& X86_EXT_FEATURE_SSE3
) ? " SSE3" : ""));
388 if (Ke386GetCr4() & X86_CR4_OSFXSR
)
390 DPRINT("SSE enabled.\n");
392 if (Ke386GetCr4() & X86_CR4_OSXMMEXCPT
)
394 DPRINT("Unmasked SIMD exceptions enabled.\n");
396 if (Pcr
->PrcbData
.VendorString
[0])
398 DPRINT("CPU Vendor: %s\n", Pcr
->PrcbData
.VendorString
);
400 if (Ke386CpuidModel
[0])
402 DPRINT("CPU Model: %s\n", Ke386CpuidModel
);
405 DPRINT("Ke386CacheAlignment: %d\n", Ke386CacheAlignment
);
406 if (Ke386L1CacheSize
)
408 DPRINT("Ke386L1CacheSize: %dkB\n", Ke386L1CacheSize
);
410 if (Pcr
->L2CacheSize
)
412 DPRINT("Ke386L2CacheSize: %dkB\n", Pcr
->L2CacheSize
);
417 Ki386SetProcessorFeatures(VOID
)
419 PKPCR Pcr
= KeGetCurrentKPCR();
420 OBJECT_ATTRIBUTES ObjectAttributes
;
421 UNICODE_STRING KeyName
;
422 UNICODE_STRING ValueName
;
425 KEY_VALUE_PARTIAL_INFORMATION ValueData
;
427 ULONG FastSystemCallDisable
= 0;
429 SharedUserData
->ProcessorFeatures
[PF_FLOATING_POINT_PRECISION_ERRATA
] = FALSE
;
430 SharedUserData
->ProcessorFeatures
[PF_FLOATING_POINT_EMULATED
] = FALSE
;
431 SharedUserData
->ProcessorFeatures
[PF_COMPARE_EXCHANGE_DOUBLE
] =
432 (Pcr
->PrcbData
.FeatureBits
& X86_FEATURE_CX8
);
433 SharedUserData
->ProcessorFeatures
[PF_MMX_INSTRUCTIONS_AVAILABLE
] =
434 (Pcr
->PrcbData
.FeatureBits
& X86_FEATURE_MMX
);
435 SharedUserData
->ProcessorFeatures
[PF_PPC_MOVEMEM_64BIT_OK
] = FALSE
;
436 SharedUserData
->ProcessorFeatures
[PF_ALPHA_BYTE_INSTRUCTIONS
] = FALSE
;
437 SharedUserData
->ProcessorFeatures
[PF_XMMI_INSTRUCTIONS_AVAILABLE
] =
438 (Pcr
->PrcbData
.FeatureBits
& X86_FEATURE_SSE
);
439 SharedUserData
->ProcessorFeatures
[PF_3DNOW_INSTRUCTIONS_AVAILABLE
] =
440 (Ke386CpuidExFlags
& X86_EXT_FEATURE_3DNOW
);
441 SharedUserData
->ProcessorFeatures
[PF_RDTSC_INSTRUCTION_AVAILABLE
] =
442 (Pcr
->PrcbData
.FeatureBits
& X86_FEATURE_TSC
);
443 SharedUserData
->ProcessorFeatures
[PF_PAE_ENABLED
] = Ke386PaeEnabled
;
444 SharedUserData
->ProcessorFeatures
[PF_XMMI64_INSTRUCTIONS_AVAILABLE
] =
445 (Pcr
->PrcbData
.FeatureBits
& X86_FEATURE_SSE2
);
447 /* Does the CPU Support Fast System Call? */
448 if (Pcr
->PrcbData
.FeatureBits
& X86_FEATURE_SYSCALL
) {
450 /* FIXME: Check for Family == 6, Model < 3 and Stepping < 3 and disable */
452 /* Make sure it's not disabled in registry */
453 RtlRosInitUnicodeStringFromLiteral(&KeyName
,
454 L
"\\Registry\\Machine\\System\\CurrentControlSet\\Control\\Session Manager\\Kernel");
455 RtlRosInitUnicodeStringFromLiteral(&ValueName
,
456 L
"FastSystemCallDisable");
457 InitializeObjectAttributes(&ObjectAttributes
,
459 OBJ_CASE_INSENSITIVE
,
462 Status
= NtOpenKey(&KeyHandle
, KEY_ALL_ACCESS
, &ObjectAttributes
);
464 if (NT_SUCCESS(Status
)) {
466 /* Read the Value then Close the Key */
467 Status
= NtQueryValueKey(KeyHandle
,
469 KeyValuePartialInformation
,
473 RtlMoveMemory(&FastSystemCallDisable
, ValueData
.Data
, sizeof(ULONG
));
480 /* Disable SYSENTER/SYSEXIT, because the CPU doesn't support it */
481 FastSystemCallDisable
= 1;
485 if (FastSystemCallDisable
) {
488 SharedUserData
->SystemCall
[0] = 0x8D;
489 SharedUserData
->SystemCall
[1] = 0x54;
490 SharedUserData
->SystemCall
[2] = 0x24;
491 SharedUserData
->SystemCall
[3] = 0x08;
492 SharedUserData
->SystemCall
[4] = 0xCD;
493 SharedUserData
->SystemCall
[5] = 0x2E;
494 SharedUserData
->SystemCall
[6] = 0xC3;
499 SharedUserData
->SystemCall
[0] = 0x8B;
500 SharedUserData
->SystemCall
[1] = 0xD4;
501 SharedUserData
->SystemCall
[2] = 0x0F;
502 SharedUserData
->SystemCall
[3] = 0x34;
503 SharedUserData
->SystemCall
[4] = 0xC3;
505 /* Enable SYSENTER/SYSEXIT */
506 KiFastSystemCallDisable
= 0;