2 * PROJECT: ReactOS Kernel
3 * LICENSE: GPL - See COPYING in the top level directory
4 * FILE: ntoskrnl/ke/i386/kiinit.c
5 * PURPOSE: Kernel Initialization for x86 CPUs
6 * PROGRAMMERS: Alex Ionescu (alex.ionescu@reactos.org)
9 /* INCLUDES *****************************************************************/
15 /* GLOBALS *******************************************************************/
17 /* Spinlocks used only on X86 */
18 KSPIN_LOCK KiFreezeExecutionLock
;
19 KSPIN_LOCK Ki486CompatibilityLock
;
21 /* FUNCTIONS *****************************************************************/
25 KiInitMachineDependent(VOID
)
29 BOOLEAN FbCaching
= FALSE
;
32 ULONG i
, Affinity
, Sample
= 0;
33 PFX_SAVE_AREA FxSaveArea
;
34 ULONG MXCsrMask
= 0xFFBF;
36 KI_SAMPLE_MAP Samples
[4];
37 PKI_SAMPLE_MAP CurrentSample
= Samples
;
39 /* Check for large page support */
40 if (KeFeatureBits
& KF_LARGE_PAGE
)
42 /* FIXME: Support this */
43 DPRINT1("Large Page support detected but not yet taken advantage of!\n");
46 /* Check for global page support */
47 if (KeFeatureBits
& KF_GLOBAL_PAGE
)
49 /* Do an IPI to enable it on all CPUs */
50 CpuCount
= KeNumberProcessors
;
51 KeIpiGenericCall(Ki386EnableGlobalPage
, (ULONG_PTR
)&CpuCount
);
54 /* Check for PAT and/or MTRR support */
55 if (KeFeatureBits
& (KF_PAT
| KF_MTRR
))
57 /* Query the HAL to make sure we can use it */
58 Status
= HalQuerySystemInformation(HalFrameBufferCachingInformation
,
62 if ((NT_SUCCESS(Status
)) && (FbCaching
))
64 /* We can't, disable it */
65 KeFeatureBits
&= ~(KF_PAT
| KF_MTRR
);
69 /* Check for PAT support and enable it */
70 if (KeFeatureBits
& KF_PAT
) KiInitializePAT();
72 /* Assume no errata for now */
73 SharedUserData
->ProcessorFeatures
[PF_FLOATING_POINT_PRECISION_ERRATA
] = 0;
75 /* Check if we have an NPX */
79 i
= KeActiveProcessors
;
80 for (Affinity
= 1; i
; Affinity
<<= 1)
82 /* Check if this is part of the set */
87 KeSetSystemAffinityThread(Affinity
);
89 /* Detect FPU errata */
90 if (KiIsNpxErrataPresent())
92 /* Disable NPX support */
93 KeI386NpxPresent
= FALSE
;
95 ProcessorFeatures
[PF_FLOATING_POINT_PRECISION_ERRATA
] =
103 /* If there's no NPX, then we're emulating the FPU */
104 SharedUserData
->ProcessorFeatures
[PF_FLOATING_POINT_EMULATED
] =
107 /* Check if there's no NPX, so that we can disable associated features */
108 if (!KeI386NpxPresent
)
110 /* Remove NPX-related bits */
111 KeFeatureBits
&= ~(KF_XMMI64
| KF_XMMI
| KF_FXSR
| KF_MMX
);
113 /* Disable kernel flags */
114 KeI386FxsrPresent
= KeI386XMMIPresent
= FALSE
;
116 /* Disable processor features that might've been set until now */
117 SharedUserData
->ProcessorFeatures
[PF_FLOATING_POINT_PRECISION_ERRATA
] =
118 SharedUserData
->ProcessorFeatures
[PF_XMMI64_INSTRUCTIONS_AVAILABLE
] =
119 SharedUserData
->ProcessorFeatures
[PF_XMMI_INSTRUCTIONS_AVAILABLE
] =
120 SharedUserData
->ProcessorFeatures
[PF_3DNOW_INSTRUCTIONS_AVAILABLE
] =
121 SharedUserData
->ProcessorFeatures
[PF_MMX_INSTRUCTIONS_AVAILABLE
] = 0;
124 /* Check for CR4 support */
125 if (KeFeatureBits
& KF_CR4
)
127 /* Do an IPI call to enable the Debug Exceptions */
128 CpuCount
= KeNumberProcessors
;
129 KeIpiGenericCall(Ki386EnableDE
, (ULONG_PTR
)&CpuCount
);
132 /* Check if FXSR was found */
133 if (KeFeatureBits
& KF_FXSR
)
135 /* Do an IPI call to enable the FXSR */
136 CpuCount
= KeNumberProcessors
;
137 KeIpiGenericCall(Ki386EnableFxsr
, (ULONG_PTR
)&CpuCount
);
139 /* Check if XMM was found too */
140 if (KeFeatureBits
& KF_XMMI
)
142 /* Do an IPI call to enable XMMI exceptions */
143 CpuCount
= KeNumberProcessors
;
144 KeIpiGenericCall(Ki386EnableXMMIExceptions
, (ULONG_PTR
)&CpuCount
);
146 /* FIXME: Implement and enable XMM Page Zeroing for Mm */
148 /* Patch the RtlPrefetchMemoryNonTemporal routine to enable it */
149 Protect
= MmGetPageProtect(NULL
, RtlPrefetchMemoryNonTemporal
);
150 MmSetPageProtect(NULL
,
151 RtlPrefetchMemoryNonTemporal
,
152 Protect
| PAGE_IS_WRITABLE
);
153 *(PCHAR
)RtlPrefetchMemoryNonTemporal
= 0x90;
154 MmSetPageProtect(NULL
, RtlPrefetchMemoryNonTemporal
, Protect
);
158 /* Check for, and enable SYSENTER support */
159 KiRestoreFastSyscallReturnState();
162 i
= KeActiveProcessors
;
163 for (Affinity
= 1; i
; Affinity
<<= 1)
165 /* Check if this is part of the set */
168 /* Run on this CPU */
170 KeSetSystemAffinityThread(Affinity
);
172 /* Reset MHz to 0 for this CPU */
173 KeGetCurrentPrcb()->MHz
= 0;
175 /* Check if we can use RDTSC */
176 if (KeFeatureBits
& KF_RDTSC
)
178 /* Start sampling loop */
181 /* Do a dummy CPUID to start the sample */
184 /* Fill out the starting data */
185 CurrentSample
->PerfStart
= KeQueryPerformanceCounter(NULL
);
186 CurrentSample
->TSCStart
= __rdtsc();
187 CurrentSample
->PerfFreq
.QuadPart
= -50000;
189 /* Sleep for this sample */
190 KeDelayExecutionThread(KernelMode
,
192 &CurrentSample
->PerfFreq
);
194 /* Do another dummy CPUID */
197 /* Fill out the ending data */
198 CurrentSample
->PerfEnd
=
199 KeQueryPerformanceCounter(&CurrentSample
->PerfFreq
);
200 CurrentSample
->TSCEnd
= __rdtsc();
202 /* Calculate the differences */
203 CurrentSample
->PerfDelta
= CurrentSample
->PerfEnd
.QuadPart
-
204 CurrentSample
->PerfStart
.QuadPart
;
205 CurrentSample
->TSCDelta
= CurrentSample
->TSCEnd
-
206 CurrentSample
->TSCStart
;
208 /* Compute CPU Speed */
209 CurrentSample
->MHz
= (ULONG
)((CurrentSample
->TSCDelta
*
211 PerfFreq
.QuadPart
+ 500000) /
212 (CurrentSample
->PerfDelta
*
215 /* Check if this isn't the first sample */
218 /* Check if we got a good precision within 1MHz */
219 if ((CurrentSample
->MHz
== CurrentSample
[-1].MHz
) ||
220 (CurrentSample
->MHz
== CurrentSample
[-1].MHz
+ 1) ||
221 (CurrentSample
->MHz
== CurrentSample
[-1].MHz
- 1))
223 /* We did, stop sampling */
232 if (Sample
== sizeof(Samples
) / sizeof(Samples
[0]))
235 CurrentSample
= Samples
;
240 /* Save the CPU Speed */
241 KeGetCurrentPrcb()->MHz
= CurrentSample
[-1].MHz
;
244 /* Check if we have MTRR */
245 if (KeFeatureBits
& KF_MTRR
)
247 /* Then manually initialize MTRR for the CPU */
248 KiInitializeMTRR(i
? FALSE
: TRUE
);
251 /* Check if we have AMD MTRR and initialize it for the CPU */
252 if (KeFeatureBits
& KF_AMDK6MTRR
) KiAmdK6InitializeMTRR();
254 /* Check if this is a buggy Pentium and apply the fixup if so */
255 if (KiI386PentiumLockErrataPresent
) KiI386PentiumLockErrataFixup();
257 /* Check if the CPU supports FXSR */
258 if (KeFeatureBits
& KF_FXSR
)
260 /* Get the current thread NPX state */
262 ((ULONG_PTR
)KeGetCurrentThread()->InitialStack
-
265 /* Clear initial MXCsr mask */
266 FxSaveArea
->U
.FxArea
.MXCsrMask
= 0;
268 /* Save the current NPX State */
270 asm volatile("fxsave %0\n\t" : "=m" (*FxSaveArea
));
272 __asm fxsave
[FxSaveArea
]
274 /* Check if the current mask doesn't match the reserved bits */
275 if (FxSaveArea
->U
.FxArea
.MXCsrMask
!= 0)
277 /* Then use whatever it's holding */
278 MXCsrMask
= FxSaveArea
->U
.FxArea
.MXCsrMask
;
281 /* Check if nobody set the kernel-wide mask */
284 /* Then use the one we calculated above */
285 KiMXCsrMask
= MXCsrMask
;
289 /* Was it set to the same value we found now? */
290 if (KiMXCsrMask
!= MXCsrMask
)
292 /* No, something is definitely wrong */
293 KeBugCheckEx(MULTIPROCESSOR_CONFIGURATION_NOT_SUPPORTED
,
301 /* Now set the kernel mask */
302 KiMXCsrMask
&= MXCsrMask
;
307 /* Return affinity back to where it was */
308 KeRevertToUserAffinityThread();
310 /* NT allows limiting the duration of an ISR with a registry key */
311 if (KiTimeLimitIsrMicroseconds
)
314 DPRINT1("ISR Time Limit not yet supported\n");
320 KiInitializePcr(IN ULONG ProcessorNumber
,
325 IN PKTHREAD IdleThread
,
329 Pcr
->NtTib
.ExceptionList
= EXCEPTION_CHAIN_END
;
330 Pcr
->NtTib
.StackBase
= 0;
331 Pcr
->NtTib
.StackLimit
= 0;
332 Pcr
->NtTib
.Self
= NULL
;
334 /* Set the Current Thread */
335 Pcr
->PrcbData
.CurrentThread
= IdleThread
;
337 /* Set pointers to ourselves */
338 Pcr
->Self
= (PKPCR
)Pcr
;
339 Pcr
->Prcb
= &Pcr
->PrcbData
;
341 /* Set the PCR Version */
342 Pcr
->MajorVersion
= PCR_MAJOR_VERSION
;
343 Pcr
->MinorVersion
= PCR_MINOR_VERSION
;
345 /* Set the PCRB Version */
346 Pcr
->PrcbData
.MajorVersion
= 1;
347 Pcr
->PrcbData
.MinorVersion
= 1;
349 /* Set the Build Type */
350 Pcr
->PrcbData
.BuildType
= 0;
352 Pcr
->PrcbData
.BuildType
|= PRCB_BUILD_UNIPROCESSOR
;
355 Pcr
->PrcbData
.BuildType
|= PRCB_BUILD_DEBUG
;
358 /* Set the Processor Number and current Processor Mask */
359 Pcr
->PrcbData
.Number
= (UCHAR
)ProcessorNumber
;
360 Pcr
->PrcbData
.SetMember
= 1 << ProcessorNumber
;
362 /* Set the PRCB for this Processor */
363 KiProcessorBlock
[ProcessorNumber
] = Pcr
->Prcb
;
365 /* Start us out at PASSIVE_LEVEL */
366 Pcr
->Irql
= PASSIVE_LEVEL
;
368 /* Set the GDI, IDT, TSS and DPC Stack */
369 Pcr
->GDT
= (PVOID
)Gdt
;
373 Pcr
->PrcbData
.DpcStack
= DpcStack
;
375 /* Setup the processor set */
376 Pcr
->PrcbData
.MultiThreadProcessorSet
= Pcr
->PrcbData
.SetMember
;
381 KiInitializeKernel(IN PKPROCESS InitProcess
,
382 IN PKTHREAD InitThread
,
386 IN PLOADER_PARAMETER_BLOCK LoaderBlock
)
390 ULONG PageDirectory
[2];
394 /* Detect and set the CPU Type */
395 KiSetProcessorType();
397 /* Set CR0 features based on detected CPU */
400 /* Check if an FPU is present */
401 NpxPresent
= KiIsNpxPresent();
403 /* Initialize the Power Management Support for this PRCB */
404 PoInitializePrcb(Prcb
);
406 /* Bugcheck if this is a 386 CPU */
407 if (Prcb
->CpuType
== 3) KeBugCheckEx(0x5D, 0x386, 0, 0, 0);
409 /* Get the processor features for the CPU */
410 FeatureBits
= KiGetFeatureBits();
412 /* Set the default NX policy (opt-in) */
413 SharedUserData
->NXSupportPolicy
= NX_SUPPORT_POLICY_OPTIN
;
415 /* Check if NPX is always on */
416 if (strstr(KeLoaderBlock
->LoadOptions
, "NOEXECUTE=ALWAYSON"))
418 /* Set it always on */
419 SharedUserData
->NXSupportPolicy
= NX_SUPPORT_POLICY_ALWAYSON
;
420 FeatureBits
|= KF_NX_ENABLED
;
422 else if (strstr(KeLoaderBlock
->LoadOptions
, "NOEXECUTE=OPTOUT"))
424 /* Set it in opt-out mode */
425 SharedUserData
->NXSupportPolicy
= NX_SUPPORT_POLICY_OPTOUT
;
426 FeatureBits
|= KF_NX_ENABLED
;
428 else if ((strstr(KeLoaderBlock
->LoadOptions
, "NOEXECUTE=OPTIN")) ||
429 (strstr(KeLoaderBlock
->LoadOptions
, "NOEXECUTE")))
431 /* Set the feature bits */
432 FeatureBits
|= KF_NX_ENABLED
;
434 else if ((strstr(KeLoaderBlock
->LoadOptions
, "NOEXECUTE=ALWAYSOFF")) ||
435 (strstr(KeLoaderBlock
->LoadOptions
, "EXECUTE")))
437 /* Set disabled mode */
438 SharedUserData
->NXSupportPolicy
= NX_SUPPORT_POLICY_ALWAYSOFF
;
439 FeatureBits
|= KF_NX_DISABLED
;
442 /* Save feature bits */
443 Prcb
->FeatureBits
= FeatureBits
;
446 KiSaveProcessorControlState(&Prcb
->ProcessorState
);
448 /* Get cache line information for this CPU */
449 KiGetCacheInformation();
451 /* Initialize spinlocks and DPC data */
452 KiInitSpinLocks(Prcb
, Number
);
454 /* Check if this is the Boot CPU */
458 KeNodeBlock
[0] = &KiNode0
;
459 Prcb
->ParentNode
= KeNodeBlock
[0];
460 KeNodeBlock
[0]->ProcessorMask
= Prcb
->SetMember
;
462 /* Set boot-level flags */
463 KeI386NpxPresent
= NpxPresent
;
464 KeI386CpuType
= Prcb
->CpuType
;
465 KeI386CpuStep
= Prcb
->CpuStep
;
466 KeProcessorArchitecture
= PROCESSOR_ARCHITECTURE_INTEL
;
467 KeProcessorLevel
= (USHORT
)Prcb
->CpuType
;
468 if (Prcb
->CpuID
) KeProcessorRevision
= Prcb
->CpuStep
;
469 KeFeatureBits
= FeatureBits
;
470 KeI386FxsrPresent
= (KeFeatureBits
& KF_FXSR
) ? TRUE
: FALSE
;
471 KeI386XMMIPresent
= (KeFeatureBits
& KF_XMMI
) ? TRUE
: FALSE
;
473 /* Detect 8-byte compare exchange support */
474 if (!(KeFeatureBits
& KF_CMPXCHG8B
))
476 /* Copy the vendor string */
477 RtlCopyMemory(Vendor
, Prcb
->VendorString
, sizeof(Vendor
));
479 /* Bugcheck the system. Windows *requires* this */
481 (1 << 24 ) | (Prcb
->CpuType
<< 16) | Prcb
->CpuStep
,
487 /* Set the current MP Master KPRCB to the Boot PRCB */
488 Prcb
->MultiThreadSetMaster
= Prcb
;
490 /* Lower to APC_LEVEL */
491 KeLowerIrql(APC_LEVEL
);
493 /* Initialize some spinlocks */
494 KeInitializeSpinLock(&KiFreezeExecutionLock
);
495 KeInitializeSpinLock(&Ki486CompatibilityLock
);
497 /* Initialize portable parts of the OS */
500 /* Initialize the Idle Process and the Process Listhead */
501 InitializeListHead(&KiProcessListHead
);
502 PageDirectory
[0] = 0;
503 PageDirectory
[1] = 0;
504 KeInitializeProcess(InitProcess
,
509 InitProcess
->QuantumReset
= MAXCHAR
;
514 DPRINT1("SMP Boot support not yet present\n");
517 /* Setup the Idle Thread */
518 KeInitializeThread(InitProcess
,
526 InitThread
->NextProcessor
= Number
;
527 InitThread
->Priority
= HIGH_PRIORITY
;
528 InitThread
->State
= Running
;
529 InitThread
->Affinity
= 1 << Number
;
530 InitThread
->WaitIrql
= DISPATCH_LEVEL
;
531 InitProcess
->ActiveProcessors
= 1 << Number
;
533 /* HACK for MmUpdatePageDir */
534 ((PETHREAD
)InitThread
)->ThreadsProcess
= (PEPROCESS
)InitProcess
;
536 /* Set basic CPU Features that user mode can read */
537 SharedUserData
->ProcessorFeatures
[PF_MMX_INSTRUCTIONS_AVAILABLE
] =
538 (KeFeatureBits
& KF_MMX
) ? TRUE
: FALSE
;
539 SharedUserData
->ProcessorFeatures
[PF_COMPARE_EXCHANGE_DOUBLE
] =
540 (KeFeatureBits
& KF_CMPXCHG8B
) ? TRUE
: FALSE
;
541 SharedUserData
->ProcessorFeatures
[PF_XMMI_INSTRUCTIONS_AVAILABLE
] =
542 ((KeFeatureBits
& KF_FXSR
) && (KeFeatureBits
& KF_XMMI
)) ? TRUE
: FALSE
;
543 SharedUserData
->ProcessorFeatures
[PF_XMMI64_INSTRUCTIONS_AVAILABLE
] =
544 ((KeFeatureBits
& KF_FXSR
) && (KeFeatureBits
& KF_XMMI64
)) ? TRUE
: FALSE
;
545 SharedUserData
->ProcessorFeatures
[PF_3DNOW_INSTRUCTIONS_AVAILABLE
] =
546 (KeFeatureBits
& KF_3DNOW
) ? TRUE
: FALSE
;
547 SharedUserData
->ProcessorFeatures
[PF_RDTSC_INSTRUCTION_AVAILABLE
] =
548 (KeFeatureBits
& KF_RDTSC
) ? TRUE
: FALSE
;
550 /* Set up the thread-related fields in the PRCB */
551 Prcb
->CurrentThread
= InitThread
;
552 Prcb
->NextThread
= NULL
;
553 Prcb
->IdleThread
= InitThread
;
555 /* Initialize the Kernel Executive */
556 ExpInitializeExecutive(Number
, LoaderBlock
);
558 /* Only do this on the boot CPU */
561 /* Calculate the time reciprocal */
562 KiTimeIncrementReciprocal
=
563 KiComputeReciprocal(KeMaximumIncrement
,
564 &KiTimeIncrementShiftCount
);
566 /* Update DPC Values in case they got updated by the executive */
567 Prcb
->MaximumDpcQueueDepth
= KiMaximumDpcQueueDepth
;
568 Prcb
->MinimumDpcRate
= KiMinimumDpcRate
;
569 Prcb
->AdjustDpcThreshold
= KiAdjustDpcThreshold
;
571 /* Allocate the DPC Stack */
572 DpcStack
= MmCreateKernelStack(FALSE
, 0);
573 if (!DpcStack
) KeBugCheckEx(NO_PAGES_AVAILABLE
, 1, 0, 0, 0);
574 Prcb
->DpcStack
= DpcStack
;
576 /* Allocate the IOPM save area. */
577 Ki386IopmSaveArea
= ExAllocatePoolWithTag(PagedPool
,
579 TAG('K', 'e', ' ', ' '));
580 if (!Ki386IopmSaveArea
)
582 /* Bugcheck. We need this for V86/VDM support. */
583 KeBugCheckEx(NO_PAGES_AVAILABLE
, 2, PAGE_SIZE
* 2, 0, 0);
587 /* Raise to Dispatch */
588 KfRaiseIrql(DISPATCH_LEVEL
);
590 /* Set the Idle Priority to 0. This will jump into Phase 1 */
591 KeSetPriorityThread(InitThread
, 0);
593 /* If there's no thread scheduled, put this CPU in the Idle summary */
594 KiAcquirePrcbLock(Prcb
);
595 if (!Prcb
->NextThread
) KiIdleSummary
|= 1 << Number
;
596 KiReleasePrcbLock(Prcb
);
598 /* Raise back to HIGH_LEVEL and clear the PRCB for the loader block */
599 KfRaiseIrql(HIGH_LEVEL
);
600 LoaderBlock
->Prcb
= 0;
605 KiGetMachineBootPointers(IN PKGDTENTRY
*Gdt
,
610 KDESCRIPTOR GdtDescriptor
= { 0, 0, 0 }, IdtDescriptor
= { 0, 0, 0 };
611 KGDTENTRY TssSelector
, PcrSelector
;
614 /* Get GDT and IDT descriptors */
615 Ke386GetGlobalDescriptorTable(*(PKDESCRIPTOR
)&GdtDescriptor
.Limit
);
616 Ke386GetInterruptDescriptorTable(*(PKDESCRIPTOR
)&IdtDescriptor
.Limit
);
618 /* Save IDT and GDT */
619 *Gdt
= (PKGDTENTRY
)GdtDescriptor
.Base
;
620 *Idt
= (PKIDTENTRY
)IdtDescriptor
.Base
;
622 /* Get TSS and FS Selectors */
624 if (Tr
!= KGDT_TSS
) Tr
= KGDT_TSS
; // FIXME: HACKHACK
627 /* Get PCR Selector, mask it and get its GDT Entry */
628 PcrSelector
= *(PKGDTENTRY
)((ULONG_PTR
)*Gdt
+ (Fs
& ~RPL_MASK
));
630 /* Get the KPCR itself */
631 *Pcr
= (PKIPCR
)(ULONG_PTR
)(PcrSelector
.BaseLow
|
632 PcrSelector
.HighWord
.Bytes
.BaseMid
<< 16 |
633 PcrSelector
.HighWord
.Bytes
.BaseHi
<< 24);
635 /* Get TSS Selector, mask it and get its GDT Entry */
636 TssSelector
= *(PKGDTENTRY
)((ULONG_PTR
)*Gdt
+ (Tr
& ~RPL_MASK
));
638 /* Get the KTSS itself */
639 *Tss
= (PKTSS
)(ULONG_PTR
)(TssSelector
.BaseLow
|
640 TssSelector
.HighWord
.Bytes
.BaseMid
<< 16 |
641 TssSelector
.HighWord
.Bytes
.BaseHi
<< 24);
646 KiSystemStartupReal(IN PLOADER_PARAMETER_BLOCK LoaderBlock
)
649 PKTHREAD InitialThread
;
653 KIDTENTRY NmiEntry
, DoubleFaultEntry
;
657 /* Save the loader block and get the current CPU */
658 KeLoaderBlock
= LoaderBlock
;
659 Cpu
= KeNumberProcessors
;
662 /* If this is the boot CPU, set FS and the CPU Number*/
663 Ke386SetFs(KGDT_R0_PCR
);
664 __writefsdword(KPCR_PROCESSOR_NUMBER
, Cpu
);
666 /* Set the initial stack and idle thread as well */
667 LoaderBlock
->KernelStack
= (ULONG_PTR
)P0BootStack
;
668 LoaderBlock
->Thread
= (ULONG_PTR
)&KiInitialThread
;
671 /* Save the initial thread and stack */
672 InitialStack
= LoaderBlock
->KernelStack
;
673 InitialThread
= (PKTHREAD
)LoaderBlock
->Thread
;
675 /* Clean the APC List Head */
676 InitializeListHead(&InitialThread
->ApcState
.ApcListHead
[KernelMode
]);
678 /* Initialize the machine type */
679 KiInitializeMachineType();
681 /* Skip initial setup if this isn't the Boot CPU */
682 if (Cpu
) goto AppCpuInit
;
684 /* Get GDT, IDT, PCR and TSS pointers */
685 KiGetMachineBootPointers(&Gdt
, &Idt
, &Pcr
, &Tss
);
687 /* Setup the TSS descriptors and entries */
688 Ki386InitializeTss(Tss
, Idt
, Gdt
);
690 /* Initialize the PCR */
691 RtlZeroMemory(Pcr
, PAGE_SIZE
);
700 /* Set us as the current process */
701 InitialThread
->ApcState
.Process
= &KiInitialProcess
.Pcb
;
703 /* Clear DR6/7 to cleanup bootloader debugging */
704 __writefsdword(KPCR_TEB
, 0);
705 __writefsdword(KPCR_DR6
, 0);
706 __writefsdword(KPCR_DR7
, 0);
711 /* Load Ring 3 selectors for DS/ES */
712 Ke386SetDs(KGDT_R3_DATA
| RPL_MASK
);
713 Ke386SetEs(KGDT_R3_DATA
| RPL_MASK
);
715 /* Save NMI and double fault traps */
716 RtlCopyMemory(&NmiEntry
, &Idt
[2], sizeof(KIDTENTRY
));
717 RtlCopyMemory(&DoubleFaultEntry
, &Idt
[8], sizeof(KIDTENTRY
));
719 /* Copy kernel's trap handlers */
721 (PVOID
)KiIdtDescriptor
.Base
,
722 KiIdtDescriptor
.Limit
+ 1);
724 /* Restore NMI and double fault */
725 RtlCopyMemory(&Idt
[2], &NmiEntry
, sizeof(KIDTENTRY
));
726 RtlCopyMemory(&Idt
[8], &DoubleFaultEntry
, sizeof(KIDTENTRY
));
729 /* Loop until we can release the freeze lock */
732 /* Loop until execution can continue */
733 while (*(volatile PKSPIN_LOCK
*)&KiFreezeExecutionLock
== (PVOID
)1);
734 } while(InterlockedBitTestAndSet((PLONG
)&KiFreezeExecutionLock
, 0));
736 /* Setup CPU-related fields */
737 __writefsdword(KPCR_NUMBER
, Cpu
);
738 __writefsdword(KPCR_SET_MEMBER
, 1 << Cpu
);
739 __writefsdword(KPCR_SET_MEMBER_COPY
, 1 << Cpu
);
740 __writefsdword(KPCR_PRCB_SET_MEMBER
, 1 << Cpu
);
742 /* Initialize the Processor with HAL */
743 HalInitializeProcessor(Cpu
, KeLoaderBlock
);
745 /* Set active processors */
746 KeActiveProcessors
|= __readfsdword(KPCR_SET_MEMBER
);
747 KeNumberProcessors
++;
749 /* Check if this is the boot CPU */
752 /* Initialize debugging system */
753 KdInitSystem(0, KeLoaderBlock
);
755 /* Check for break-in */
756 if (KdPollBreakIn()) DbgBreakPointWithStatus(1);
759 /* Raise to HIGH_LEVEL */
760 KfRaiseIrql(HIGH_LEVEL
);
762 /* Align stack and make space for the trap frame and NPX frame */
763 InitialStack
&= ~(KTRAP_FRAME_ALIGN
- 1);
765 /* Switch to new kernel stack and start kernel bootstrapping */
766 KiSetupStackAndInitializeKernel(&KiInitialProcess
.Pcb
,
769 (PKPRCB
)__readfsdword(KPCR_PRCB
),