[NTOS]
[reactos.git] / reactos / ntoskrnl / mm / ARM3 / i386 / init.c
1 /*
2 * PROJECT: ReactOS Kernel
3 * LICENSE: BSD - See COPYING.ARM in the top level directory
4 * FILE: ntoskrnl/mm/ARM3/i386/init.c
5 * PURPOSE: ARM Memory Manager Initialization for x86
6 * PROGRAMMERS: ReactOS Portable Systems Group
7 */
8
9 /* INCLUDES *******************************************************************/
10
11 #include <ntoskrnl.h>
12 #define NDEBUG
13 #include <debug.h>
14
15 #define MODULE_INVOLVED_IN_ARM3
16 #include <mm/ARM3/miarm.h>
17
18 /* GLOBALS ********************************************************************/
19
20 /* Template PTE and PDE for a kernel page */
21 /* FIXME: These should be PTE_GLOBAL */
22 MMPTE ValidKernelPde = {{PTE_VALID|PTE_READWRITE|PTE_DIRTY|PTE_ACCESSED}};
23 MMPTE ValidKernelPte = {{PTE_VALID|PTE_READWRITE|PTE_DIRTY|PTE_ACCESSED}};
24
25 /* The same, but for local pages */
26 MMPTE ValidKernelPdeLocal = {{PTE_VALID|PTE_READWRITE|PTE_DIRTY|PTE_ACCESSED}};
27 MMPTE ValidKernelPteLocal = {{PTE_VALID|PTE_READWRITE|PTE_DIRTY|PTE_ACCESSED}};
28
29 /* Template PDE for a demand-zero page */
30 MMPDE DemandZeroPde = {{MM_READWRITE << MM_PTE_SOFTWARE_PROTECTION_BITS}};
31 MMPTE DemandZeroPte = {{MM_READWRITE << MM_PTE_SOFTWARE_PROTECTION_BITS}};
32
33 /* Template PTE for prototype page */
34 MMPTE PrototypePte = {{(MM_READWRITE << MM_PTE_SOFTWARE_PROTECTION_BITS) |
35 PTE_PROTOTYPE | (MI_PTE_LOOKUP_NEEDED << PAGE_SHIFT)}};
36
37 /* Template PTE for decommited page */
38 MMPTE MmDecommittedPte = {{MM_DECOMMIT << MM_PTE_SOFTWARE_PROTECTION_BITS}};
39
40 /* PRIVATE FUNCTIONS **********************************************************/
41
42 VOID
43 NTAPI
44 INIT_FUNCTION
45 MiInitializeSessionSpaceLayout(VOID)
46 {
47 //
48 // Set the size of session view, pool, and image
49 //
50 MmSessionSize = MI_SESSION_SIZE;
51 MmSessionViewSize = MI_SESSION_VIEW_SIZE;
52 MmSessionPoolSize = MI_SESSION_POOL_SIZE;
53 MmSessionImageSize = MI_SESSION_IMAGE_SIZE;
54
55 //
56 // Set the size of system view
57 //
58 MmSystemViewSize = MI_SYSTEM_VIEW_SIZE;
59
60 //
61 // This is where it all ends
62 //
63 MiSessionImageEnd = (PVOID)PTE_BASE;
64
65 //
66 // This is where we will load Win32k.sys and the video driver
67 //
68 MiSessionImageStart = (PVOID)((ULONG_PTR)MiSessionImageEnd -
69 MmSessionImageSize);
70
71 //
72 // So the view starts right below the session working set (itself below
73 // the image area)
74 //
75 MiSessionViewStart = (PVOID)((ULONG_PTR)MiSessionImageEnd -
76 MmSessionImageSize -
77 MI_SESSION_WORKING_SET_SIZE -
78 MmSessionViewSize);
79
80 //
81 // Session pool follows
82 //
83 MiSessionPoolEnd = MiSessionViewStart;
84 MiSessionPoolStart = (PVOID)((ULONG_PTR)MiSessionPoolEnd -
85 MmSessionPoolSize);
86
87 //
88 // And it all begins here
89 //
90 MmSessionBase = MiSessionPoolStart;
91
92 //
93 // Sanity check that our math is correct
94 //
95 ASSERT((ULONG_PTR)MmSessionBase + MmSessionSize == PTE_BASE);
96
97 //
98 // Session space ends wherever image session space ends
99 //
100 MiSessionSpaceEnd = MiSessionImageEnd;
101
102 //
103 // System view space ends at session space, so now that we know where
104 // this is, we can compute the base address of system view space itself.
105 //
106 MiSystemViewStart = (PVOID)((ULONG_PTR)MmSessionBase -
107 MmSystemViewSize);
108
109 /* Compute the PTE addresses for all the addresses we carved out */
110 MiSessionImagePteStart = MiAddressToPte(MiSessionImageStart);
111 MiSessionImagePteEnd = MiAddressToPte(MiSessionImageEnd);
112 MiSessionBasePte = MiAddressToPte(MmSessionBase);
113 MiSessionSpaceWs = (PVOID)((ULONG_PTR)MiSessionViewStart + MmSessionViewSize);
114 MiSessionLastPte = MiAddressToPte(MiSessionSpaceEnd);
115
116 /* Initialize session space */
117 MmSessionSpace = (PMM_SESSION_SPACE)((ULONG_PTR)MmSessionBase +
118 MmSessionSize -
119 MmSessionImageSize -
120 MM_ALLOCATION_GRANULARITY);
121 }
122
123 VOID
124 NTAPI
125 INIT_FUNCTION
126 MiComputeNonPagedPoolVa(IN ULONG FreePages)
127 {
128 IN PFN_NUMBER PoolPages;
129
130 /* Check if this is a machine with less than 256MB of RAM, and no overide */
131 if ((MmNumberOfPhysicalPages <= MI_MIN_PAGES_FOR_NONPAGED_POOL_TUNING) &&
132 !(MmSizeOfNonPagedPoolInBytes))
133 {
134 /* Force the non paged pool to be 2MB so we can reduce RAM usage */
135 MmSizeOfNonPagedPoolInBytes = 2 * _1MB;
136 }
137
138 /* Hyperspace ends here */
139 MmHyperSpaceEnd = (PVOID)((ULONG_PTR)MmSystemCacheWorkingSetList - 1);
140
141 /* Check if the user gave a ridicuously large nonpaged pool RAM size */
142 if ((MmSizeOfNonPagedPoolInBytes >> PAGE_SHIFT) > (FreePages * 7 / 8))
143 {
144 /* More than 7/8ths of RAM was dedicated to nonpaged pool, ignore! */
145 MmSizeOfNonPagedPoolInBytes = 0;
146 }
147
148 /* Check if no registry setting was set, or if the setting was too low */
149 if (MmSizeOfNonPagedPoolInBytes < MmMinimumNonPagedPoolSize)
150 {
151 /* Start with the minimum (256 KB) and add 32 KB for each MB above 4 */
152 MmSizeOfNonPagedPoolInBytes = MmMinimumNonPagedPoolSize;
153 MmSizeOfNonPagedPoolInBytes += (FreePages - 1024) / 256 * MmMinAdditionNonPagedPoolPerMb;
154 }
155
156 /* Check if the registy setting or our dynamic calculation was too high */
157 if (MmSizeOfNonPagedPoolInBytes > MI_MAX_INIT_NONPAGED_POOL_SIZE)
158 {
159 /* Set it to the maximum */
160 MmSizeOfNonPagedPoolInBytes = MI_MAX_INIT_NONPAGED_POOL_SIZE;
161 }
162
163 /* Check if a percentage cap was set through the registry */
164 if (MmMaximumNonPagedPoolPercent) UNIMPLEMENTED;
165
166 /* Page-align the nonpaged pool size */
167 MmSizeOfNonPagedPoolInBytes &= ~(PAGE_SIZE - 1);
168
169 /* Now, check if there was a registry size for the maximum size */
170 if (!MmMaximumNonPagedPoolInBytes)
171 {
172 /* Start with the default (1MB) */
173 MmMaximumNonPagedPoolInBytes = MmDefaultMaximumNonPagedPool;
174
175 /* Add space for PFN database */
176 MmMaximumNonPagedPoolInBytes += (ULONG)
177 PAGE_ALIGN((MmHighestPhysicalPage + 1) * sizeof(MMPFN));
178
179 /* Check if the machine has more than 512MB of free RAM */
180 if (FreePages >= 0x1F000)
181 {
182 /* Add 200KB for each MB above 4 */
183 MmMaximumNonPagedPoolInBytes += (FreePages - 1024) / 256 *
184 (MmMaxAdditionNonPagedPoolPerMb / 2);
185 if (MmMaximumNonPagedPoolInBytes < MI_MAX_NONPAGED_POOL_SIZE)
186 {
187 /* Make it at least 128MB since this machine has a lot of RAM */
188 MmMaximumNonPagedPoolInBytes = MI_MAX_NONPAGED_POOL_SIZE;
189 }
190 }
191 else
192 {
193 /* Add 400KB for each MB above 4 */
194 MmMaximumNonPagedPoolInBytes += (FreePages - 1024) / 256 *
195 MmMaxAdditionNonPagedPoolPerMb;
196 }
197 }
198
199 /* Make sure there's at least 16 pages + the PFN available for expansion */
200 PoolPages = MmSizeOfNonPagedPoolInBytes + (PAGE_SIZE * 16) +
201 ((ULONG)PAGE_ALIGN(MmHighestPhysicalPage + 1) * sizeof(MMPFN));
202 if (MmMaximumNonPagedPoolInBytes < PoolPages)
203 {
204 /* The maximum should be at least high enough to cover all the above */
205 MmMaximumNonPagedPoolInBytes = PoolPages;
206 }
207
208 /* Systems with 2GB of kernel address space get double the size */
209 PoolPages = MI_MAX_NONPAGED_POOL_SIZE * 2;
210
211 /* On the other hand, make sure that PFN + nonpaged pool doesn't get too big */
212 if (MmMaximumNonPagedPoolInBytes > PoolPages)
213 {
214 /* Trim it down to the maximum architectural limit (256MB) */
215 MmMaximumNonPagedPoolInBytes = PoolPages;
216 }
217
218 /* Check if this is a system with > 128MB of non paged pool */
219 if (MmMaximumNonPagedPoolInBytes > MI_MAX_NONPAGED_POOL_SIZE)
220 {
221 /* Check if the initial size is less than the extra 128MB boost */
222 if (MmSizeOfNonPagedPoolInBytes < (MmMaximumNonPagedPoolInBytes -
223 MI_MAX_NONPAGED_POOL_SIZE))
224 {
225 /* FIXME: Should check if the initial pool can be expanded */
226
227 /* Assume no expansion possible, check ift he maximum is too large */
228 if (MmMaximumNonPagedPoolInBytes > (MmSizeOfNonPagedPoolInBytes +
229 MI_MAX_NONPAGED_POOL_SIZE))
230 {
231 /* Set it to the initial value plus the boost */
232 MmMaximumNonPagedPoolInBytes = MmSizeOfNonPagedPoolInBytes +
233 MI_MAX_NONPAGED_POOL_SIZE;
234 }
235 }
236 }
237 }
238
239 NTSTATUS
240 NTAPI
241 INIT_FUNCTION
242 MiInitMachineDependent(IN PLOADER_PARAMETER_BLOCK LoaderBlock)
243 {
244 PFN_NUMBER PageFrameIndex;
245 PMMPTE StartPde, EndPde, PointerPte, LastPte;
246 MMPTE TempPde, TempPte;
247 PVOID NonPagedPoolExpansionVa;
248 KIRQL OldIrql;
249 PMMPFN Pfn1;
250 ULONG Flags;
251
252 #if defined(_GLOBAL_PAGES_ARE_AWESOME_)
253
254 /* Check for global bit */
255 if (KeFeatureBits & KF_GLOBAL_PAGE)
256 {
257 /* Set it on the template PTE and PDE */
258 ValidKernelPte.u.Hard.Global = TRUE;
259 ValidKernelPde.u.Hard.Global = TRUE;
260 }
261
262 #endif
263
264 /* Now templates are ready */
265 TempPte = ValidKernelPte;
266 TempPde = ValidKernelPde;
267
268 //
269 // Set CR3 for the system process
270 //
271 PointerPte = MiAddressToPde(PDE_BASE);
272 PageFrameIndex = PFN_FROM_PTE(PointerPte) << PAGE_SHIFT;
273 PsGetCurrentProcess()->Pcb.DirectoryTableBase[0] = PageFrameIndex;
274
275 //
276 // Blow away user-mode
277 //
278 StartPde = MiAddressToPde(0);
279 EndPde = MiAddressToPde(KSEG0_BASE);
280 RtlZeroMemory(StartPde, (EndPde - StartPde) * sizeof(MMPTE));
281
282 /* Compute non paged pool limits and size */
283 MiComputeNonPagedPoolVa(MiNumberOfFreePages);
284
285 //
286 // Now calculate the nonpaged pool expansion VA region
287 //
288 MmNonPagedPoolStart = (PVOID)((ULONG_PTR)MmNonPagedPoolEnd -
289 MmMaximumNonPagedPoolInBytes +
290 MmSizeOfNonPagedPoolInBytes);
291 MmNonPagedPoolStart = (PVOID)PAGE_ALIGN(MmNonPagedPoolStart);
292 NonPagedPoolExpansionVa = MmNonPagedPoolStart;
293 DPRINT("NP Pool has been tuned to: %lu bytes and %lu bytes\n",
294 MmSizeOfNonPagedPoolInBytes, MmMaximumNonPagedPoolInBytes);
295
296 //
297 // Now calculate the nonpaged system VA region, which includes the
298 // nonpaged pool expansion (above) and the system PTEs. Note that it is
299 // then aligned to a PDE boundary (4MB).
300 //
301 MiNonPagedSystemSize = (MmNumberOfSystemPtes + 1) * PAGE_SIZE;
302 MmNonPagedSystemStart = (PVOID)((ULONG_PTR)MmNonPagedPoolStart -
303 MiNonPagedSystemSize);
304 MmNonPagedSystemStart = (PVOID)((ULONG_PTR)MmNonPagedSystemStart &
305 ~(PDE_MAPPED_VA - 1));
306
307 //
308 // Don't let it go below the minimum
309 //
310 if (MmNonPagedSystemStart < (PVOID)0xEB000000)
311 {
312 //
313 // This is a hard-coded limit in the Windows NT address space
314 //
315 MmNonPagedSystemStart = (PVOID)0xEB000000;
316
317 //
318 // Reduce the amount of system PTEs to reach this point
319 //
320 MmNumberOfSystemPtes = ((ULONG_PTR)MmNonPagedPoolStart -
321 (ULONG_PTR)MmNonPagedSystemStart) >>
322 PAGE_SHIFT;
323 MmNumberOfSystemPtes--;
324 ASSERT(MmNumberOfSystemPtes > 1000);
325 }
326
327 //
328 // Check if we are in a situation where the size of the paged pool
329 // is so large that it overflows into nonpaged pool
330 //
331 if (MmSizeOfPagedPoolInBytes >
332 ((ULONG_PTR)MmNonPagedSystemStart - (ULONG_PTR)MmPagedPoolStart))
333 {
334 //
335 // We need some recalculations here
336 //
337 DPRINT1("Paged pool is too big!\n");
338 }
339
340 //
341 // Normally, the PFN database should start after the loader images.
342 // This is already the case in ReactOS, but for now we want to co-exist
343 // with the old memory manager, so we'll create a "Shadow PFN Database"
344 // instead, and arbitrarly start it at 0xB0000000.
345 //
346 MmPfnDatabase = (PVOID)0xB0000000;
347 ASSERT(((ULONG_PTR)MmPfnDatabase & (PDE_MAPPED_VA - 1)) == 0);
348
349 //
350 // Non paged pool comes after the PFN database
351 //
352 MmNonPagedPoolStart = (PVOID)((ULONG_PTR)MmPfnDatabase +
353 (MxPfnAllocation << PAGE_SHIFT));
354
355 //
356 // Now we actually need to get these many physical pages. Nonpaged pool
357 // is actually also physically contiguous (but not the expansion)
358 //
359 PageFrameIndex = MxGetNextPage(MxPfnAllocation +
360 (MmSizeOfNonPagedPoolInBytes >> PAGE_SHIFT));
361 ASSERT(PageFrameIndex != 0);
362 DPRINT("PFN DB PA PFN begins at: %lx\n", PageFrameIndex);
363 DPRINT("NP PA PFN begins at: %lx\n", PageFrameIndex + MxPfnAllocation);
364
365 /* Convert nonpaged pool size from bytes to pages */
366 MmMaximumNonPagedPoolInPages = MmMaximumNonPagedPoolInBytes >> PAGE_SHIFT;
367
368 //
369 // Now we need some pages to create the page tables for the NP system VA
370 // which includes system PTEs and expansion NP
371 //
372 StartPde = MiAddressToPde(MmNonPagedSystemStart);
373 EndPde = MiAddressToPde((PVOID)((ULONG_PTR)MmNonPagedPoolEnd - 1));
374 while (StartPde <= EndPde)
375 {
376 //
377 // Get a page
378 //
379 TempPde.u.Hard.PageFrameNumber = MxGetNextPage(1);
380 MI_WRITE_VALID_PTE(StartPde, TempPde);
381
382 //
383 // Zero out the page table
384 //
385 PointerPte = MiPteToAddress(StartPde);
386 RtlZeroMemory(PointerPte, PAGE_SIZE);
387
388 //
389 // Next
390 //
391 StartPde++;
392 }
393
394 //
395 // Now we need pages for the page tables which will map initial NP
396 //
397 StartPde = MiAddressToPde(MmPfnDatabase);
398 EndPde = MiAddressToPde((PVOID)((ULONG_PTR)MmNonPagedPoolStart +
399 MmSizeOfNonPagedPoolInBytes - 1));
400 while (StartPde <= EndPde)
401 {
402 //
403 // Get a page
404 //
405 TempPde.u.Hard.PageFrameNumber = MxGetNextPage(1);
406 MI_WRITE_VALID_PTE(StartPde, TempPde);
407
408 //
409 // Zero out the page table
410 //
411 PointerPte = MiPteToAddress(StartPde);
412 RtlZeroMemory(PointerPte, PAGE_SIZE);
413
414 //
415 // Next
416 //
417 StartPde++;
418 }
419
420 //
421 // Now remember where the expansion starts
422 //
423 MmNonPagedPoolExpansionStart = NonPagedPoolExpansionVa;
424
425 //
426 // Last step is to actually map the nonpaged pool
427 //
428 PointerPte = MiAddressToPte(MmNonPagedPoolStart);
429 LastPte = MiAddressToPte((PVOID)((ULONG_PTR)MmNonPagedPoolStart +
430 MmSizeOfNonPagedPoolInBytes - 1));
431 while (PointerPte <= LastPte)
432 {
433 //
434 // Use one of our contigous pages
435 //
436 TempPte.u.Hard.PageFrameNumber = PageFrameIndex++;
437 MI_WRITE_VALID_PTE(PointerPte++, TempPte);
438 }
439
440 //
441 // Sanity check: make sure we have properly defined the system PTE space
442 //
443 ASSERT(MiAddressToPte(MmNonPagedSystemStart) <
444 MiAddressToPte(MmNonPagedPoolExpansionStart));
445
446 /* Now go ahead and initialize the nonpaged pool */
447 MiInitializeNonPagedPool();
448 MiInitializeNonPagedPoolThresholds();
449
450 /* Map the PFN database pages */
451 MiMapPfnDatabase(LoaderBlock);
452
453 /* Initialize the color tables */
454 MiInitializeColorTables();
455
456 /* Build the PFN Database */
457 MiInitializePfnDatabase(LoaderBlock);
458 MmInitializeBalancer(MmAvailablePages, 0);
459
460 //
461 // Reset the descriptor back so we can create the correct memory blocks
462 //
463 *MxFreeDescriptor = MxOldFreeDescriptor;
464
465 //
466 // Initialize the nonpaged pool
467 //
468 InitializePool(NonPagedPool, 0);
469
470 //
471 // We PDE-aligned the nonpaged system start VA, so haul some extra PTEs!
472 //
473 PointerPte = MiAddressToPte(MmNonPagedSystemStart);
474 MmNumberOfSystemPtes = MiAddressToPte(MmNonPagedPoolExpansionStart) -
475 PointerPte;
476 MmNumberOfSystemPtes--;
477 DPRINT("Final System PTE count: %lu (%lu bytes)\n",
478 MmNumberOfSystemPtes, MmNumberOfSystemPtes * PAGE_SIZE);
479
480 //
481 // Create the system PTE space
482 //
483 MiInitializeSystemPtes(PointerPte, MmNumberOfSystemPtes, SystemPteSpace);
484
485 /* Get the PDE For hyperspace */
486 StartPde = MiAddressToPde(HYPER_SPACE);
487
488 /* Lock PFN database */
489 OldIrql = KeAcquireQueuedSpinLock(LockQueuePfnLock);
490
491 /* Allocate a page for hyperspace and create it */
492 MI_SET_USAGE(MI_USAGE_PAGE_TABLE);
493 MI_SET_PROCESS2("Kernel");
494 PageFrameIndex = MiRemoveAnyPage(0);
495 TempPde = ValidKernelPdeLocal;
496 TempPde.u.Hard.PageFrameNumber = PageFrameIndex;
497 MI_WRITE_VALID_PTE(StartPde, TempPde);
498
499 /* Flush the TLB */
500 KeFlushCurrentTb();
501
502 /* Release the lock */
503 KeReleaseQueuedSpinLock(LockQueuePfnLock, OldIrql);
504
505 //
506 // Zero out the page table now
507 //
508 PointerPte = MiAddressToPte(HYPER_SPACE);
509 RtlZeroMemory(PointerPte, PAGE_SIZE);
510
511 //
512 // Setup the mapping PTEs
513 //
514 MmFirstReservedMappingPte = MiAddressToPte(MI_MAPPING_RANGE_START);
515 MmLastReservedMappingPte = MiAddressToPte(MI_MAPPING_RANGE_END);
516 MmFirstReservedMappingPte->u.Hard.PageFrameNumber = MI_HYPERSPACE_PTES;
517
518 /* Set the working set address */
519 MmWorkingSetList = (PVOID)MI_WORKING_SET_LIST;
520
521 //
522 // Reserve system PTEs for zeroing PTEs and clear them
523 //
524 MiFirstReservedZeroingPte = MiReserveSystemPtes(MI_ZERO_PTES,
525 SystemPteSpace);
526 RtlZeroMemory(MiFirstReservedZeroingPte, MI_ZERO_PTES * sizeof(MMPTE));
527
528 //
529 // Set the counter to maximum to boot with
530 //
531 MiFirstReservedZeroingPte->u.Hard.PageFrameNumber = MI_ZERO_PTES - 1;
532
533 /* Lock PFN database */
534 OldIrql = KeAcquireQueuedSpinLock(LockQueuePfnLock);
535
536 /* Reset the ref/share count so that MmInitializeProcessAddressSpace works */
537 Pfn1 = MiGetPfnEntry(PFN_FROM_PTE(MiAddressToPde(PDE_BASE)));
538 Pfn1->u2.ShareCount = 0;
539 Pfn1->u3.e2.ReferenceCount = 0;
540
541 /* Get a page for the working set list */
542 MI_SET_USAGE(MI_USAGE_PAGE_TABLE);
543 MI_SET_PROCESS2("Kernel WS List");
544 PageFrameIndex = MiRemoveAnyPage(0);
545 TempPte = ValidKernelPteLocal;
546 TempPte.u.Hard.PageFrameNumber = PageFrameIndex;
547
548 /* Map the working set list */
549 PointerPte = MiAddressToPte(MmWorkingSetList);
550 MI_WRITE_VALID_PTE(PointerPte, TempPte);
551
552 /* Zero it out, and save the frame index */
553 RtlZeroMemory(MiPteToAddress(PointerPte), PAGE_SIZE);
554 PsGetCurrentProcess()->WorkingSetPage = PageFrameIndex;
555
556 /* Check for Pentium LOCK errata */
557 if (KiI386PentiumLockErrataPresent)
558 {
559 /* Mark the 1st IDT page as Write-Through to prevent a lockup
560 on a F00F instruction.
561 See http://www.rcollins.org/Errata/Dec97/F00FBug.html */
562 PointerPte = MiAddressToPte(KeGetPcr()->IDT);
563 PointerPte->u.Hard.WriteThrough = 1;
564 }
565
566 /* Release the lock */
567 KeReleaseQueuedSpinLock(LockQueuePfnLock, OldIrql);
568
569 /* Initialize the bogus address space */
570 Flags = 0;
571 MmInitializeProcessAddressSpace(PsGetCurrentProcess(), NULL, NULL, &Flags, NULL);
572
573 /* Make sure the color lists are valid */
574 ASSERT(MmFreePagesByColor[0] < (PMMCOLOR_TABLES)PTE_BASE);
575 StartPde = MiAddressToPde(MmFreePagesByColor[0]);
576 ASSERT(StartPde->u.Hard.Valid == 1);
577 PointerPte = MiAddressToPte(MmFreePagesByColor[0]);
578 ASSERT(PointerPte->u.Hard.Valid == 1);
579 LastPte = MiAddressToPte((ULONG_PTR)&MmFreePagesByColor[1][MmSecondaryColors] - 1);
580 ASSERT(LastPte->u.Hard.Valid == 1);
581
582 /* Loop the color list PTEs */
583 while (PointerPte <= LastPte)
584 {
585 /* Get the PFN entry */
586 Pfn1 = MiGetPfnEntry(PFN_FROM_PTE(PointerPte));
587 if (!Pfn1->u3.e2.ReferenceCount)
588 {
589 /* Fill it out */
590 Pfn1->u4.PteFrame = PFN_FROM_PTE(StartPde);
591 Pfn1->PteAddress = PointerPte;
592 Pfn1->u2.ShareCount++;
593 Pfn1->u3.e2.ReferenceCount = 1;
594 Pfn1->u3.e1.PageLocation = ActiveAndValid;
595 Pfn1->u3.e1.CacheAttribute = MiCached;
596 }
597
598 /* Keep going */
599 PointerPte++;
600 }
601
602 /* All done */
603 return STATUS_SUCCESS;
604 }
605
606 /* EOF */