[winnt.h]
[reactos.git] / reactos / ntoskrnl / mm / ARM3 / miarm.h
1 /*
2 * PROJECT: ReactOS Kernel
3 * LICENSE: BSD - See COPYING.ARM in the top level directory
4 * FILE: ntoskrnl/mm/ARM3/miarm.h
5 * PURPOSE: ARM Memory Manager Header
6 * PROGRAMMERS: ReactOS Portable Systems Group
7 */
8
9 #define MI_MIN_PAGES_FOR_NONPAGED_POOL_TUNING ((255*1024*1024) >> PAGE_SHIFT)
10 #define MI_MIN_PAGES_FOR_SYSPTE_TUNING ((19*1024*1024) >> PAGE_SHIFT)
11 #define MI_MIN_PAGES_FOR_SYSPTE_BOOST ((32*1024*1024) >> PAGE_SHIFT)
12 #define MI_MAX_INIT_NONPAGED_POOL_SIZE (128 * 1024 * 1024)
13 #define MI_MAX_NONPAGED_POOL_SIZE (128 * 1024 * 1024)
14 #define MI_MAX_FREE_PAGE_LISTS 4
15
16 #define MI_MIN_INIT_PAGED_POOLSIZE (32 * 1024 * 1024)
17
18 #define MI_SESSION_VIEW_SIZE (20 * 1024 * 1024)
19 #define MI_SESSION_POOL_SIZE (16 * 1024 * 1024)
20 #define MI_SESSION_IMAGE_SIZE (8 * 1024 * 1024)
21 #define MI_SESSION_WORKING_SET_SIZE (4 * 1024 * 1024)
22 #define MI_SESSION_SIZE (MI_SESSION_VIEW_SIZE + \
23 MI_SESSION_POOL_SIZE + \
24 MI_SESSION_IMAGE_SIZE + \
25 MI_SESSION_WORKING_SET_SIZE)
26
27 #define MI_SYSTEM_VIEW_SIZE (16 * 1024 * 1024)
28
29 #define MI_SYSTEM_CACHE_WS_START (PVOID)0xC0C00000
30 #define MI_PAGED_POOL_START (PVOID)0xE1000000
31 #define MI_NONPAGED_POOL_END (PVOID)0xFFBE0000
32 #define MI_DEBUG_MAPPING (PVOID)0xFFBFF000
33
34 #define MI_MIN_SECONDARY_COLORS 8
35 #define MI_SECONDARY_COLORS 64
36 #define MI_MAX_SECONDARY_COLORS 1024
37
38 #define MM_HIGHEST_VAD_ADDRESS \
39 (PVOID)((ULONG_PTR)MM_HIGHEST_USER_ADDRESS - (16 * PAGE_SIZE))
40
41 /* Make the code cleaner with some definitions for size multiples */
42 #define _1KB (1024)
43 #define _1MB (1024 * _1KB)
44
45 /* Area mapped by a PDE */
46 #define PDE_MAPPED_VA (PTE_COUNT * PAGE_SIZE)
47
48 /* Size of a PDE directory, and size of a page table */
49 #define PDE_SIZE (PDE_COUNT * sizeof(MMPDE))
50 #define PT_SIZE (PTE_COUNT * sizeof(MMPTE))
51
52 /* Architecture specific count of PDEs in a directory, and count of PTEs in a PT */
53 #ifdef _M_IX86
54 #define PD_COUNT 1
55 #define PDE_COUNT 1024
56 #define PTE_COUNT 1024
57 #elif _M_ARM
58 #define PD_COUNT 1
59 #define PDE_COUNT 4096
60 #define PTE_COUNT 256
61 #else
62 #error Define these please!
63 #endif
64
65 #ifdef _M_IX86
66 #define IMAGE_FILE_MACHINE_NATIVE IMAGE_FILE_MACHINE_I386
67 #elif _M_ARM
68 #define IMAGE_FILE_MACHINE_NATIVE IMAGE_FILE_MACHINE_ARM
69 #elif _M_AMD64
70 #define IMAGE_FILE_MACHINE_NATIVE IMAGE_FILE_MACHINE_AMD64
71 #else
72 #error Define these please!
73 #endif
74
75 //
76 // Protection Bits part of the internal memory manager Protection Mask
77 // Taken from http://www.reactos.org/wiki/Techwiki:Memory_management_in_the_Windows_XP_kernel
78 // and public assertions.
79 //
80 #define MM_ZERO_ACCESS 0
81 #define MM_READONLY 1
82 #define MM_EXECUTE 2
83 #define MM_EXECUTE_READ 3
84 #define MM_READWRITE 4
85 #define MM_WRITECOPY 5
86 #define MM_EXECUTE_READWRITE 6
87 #define MM_EXECUTE_WRITECOPY 7
88 #define MM_NOCACHE 8
89 #define MM_DECOMMIT 0x10
90 #define MM_NOACCESS (MM_DECOMMIT | MM_NOCACHE)
91
92 //
93 // Specific PTE Definitions that map to the Memory Manager's Protection Mask Bits
94 // The Memory Manager's definition define the attributes that must be preserved
95 // and these PTE definitions describe the attributes in the hardware sense. This
96 // helps deal with hardware differences between the actual boolean expression of
97 // the argument.
98 //
99 // For example, in the logical attributes, we want to express read-only as a flag
100 // but on x86, it is writability that must be set. On the other hand, on x86, just
101 // like in the kernel, it is disabling the caches that requires a special flag,
102 // while on certain architectures such as ARM, it is enabling the cache which
103 // requires a flag.
104 //
105 #if defined(_M_IX86) || defined(_M_AMD64)
106 //
107 // Access Flags
108 //
109 #define PTE_READONLY 0
110 #define PTE_EXECUTE 0 // Not worrying about NX yet
111 #define PTE_EXECUTE_READ 0 // Not worrying about NX yet
112 #define PTE_READWRITE 0x2
113 #define PTE_WRITECOPY 0x200
114 #define PTE_EXECUTE_READWRITE 0x0
115 #define PTE_EXECUTE_WRITECOPY 0x200
116 //
117 // Cache flags
118 //
119 #define PTE_ENABLE_CACHE 0
120 #define PTE_DISABLE_CACHE 0x10
121 #define PTE_WRITECOMBINED_CACHE 0x10
122 #elif defined(_M_ARM)
123 #else
124 #error Define these please!
125 #endif
126 static const
127 ULONG
128 MmProtectToPteMask[32] =
129 {
130 //
131 // These are the base MM_ protection flags
132 //
133 0,
134 PTE_READONLY | PTE_ENABLE_CACHE,
135 PTE_EXECUTE | PTE_ENABLE_CACHE,
136 PTE_EXECUTE_READ | PTE_ENABLE_CACHE,
137 PTE_READWRITE | PTE_ENABLE_CACHE,
138 PTE_WRITECOPY | PTE_ENABLE_CACHE,
139 PTE_EXECUTE_READWRITE | PTE_ENABLE_CACHE,
140 PTE_EXECUTE_WRITECOPY | PTE_ENABLE_CACHE,
141 //
142 // These OR in the MM_NOCACHE flag
143 //
144 0,
145 PTE_READONLY | PTE_DISABLE_CACHE,
146 PTE_EXECUTE | PTE_DISABLE_CACHE,
147 PTE_EXECUTE_READ | PTE_DISABLE_CACHE,
148 PTE_READWRITE | PTE_DISABLE_CACHE,
149 PTE_WRITECOPY | PTE_DISABLE_CACHE,
150 PTE_EXECUTE_READWRITE | PTE_DISABLE_CACHE,
151 PTE_EXECUTE_WRITECOPY | PTE_DISABLE_CACHE,
152 //
153 // These OR in the MM_DECOMMIT flag, which doesn't seem supported on x86/64/ARM
154 //
155 0,
156 PTE_READONLY | PTE_ENABLE_CACHE,
157 PTE_EXECUTE | PTE_ENABLE_CACHE,
158 PTE_EXECUTE_READ | PTE_ENABLE_CACHE,
159 PTE_READWRITE | PTE_ENABLE_CACHE,
160 PTE_WRITECOPY | PTE_ENABLE_CACHE,
161 PTE_EXECUTE_READWRITE | PTE_ENABLE_CACHE,
162 PTE_EXECUTE_WRITECOPY | PTE_ENABLE_CACHE,
163 //
164 // These OR in the MM_NOACCESS flag, which seems to enable WriteCombining?
165 //
166 0,
167 PTE_READONLY | PTE_WRITECOMBINED_CACHE,
168 PTE_EXECUTE | PTE_WRITECOMBINED_CACHE,
169 PTE_EXECUTE_READ | PTE_WRITECOMBINED_CACHE,
170 PTE_READWRITE | PTE_WRITECOMBINED_CACHE,
171 PTE_WRITECOPY | PTE_WRITECOMBINED_CACHE,
172 PTE_EXECUTE_READWRITE | PTE_WRITECOMBINED_CACHE,
173 PTE_EXECUTE_WRITECOPY | PTE_WRITECOMBINED_CACHE,
174 };
175
176 //
177 // Assertions for session images, addresses, and PTEs
178 //
179 #define MI_IS_SESSION_IMAGE_ADDRESS(Address) \
180 (((Address) >= MiSessionImageStart) && ((Address) < MiSessionImageEnd))
181
182 #define MI_IS_SESSION_ADDRESS(Address) \
183 (((Address) >= MmSessionBase) && ((Address) < MiSessionSpaceEnd))
184
185 #define MI_IS_SESSION_PTE(Pte) \
186 ((((PMMPTE)Pte) >= MiSessionBasePte) && (((PMMPTE)Pte) < MiSessionLastPte))
187
188 //
189 // Corresponds to MMPTE_SOFTWARE.Protection
190 //
191 #ifdef _M_IX86
192 #define MM_PTE_SOFTWARE_PROTECTION_BITS 5
193 #elif _M_ARM
194 #define MM_PTE_SOFTWARE_PROTECTION_BITS 5
195 #elif _M_AMD64
196 #define MM_PTE_SOFTWARE_PROTECTION_BITS 5
197 #else
198 #error Define these please!
199 #endif
200
201 //
202 // Creates a software PTE with the given protection
203 //
204 #define MI_MAKE_SOFTWARE_PTE(p, x) ((p)->u.Long = (x << MM_PTE_SOFTWARE_PROTECTION_BITS))
205
206 //
207 // Marks a PTE as deleted
208 //
209 #define MI_SET_PFN_DELETED(x) ((x)->PteAddress = (PMMPTE)((ULONG_PTR)(x)->PteAddress | 1))
210 #define MI_IS_PFN_DELETED(x) ((ULONG_PTR)((x)->PteAddress) & 1)
211
212 //
213 // Special values for LoadedImports
214 //
215 #define MM_SYSLDR_NO_IMPORTS (PVOID)0xFFFFFFFE
216 #define MM_SYSLDR_BOOT_LOADED (PVOID)0xFFFFFFFF
217 #define MM_SYSLDR_SINGLE_ENTRY 0x1
218
219 //
220 // PFN List Sentinel
221 //
222 #define LIST_HEAD 0xFFFFFFFF
223
224 //
225 // Special IRQL value (found in assertions)
226 //
227 #define MM_NOIRQL (KIRQL)0xFFFFFFFF
228
229 //
230 // FIXFIX: These should go in ex.h after the pool merge
231 //
232 #define POOL_LISTS_PER_PAGE (PAGE_SIZE / sizeof(LIST_ENTRY))
233 #define BASE_POOL_TYPE_MASK 1
234 #define POOL_MAX_ALLOC (PAGE_SIZE - (sizeof(POOL_HEADER) + sizeof(LIST_ENTRY)))
235
236 typedef struct _POOL_DESCRIPTOR
237 {
238 POOL_TYPE PoolType;
239 ULONG PoolIndex;
240 ULONG RunningAllocs;
241 ULONG RunningDeAllocs;
242 ULONG TotalPages;
243 ULONG TotalBigPages;
244 ULONG Threshold;
245 PVOID LockAddress;
246 PVOID PendingFrees;
247 LONG PendingFreeDepth;
248 SIZE_T TotalBytes;
249 SIZE_T Spare0;
250 LIST_ENTRY ListHeads[POOL_LISTS_PER_PAGE];
251 } POOL_DESCRIPTOR, *PPOOL_DESCRIPTOR;
252
253 typedef struct _POOL_HEADER
254 {
255 union
256 {
257 struct
258 {
259 USHORT PreviousSize:9;
260 USHORT PoolIndex:7;
261 USHORT BlockSize:9;
262 USHORT PoolType:7;
263 };
264 ULONG Ulong1;
265 };
266 union
267 {
268 ULONG PoolTag;
269 struct
270 {
271 USHORT AllocatorBackTraceIndex;
272 USHORT PoolTagHash;
273 };
274 };
275 } POOL_HEADER, *PPOOL_HEADER;
276
277 //
278 // Everything depends on this
279 //
280 C_ASSERT(sizeof(POOL_HEADER) == 8);
281 C_ASSERT(sizeof(POOL_HEADER) == sizeof(LIST_ENTRY));
282
283 extern ULONG ExpNumberOfPagedPools;
284 extern POOL_DESCRIPTOR NonPagedPoolDescriptor;
285 extern PPOOL_DESCRIPTOR ExpPagedPoolDescriptor[16 + 1];
286 extern PVOID PoolTrackTable;
287
288 //
289 // END FIXFIX
290 //
291
292 typedef struct _MI_LARGE_PAGE_DRIVER_ENTRY
293 {
294 LIST_ENTRY Links;
295 UNICODE_STRING BaseName;
296 } MI_LARGE_PAGE_DRIVER_ENTRY, *PMI_LARGE_PAGE_DRIVER_ENTRY;
297
298 typedef enum _MMSYSTEM_PTE_POOL_TYPE
299 {
300 SystemPteSpace,
301 NonPagedPoolExpansion,
302 MaximumPtePoolTypes
303 } MMSYSTEM_PTE_POOL_TYPE;
304
305 typedef enum _MI_PFN_CACHE_ATTRIBUTE
306 {
307 MiNonCached,
308 MiCached,
309 MiWriteCombined,
310 MiNotMapped
311 } MI_PFN_CACHE_ATTRIBUTE, *PMI_PFN_CACHE_ATTRIBUTE;
312
313 typedef struct _PHYSICAL_MEMORY_RUN
314 {
315 ULONG BasePage;
316 ULONG PageCount;
317 } PHYSICAL_MEMORY_RUN, *PPHYSICAL_MEMORY_RUN;
318
319 typedef struct _PHYSICAL_MEMORY_DESCRIPTOR
320 {
321 ULONG NumberOfRuns;
322 ULONG NumberOfPages;
323 PHYSICAL_MEMORY_RUN Run[1];
324 } PHYSICAL_MEMORY_DESCRIPTOR, *PPHYSICAL_MEMORY_DESCRIPTOR;
325
326 typedef struct _MMCOLOR_TABLES
327 {
328 PFN_NUMBER Flink;
329 PVOID Blink;
330 PFN_NUMBER Count;
331 } MMCOLOR_TABLES, *PMMCOLOR_TABLES;
332
333 typedef struct _MI_LARGE_PAGE_RANGES
334 {
335 PFN_NUMBER StartFrame;
336 PFN_NUMBER LastFrame;
337 } MI_LARGE_PAGE_RANGES, *PMI_LARGE_PAGE_RANGES;
338
339 extern MMPTE HyperTemplatePte;
340 extern MMPTE ValidKernelPde;
341 extern MMPTE ValidKernelPte;
342 extern BOOLEAN MmLargeSystemCache;
343 extern BOOLEAN MmZeroPageFile;
344 extern BOOLEAN MmProtectFreedNonPagedPool;
345 extern BOOLEAN MmTrackLockedPages;
346 extern BOOLEAN MmTrackPtes;
347 extern BOOLEAN MmDynamicPfn;
348 extern BOOLEAN MmMirroring;
349 extern BOOLEAN MmMakeLowMemory;
350 extern BOOLEAN MmEnforceWriteProtection;
351 extern ULONG MmAllocationFragment;
352 extern ULONG MmConsumedPoolPercentage;
353 extern ULONG MmVerifyDriverBufferType;
354 extern ULONG MmVerifyDriverLevel;
355 extern WCHAR MmVerifyDriverBuffer[512];
356 extern WCHAR MmLargePageDriverBuffer[512];
357 extern LIST_ENTRY MiLargePageDriverList;
358 extern BOOLEAN MiLargePageAllDrivers;
359 extern ULONG MmVerifyDriverBufferLength;
360 extern ULONG MmLargePageDriverBufferLength;
361 extern ULONG MmSizeOfNonPagedPoolInBytes;
362 extern ULONG MmMaximumNonPagedPoolInBytes;
363 extern PFN_NUMBER MmMaximumNonPagedPoolInPages;
364 extern PFN_NUMBER MmSizeOfPagedPoolInPages;
365 extern PVOID MmNonPagedSystemStart;
366 extern PVOID MmNonPagedPoolStart;
367 extern PVOID MmNonPagedPoolExpansionStart;
368 extern PVOID MmNonPagedPoolEnd;
369 extern ULONG MmSizeOfPagedPoolInBytes;
370 extern PVOID MmPagedPoolStart;
371 extern PVOID MmPagedPoolEnd;
372 extern PVOID MmSessionBase;
373 extern ULONG MmSessionSize;
374 extern PMMPTE MmFirstReservedMappingPte, MmLastReservedMappingPte;
375 extern PMMPTE MiFirstReservedZeroingPte;
376 extern MI_PFN_CACHE_ATTRIBUTE MiPlatformCacheAttributes[2][MmMaximumCacheType];
377 extern PPHYSICAL_MEMORY_DESCRIPTOR MmPhysicalMemoryBlock;
378 extern ULONG MmBootImageSize;
379 extern PMMPTE MmSystemPtesStart[MaximumPtePoolTypes];
380 extern PMMPTE MmSystemPtesEnd[MaximumPtePoolTypes];
381 extern PMEMORY_ALLOCATION_DESCRIPTOR MxFreeDescriptor;
382 extern MEMORY_ALLOCATION_DESCRIPTOR MxOldFreeDescriptor;
383 extern ULONG MxPfnAllocation;
384 extern MM_PAGED_POOL_INFO MmPagedPoolInfo;
385 extern RTL_BITMAP MiPfnBitMap;
386 extern KGUARDED_MUTEX MmPagedPoolMutex;
387 extern PVOID MmPagedPoolStart;
388 extern PVOID MmPagedPoolEnd;
389 extern PVOID MmNonPagedSystemStart;
390 extern PVOID MiSystemViewStart;
391 extern ULONG MmSystemViewSize;
392 extern PVOID MmSessionBase;
393 extern PVOID MiSessionSpaceEnd;
394 extern PMMPTE MiSessionImagePteStart;
395 extern PMMPTE MiSessionImagePteEnd;
396 extern PMMPTE MiSessionBasePte;
397 extern PMMPTE MiSessionLastPte;
398 extern ULONG MmSizeOfPagedPoolInBytes;
399 extern PMMPTE MmSystemPagePtes;
400 extern PVOID MmSystemCacheStart;
401 extern PVOID MmSystemCacheEnd;
402 extern MMSUPPORT MmSystemCacheWs;
403 extern SIZE_T MmAllocatedNonPagedPool;
404 extern ULONG_PTR MmSubsectionBase;
405 extern ULONG MmSpecialPoolTag;
406 extern PVOID MmHyperSpaceEnd;
407 extern PMMWSL MmSystemCacheWorkingSetList;
408 extern ULONG MmMinimumNonPagedPoolSize;
409 extern ULONG MmMinAdditionNonPagedPoolPerMb;
410 extern ULONG MmDefaultMaximumNonPagedPool;
411 extern ULONG MmMaxAdditionNonPagedPoolPerMb;
412 extern ULONG MmSecondaryColors;
413 extern ULONG MmSecondaryColorMask;
414 extern ULONG MmNumberOfSystemPtes;
415 extern ULONG MmMaximumNonPagedPoolPercent;
416 extern ULONG MmLargeStackSize;
417 extern PMMCOLOR_TABLES MmFreePagesByColor[FreePageList + 1];
418 extern ULONG MmProductType;
419 extern MM_SYSTEMSIZE MmSystemSize;
420 extern PKEVENT MiLowMemoryEvent;
421 extern PKEVENT MiHighMemoryEvent;
422 extern PKEVENT MiLowPagedPoolEvent;
423 extern PKEVENT MiHighPagedPoolEvent;
424 extern PKEVENT MiLowNonPagedPoolEvent;
425 extern PKEVENT MiHighNonPagedPoolEvent;
426 extern PFN_NUMBER MmLowMemoryThreshold;
427 extern PFN_NUMBER MmHighMemoryThreshold;
428 extern PFN_NUMBER MiLowPagedPoolThreshold;
429 extern PFN_NUMBER MiHighPagedPoolThreshold;
430 extern PFN_NUMBER MiLowNonPagedPoolThreshold;
431 extern PFN_NUMBER MiHighNonPagedPoolThreshold;
432 extern PFN_NUMBER MmMinimumFreePages;
433 extern PFN_NUMBER MmPlentyFreePages;
434 extern PFN_NUMBER MiExpansionPoolPagesInitialCharge;
435 extern PFN_NUMBER MmResidentAvailablePages;
436 extern PFN_NUMBER MmResidentAvailableAtInit;
437 extern ULONG MmTotalFreeSystemPtes[MaximumPtePoolTypes];
438 extern PFN_NUMBER MmTotalSystemDriverPages;
439 extern PVOID MiSessionImageStart;
440 extern PVOID MiSessionImageEnd;
441 extern PMMPTE MiHighestUserPte;
442 extern PMMPDE MiHighestUserPde;
443 extern PFN_NUMBER MmSystemPageDirectory[PD_COUNT];
444
445 #define MI_PFN_TO_PFNENTRY(x) (&MmPfnDatabase[1][x])
446 #define MI_PFNENTRY_TO_PFN(x) (x - MmPfnDatabase[1])
447
448 //
449 // Creates a valid kernel PTE with the given protection
450 //
451 FORCEINLINE
452 VOID
453 MI_MAKE_HARDWARE_PTE(IN PMMPTE NewPte,
454 IN PMMPTE MappingPte,
455 IN ULONG ProtectionMask,
456 IN PFN_NUMBER PageFrameNumber)
457 {
458 /* Only valid for kernel, non-session PTEs */
459 ASSERT(MappingPte > MiHighestUserPte);
460 ASSERT(!MI_IS_SESSION_PTE(MappingPte));
461 ASSERT((MappingPte < (PMMPTE)PDE_BASE) || (MappingPte > (PMMPTE)PDE_TOP));
462
463 /* Start fresh */
464 *NewPte = ValidKernelPte;
465
466 /* Set the protection and page */
467 NewPte->u.Hard.PageFrameNumber = PageFrameNumber;
468 NewPte->u.Long |= MmProtectToPteMask[ProtectionMask];
469 }
470
471 //
472 // Returns if the page is physically resident (ie: a large page)
473 // FIXFIX: CISC/x86 only?
474 //
475 FORCEINLINE
476 BOOLEAN
477 MI_IS_PHYSICAL_ADDRESS(IN PVOID Address)
478 {
479 PMMPDE PointerPde;
480
481 /* Large pages are never paged out, always physically resident */
482 PointerPde = MiAddressToPde(Address);
483 return ((PointerPde->u.Hard.LargePage) && (PointerPde->u.Hard.Valid));
484 }
485
486 NTSTATUS
487 NTAPI
488 MmArmInitSystem(
489 IN ULONG Phase,
490 IN PLOADER_PARAMETER_BLOCK LoaderBlock
491 );
492
493 NTSTATUS
494 NTAPI
495 MiInitMachineDependent(
496 IN PLOADER_PARAMETER_BLOCK LoaderBlock
497 );
498
499 VOID
500 NTAPI
501 MiComputeColorInformation(
502 VOID
503 );
504
505 VOID
506 NTAPI
507 MiMapPfnDatabase(
508 IN PLOADER_PARAMETER_BLOCK LoaderBlock
509 );
510
511 VOID
512 NTAPI
513 MiInitializeColorTables(
514 VOID
515 );
516
517 VOID
518 NTAPI
519 MiInitializePfnDatabase(
520 IN PLOADER_PARAMETER_BLOCK LoaderBlock
521 );
522
523 BOOLEAN
524 NTAPI
525 MiInitializeMemoryEvents(
526 VOID
527 );
528
529 PFN_NUMBER
530 NTAPI
531 MxGetNextPage(
532 IN PFN_NUMBER PageCount
533 );
534
535 PPHYSICAL_MEMORY_DESCRIPTOR
536 NTAPI
537 MmInitializeMemoryLimits(
538 IN PLOADER_PARAMETER_BLOCK LoaderBlock,
539 IN PBOOLEAN IncludeType
540 );
541
542 PFN_NUMBER
543 NTAPI
544 MiPagesInLoaderBlock(
545 IN PLOADER_PARAMETER_BLOCK LoaderBlock,
546 IN PBOOLEAN IncludeType
547 );
548
549 VOID
550 FASTCALL
551 MiSyncARM3WithROS(
552 IN PVOID AddressStart,
553 IN PVOID AddressEnd
554 );
555
556 NTSTATUS
557 NTAPI
558 MmArmAccessFault(
559 IN BOOLEAN StoreInstruction,
560 IN PVOID Address,
561 IN KPROCESSOR_MODE Mode,
562 IN PVOID TrapInformation
563 );
564
565 NTSTATUS
566 FASTCALL
567 MiCheckPdeForPagedPool(
568 IN PVOID Address
569 );
570
571 VOID
572 NTAPI
573 MiInitializeNonPagedPool(
574 VOID
575 );
576
577 VOID
578 NTAPI
579 MiInitializeNonPagedPoolThresholds(
580 VOID
581 );
582
583 VOID
584 NTAPI
585 MiInitializePoolEvents(
586 VOID
587 );
588
589 VOID //
590 NTAPI //
591 InitializePool( //
592 IN POOL_TYPE PoolType,// FIXFIX: This should go in ex.h after the pool merge
593 IN ULONG Threshold //
594 ); //
595
596 VOID
597 NTAPI
598 MiInitializeSystemPtes(
599 IN PMMPTE StartingPte,
600 IN ULONG NumberOfPtes,
601 IN MMSYSTEM_PTE_POOL_TYPE PoolType
602 );
603
604 PMMPTE
605 NTAPI
606 MiReserveSystemPtes(
607 IN ULONG NumberOfPtes,
608 IN MMSYSTEM_PTE_POOL_TYPE SystemPtePoolType
609 );
610
611 VOID
612 NTAPI
613 MiReleaseSystemPtes(
614 IN PMMPTE StartingPte,
615 IN ULONG NumberOfPtes,
616 IN MMSYSTEM_PTE_POOL_TYPE SystemPtePoolType
617 );
618
619
620 PFN_NUMBER
621 NTAPI
622 MiFindContiguousPages(
623 IN PFN_NUMBER LowestPfn,
624 IN PFN_NUMBER HighestPfn,
625 IN PFN_NUMBER BoundaryPfn,
626 IN PFN_NUMBER SizeInPages,
627 IN MEMORY_CACHING_TYPE CacheType
628 );
629
630 PVOID
631 NTAPI
632 MiCheckForContiguousMemory(
633 IN PVOID BaseAddress,
634 IN PFN_NUMBER BaseAddressPages,
635 IN PFN_NUMBER SizeInPages,
636 IN PFN_NUMBER LowestPfn,
637 IN PFN_NUMBER HighestPfn,
638 IN PFN_NUMBER BoundaryPfn,
639 IN MI_PFN_CACHE_ATTRIBUTE CacheAttribute
640 );
641
642 PMDL
643 NTAPI
644 MiAllocatePagesForMdl(
645 IN PHYSICAL_ADDRESS LowAddress,
646 IN PHYSICAL_ADDRESS HighAddress,
647 IN PHYSICAL_ADDRESS SkipBytes,
648 IN SIZE_T TotalBytes,
649 IN MI_PFN_CACHE_ATTRIBUTE CacheAttribute,
650 IN ULONG Flags
651 );
652
653 PVOID
654 NTAPI
655 MiMapLockedPagesInUserSpace(
656 IN PMDL Mdl,
657 IN PVOID BaseVa,
658 IN MEMORY_CACHING_TYPE CacheType,
659 IN PVOID BaseAddress
660 );
661
662 VOID
663 NTAPI
664 MiUnmapLockedPagesInUserSpace(
665 IN PVOID BaseAddress,
666 IN PMDL Mdl
667 );
668
669 VOID
670 NTAPI
671 MiInsertInListTail(
672 IN PMMPFNLIST ListHead,
673 IN PMMPFN Entry
674 );
675
676 VOID
677 NTAPI
678 MiInsertZeroListAtBack(
679 IN PFN_NUMBER PageIndex
680 );
681
682 VOID
683 NTAPI
684 MiUnlinkFreeOrZeroedPage(
685 IN PMMPFN Entry
686 );
687
688 PMMPFN
689 NTAPI
690 MiRemoveHeadList(
691 IN PMMPFNLIST ListHead
692 );
693
694 PFN_NUMBER
695 NTAPI
696 MiAllocatePfn(
697 IN PMMPTE PointerPte,
698 IN ULONG Protection
699 );
700
701 VOID
702 NTAPI
703 MiInitializePfn(
704 IN PFN_NUMBER PageFrameIndex,
705 IN PMMPTE PointerPte,
706 IN BOOLEAN Modified
707 );
708
709 VOID
710 NTAPI
711 MiDecrementShareCount(
712 IN PMMPFN Pfn1,
713 IN PFN_NUMBER PageFrameIndex
714 );
715
716 PFN_NUMBER
717 NTAPI
718 MiRemoveAnyPage(
719 IN ULONG Color
720 );
721
722 VOID
723 NTAPI
724 MiInsertPageInFreeList(
725 IN PFN_NUMBER PageFrameIndex
726 );
727
728 PLDR_DATA_TABLE_ENTRY
729 NTAPI
730 MiLookupDataTableEntry(
731 IN PVOID Address
732 );
733
734 VOID
735 NTAPI
736 MiInitializeDriverLargePageList(
737 VOID
738 );
739
740 VOID
741 NTAPI
742 MiInitializeLargePageSupport(
743 VOID
744 );
745
746 VOID
747 NTAPI
748 MiSyncCachedRanges(
749 VOID
750 );
751
752 BOOLEAN
753 NTAPI
754 MiIsPfnInUse(
755 IN PMMPFN Pfn1
756 );
757
758 /* EOF */