2 * PROJECT: ReactOS Kernel
3 * LICENSE: BSD - See COPYING.ARM in the top level directory
4 * FILE: ntoskrnl/mm/ARM3/pagfault.c
5 * PURPOSE: ARM Memory Manager Page Fault Handling
6 * PROGRAMMERS: ReactOS Portable Systems Group
9 /* INCLUDES *******************************************************************/
15 #define MODULE_INVOLVED_IN_ARM3
16 #include <mm/ARM3/miarm.h>
18 /* GLOBALS ********************************************************************/
20 #define HYDRA_PROCESS (PEPROCESS)1
22 BOOLEAN UserPdeFault
= FALSE
;
25 /* PRIVATE FUNCTIONS **********************************************************/
29 MiCheckForUserStackOverflow(IN PVOID Address
,
30 IN PVOID TrapInformation
)
32 PETHREAD CurrentThread
= PsGetCurrentThread();
33 PTEB Teb
= CurrentThread
->Tcb
.Teb
;
34 PVOID StackBase
, DeallocationStack
, NextStackAddress
;
38 /* Do we own the address space lock? */
39 if (CurrentThread
->AddressSpaceOwner
== 1)
41 /* This isn't valid */
42 DPRINT1("Process owns address space lock\n");
43 ASSERT(KeAreAllApcsDisabled() == TRUE
);
44 return STATUS_GUARD_PAGE_VIOLATION
;
47 /* Are we attached? */
48 if (KeIsAttachedProcess())
50 /* This isn't valid */
51 DPRINT1("Process is attached\n");
52 return STATUS_GUARD_PAGE_VIOLATION
;
55 /* Read the current settings */
56 StackBase
= Teb
->NtTib
.StackBase
;
57 DeallocationStack
= Teb
->DeallocationStack
;
58 GuranteedSize
= Teb
->GuaranteedStackBytes
;
59 DPRINT("Handling guard page fault with Stacks Addresses 0x%p and 0x%p, guarantee: %lx\n",
60 StackBase
, DeallocationStack
, GuranteedSize
);
62 /* Guarantees make this code harder, for now, assume there aren't any */
63 ASSERT(GuranteedSize
== 0);
65 /* So allocate only the minimum guard page size */
66 GuranteedSize
= PAGE_SIZE
;
68 /* Does this faulting stack address actually exist in the stack? */
69 if ((Address
>= StackBase
) || (Address
< DeallocationStack
))
72 DPRINT1("Faulting address outside of stack bounds. Address=%p, StackBase=%p, DeallocationStack=%p\n",
73 Address
, StackBase
, DeallocationStack
);
74 return STATUS_GUARD_PAGE_VIOLATION
;
77 /* This is where the stack will start now */
78 NextStackAddress
= (PVOID
)((ULONG_PTR
)PAGE_ALIGN(Address
) - GuranteedSize
);
80 /* Do we have at least one page between here and the end of the stack? */
81 if (((ULONG_PTR
)NextStackAddress
- PAGE_SIZE
) <= (ULONG_PTR
)DeallocationStack
)
83 /* We don't -- Windows would try to make this guard page valid now */
84 DPRINT1("Close to our death...\n");
85 return STATUS_STACK_OVERFLOW
;
88 /* Don't handle this flag yet */
89 ASSERT((PsGetCurrentProcess()->Peb
->NtGlobalFlag
& FLG_DISABLE_STACK_EXTENSION
) == 0);
91 /* Update the stack limit */
92 Teb
->NtTib
.StackLimit
= (PVOID
)((ULONG_PTR
)NextStackAddress
+ GuranteedSize
);
94 /* Now move the guard page to the next page */
95 Status
= ZwAllocateVirtualMemory(NtCurrentProcess(),
100 PAGE_READWRITE
| PAGE_GUARD
);
101 if ((NT_SUCCESS(Status
) || (Status
== STATUS_ALREADY_COMMITTED
)))
104 DPRINT("Guard page handled successfully for %p\n", Address
);
105 return STATUS_PAGE_FAULT_GUARD_PAGE
;
108 /* Fail, we couldn't move the guard page */
109 DPRINT1("Guard page failure: %lx\n", Status
);
111 return STATUS_STACK_OVERFLOW
;
117 _In_ ULONG ProtectionMask
,
119 _In_ BOOLEAN Execute
)
121 #define _BYTE_MASK(Bit0, Bit1, Bit2, Bit3, Bit4, Bit5, Bit6, Bit7) \
122 (Bit0) | ((Bit1) << 1) | ((Bit2) << 2) | ((Bit3) << 3) | \
123 ((Bit4) << 4) | ((Bit5) << 5) | ((Bit6) << 6) | ((Bit7) << 7)
124 static const UCHAR AccessAllowedMask
[2][2] =
126 { // Protect 0 1 2 3 4 5 6 7
127 _BYTE_MASK(0, 1, 1, 1, 1, 1, 1, 1), // READ
128 _BYTE_MASK(0, 0, 1, 1, 0, 0, 1, 1), // EXECUTE READ
131 _BYTE_MASK(0, 0, 0, 0, 1, 1, 1, 1), // WRITE
132 _BYTE_MASK(0, 0, 0, 0, 0, 0, 1, 1), // EXECUTE WRITE
136 /* We want only the lower access bits */
137 ProtectionMask
&= MM_PROTECT_ACCESS
;
139 /* Look it up in the table */
140 return (AccessAllowedMask
[Write
!= 0][Execute
!= 0] >> ProtectionMask
) & 1;
145 MiAccessCheck(IN PMMPTE PointerPte
,
146 IN BOOLEAN StoreInstruction
,
147 IN KPROCESSOR_MODE PreviousMode
,
148 IN ULONG_PTR ProtectionMask
,
154 /* Check for invalid user-mode access */
155 if ((PreviousMode
== UserMode
) && (PointerPte
> MiHighestUserPte
))
157 return STATUS_ACCESS_VIOLATION
;
160 /* Capture the PTE -- is it valid? */
161 TempPte
= *PointerPte
;
162 if (TempPte
.u
.Hard
.Valid
)
164 /* Was someone trying to write to it? */
165 if (StoreInstruction
)
168 if (MI_IS_PAGE_WRITEABLE(&TempPte
) ||
169 MI_IS_PAGE_COPY_ON_WRITE(&TempPte
))
171 /* Then there's nothing to worry about */
172 return STATUS_SUCCESS
;
175 /* Oops! This isn't allowed */
176 return STATUS_ACCESS_VIOLATION
;
179 /* Someone was trying to read from a valid PTE, that's fine too */
180 return STATUS_SUCCESS
;
183 /* Check if the protection on the page allows what is being attempted */
184 if (!MiIsAccessAllowed(ProtectionMask
, StoreInstruction
, FALSE
))
186 return STATUS_ACCESS_VIOLATION
;
189 /* Check if this is a guard page */
190 if ((ProtectionMask
& MM_PROTECT_SPECIAL
) == MM_GUARDPAGE
)
192 ASSERT(ProtectionMask
!= MM_DECOMMIT
);
194 /* Attached processes can't expand their stack */
195 if (KeIsAttachedProcess()) return STATUS_ACCESS_VIOLATION
;
197 /* No support for transition PTEs yet */
198 ASSERT(((TempPte
.u
.Soft
.Transition
== 1) &&
199 (TempPte
.u
.Soft
.Prototype
== 0)) == FALSE
);
201 /* Remove the guard page bit, and return a guard page violation */
202 TempPte
.u
.Soft
.Protection
= ProtectionMask
& ~MM_GUARDPAGE
;
203 ASSERT(TempPte
.u
.Long
!= 0);
204 MI_WRITE_INVALID_PTE(PointerPte
, TempPte
);
205 return STATUS_GUARD_PAGE_VIOLATION
;
209 return STATUS_SUCCESS
;
214 MiCheckVirtualAddress(IN PVOID VirtualAddress
,
215 OUT PULONG ProtectCode
,
216 OUT PMMVAD
*ProtoVad
)
221 /* No prototype/section support for now */
224 /* User or kernel fault? */
225 if (VirtualAddress
<= MM_HIGHEST_USER_ADDRESS
)
227 /* Special case for shared data */
228 if (PAGE_ALIGN(VirtualAddress
) == (PVOID
)MM_SHARED_USER_DATA_VA
)
230 /* It's a read-only page */
231 *ProtectCode
= MM_READONLY
;
232 return MmSharedUserDataPte
;
235 /* Find the VAD, it might not exist if the address is bogus */
236 Vad
= MiLocateAddress(VirtualAddress
);
239 /* Bogus virtual address */
240 *ProtectCode
= MM_NOACCESS
;
244 /* ReactOS does not handle physical memory VADs yet */
245 ASSERT(Vad
->u
.VadFlags
.VadType
!= VadDevicePhysicalMemory
);
247 /* Check if it's a section, or just an allocation */
248 if (Vad
->u
.VadFlags
.PrivateMemory
)
250 /* ReactOS does not handle AWE VADs yet */
251 ASSERT(Vad
->u
.VadFlags
.VadType
!= VadAwe
);
253 /* This must be a TEB/PEB VAD */
254 if (Vad
->u
.VadFlags
.MemCommit
)
256 /* It's committed, so return the VAD protection */
257 *ProtectCode
= (ULONG
)Vad
->u
.VadFlags
.Protection
;
261 /* It has not yet been committed, so return no access */
262 *ProtectCode
= MM_NOACCESS
;
265 /* In both cases, return no PTE */
270 /* ReactOS does not supoprt these VADs yet */
271 ASSERT(Vad
->u
.VadFlags
.VadType
!= VadImageMap
);
272 ASSERT(Vad
->u2
.VadFlags2
.ExtendableFile
== 0);
274 /* Return the proto VAD */
277 /* Get the prototype PTE for this page */
278 PointerPte
= (((ULONG_PTR
)VirtualAddress
>> PAGE_SHIFT
) - Vad
->StartingVpn
) + Vad
->FirstPrototypePte
;
279 ASSERT(PointerPte
!= NULL
);
280 ASSERT(PointerPte
<= Vad
->LastContiguousPte
);
282 /* Return the Prototype PTE and the protection for the page mapping */
283 *ProtectCode
= (ULONG
)Vad
->u
.VadFlags
.Protection
;
287 else if (MI_IS_PAGE_TABLE_ADDRESS(VirtualAddress
))
289 /* This should never happen, as these addresses are handled by the double-maping */
290 if (((PMMPTE
)VirtualAddress
>= MiAddressToPte(MmPagedPoolStart
)) &&
291 ((PMMPTE
)VirtualAddress
<= MmPagedPoolInfo
.LastPteForPagedPool
))
293 /* Fail such access */
294 *ProtectCode
= MM_NOACCESS
;
298 /* Return full access rights */
299 *ProtectCode
= MM_READWRITE
;
302 else if (MI_IS_SESSION_ADDRESS(VirtualAddress
))
304 /* ReactOS does not have an image list yet, so bail out to failure case */
305 ASSERT(IsListEmpty(&MmSessionSpace
->ImageList
));
308 /* Default case -- failure */
309 *ProtectCode
= MM_NOACCESS
;
313 #if (_MI_PAGING_LEVELS == 2)
316 MiSynchronizeSystemPde(PMMPDE PointerPde
)
321 /* Get the Index from the PDE */
322 Index
= ((ULONG_PTR
)PointerPde
& (SYSTEM_PD_SIZE
- 1)) / sizeof(MMPTE
);
324 /* Copy the PDE from the double-mapped system page directory */
325 SystemPde
= MmSystemPagePtes
[Index
];
326 *PointerPde
= SystemPde
;
328 /* Make sure we re-read the PDE and PTE */
329 KeMemoryBarrierWithoutFence();
331 /* Return, if we had success */
332 return (BOOLEAN
)SystemPde
.u
.Hard
.Valid
;
337 MiCheckPdeForSessionSpace(IN PVOID Address
)
341 PVOID SessionAddress
;
344 /* Is this a session PTE? */
345 if (MI_IS_SESSION_PTE(Address
))
347 /* Make sure the PDE for session space is valid */
348 PointerPde
= MiAddressToPde(MmSessionSpace
);
349 if (!PointerPde
->u
.Hard
.Valid
)
351 /* This means there's no valid session, bail out */
352 DbgPrint("MiCheckPdeForSessionSpace: No current session for PTE %p\n",
355 return STATUS_ACCESS_VIOLATION
;
358 /* Now get the session-specific page table for this address */
359 SessionAddress
= MiPteToAddress(Address
);
360 PointerPde
= MiAddressToPte(Address
);
361 if (PointerPde
->u
.Hard
.Valid
) return STATUS_WAIT_1
;
363 /* It's not valid, so find it in the page table array */
364 Index
= ((ULONG_PTR
)SessionAddress
- (ULONG_PTR
)MmSessionBase
) >> 22;
365 TempPde
.u
.Long
= MmSessionSpace
->PageTables
[Index
].u
.Long
;
366 if (TempPde
.u
.Hard
.Valid
)
368 /* The copy is valid, so swap it in */
369 InterlockedExchange((PLONG
)PointerPde
, TempPde
.u
.Long
);
370 return STATUS_WAIT_1
;
373 /* We don't seem to have allocated a page table for this address yet? */
374 DbgPrint("MiCheckPdeForSessionSpace: No Session PDE for PTE %p, %p\n",
375 PointerPde
->u
.Long
, SessionAddress
);
377 return STATUS_ACCESS_VIOLATION
;
380 /* Is the address also a session address? If not, we're done */
381 if (!MI_IS_SESSION_ADDRESS(Address
)) return STATUS_SUCCESS
;
383 /* It is, so again get the PDE for session space */
384 PointerPde
= MiAddressToPde(MmSessionSpace
);
385 if (!PointerPde
->u
.Hard
.Valid
)
387 /* This means there's no valid session, bail out */
388 DbgPrint("MiCheckPdeForSessionSpace: No current session for VA %p\n",
391 return STATUS_ACCESS_VIOLATION
;
394 /* Now get the PDE for the address itself */
395 PointerPde
= MiAddressToPde(Address
);
396 if (!PointerPde
->u
.Hard
.Valid
)
398 /* Do the swap, we should be good to go */
399 Index
= ((ULONG_PTR
)Address
- (ULONG_PTR
)MmSessionBase
) >> 22;
400 PointerPde
->u
.Long
= MmSessionSpace
->PageTables
[Index
].u
.Long
;
401 if (PointerPde
->u
.Hard
.Valid
) return STATUS_WAIT_1
;
403 /* We had not allocated a page table for this session address yet, fail! */
404 DbgPrint("MiCheckPdeForSessionSpace: No Session PDE for VA %p, %p\n",
405 PointerPde
->u
.Long
, Address
);
407 return STATUS_ACCESS_VIOLATION
;
410 /* It's valid, so there's nothing to do */
411 return STATUS_SUCCESS
;
416 MiCheckPdeForPagedPool(IN PVOID Address
)
419 NTSTATUS Status
= STATUS_SUCCESS
;
421 /* Check session PDE */
422 if (MI_IS_SESSION_ADDRESS(Address
)) return MiCheckPdeForSessionSpace(Address
);
423 if (MI_IS_SESSION_PTE(Address
)) return MiCheckPdeForSessionSpace(Address
);
426 // Check if this is a fault while trying to access the page table itself
428 if (MI_IS_SYSTEM_PAGE_TABLE_ADDRESS(Address
))
431 // Send a hint to the page fault handler that this is only a valid fault
432 // if we already detected this was access within the page table range
434 PointerPde
= (PMMPDE
)MiAddressToPte(Address
);
435 Status
= STATUS_WAIT_1
;
437 else if (Address
< MmSystemRangeStart
)
440 // This is totally illegal
442 return STATUS_ACCESS_VIOLATION
;
447 // Get the PDE for the address
449 PointerPde
= MiAddressToPde(Address
);
453 // Check if it's not valid
455 if (PointerPde
->u
.Hard
.Valid
== 0)
458 // Copy it from our double-mapped system page directory
460 InterlockedExchangePte(PointerPde
,
461 MmSystemPagePtes
[((ULONG_PTR
)PointerPde
& (SYSTEM_PD_SIZE
- 1)) / sizeof(MMPTE
)].u
.Long
);
472 MiCheckPdeForPagedPool(IN PVOID Address
)
474 return STATUS_ACCESS_VIOLATION
;
480 MiZeroPfn(IN PFN_NUMBER PageFrameNumber
)
487 /* Get the PFN for this page */
488 Pfn1
= MiGetPfnEntry(PageFrameNumber
);
491 /* Grab a system PTE we can use to zero the page */
492 ZeroPte
= MiReserveSystemPtes(1, SystemPteSpace
);
495 /* Initialize the PTE for it */
496 TempPte
= ValidKernelPte
;
497 TempPte
.u
.Hard
.PageFrameNumber
= PageFrameNumber
;
500 if (Pfn1
->u3
.e1
.CacheAttribute
== MiWriteCombined
)
502 /* Write combining, no caching */
503 MI_PAGE_DISABLE_CACHE(&TempPte
);
504 MI_PAGE_WRITE_COMBINED(&TempPte
);
506 else if (Pfn1
->u3
.e1
.CacheAttribute
== MiNonCached
)
508 /* Write through, no caching */
509 MI_PAGE_DISABLE_CACHE(&TempPte
);
510 MI_PAGE_WRITE_THROUGH(&TempPte
);
513 /* Make the system PTE valid with our PFN */
514 MI_WRITE_VALID_PTE(ZeroPte
, TempPte
);
516 /* Get the address it maps to, and zero it out */
517 ZeroAddress
= MiPteToAddress(ZeroPte
);
518 KeZeroPages(ZeroAddress
, PAGE_SIZE
);
520 /* Now get rid of it */
521 MiReleaseSystemPtes(ZeroPte
, 1, SystemPteSpace
);
526 MiResolveDemandZeroFault(IN PVOID Address
,
527 IN PMMPTE PointerPte
,
528 IN PEPROCESS Process
,
531 PFN_NUMBER PageFrameNumber
= 0;
533 BOOLEAN NeedZero
= FALSE
, HaveLock
= FALSE
;
536 DPRINT("ARM3 Demand Zero Page Fault Handler for address: %p in process: %p\n",
540 /* Must currently only be called by paging path */
541 if ((Process
> HYDRA_PROCESS
) && (OldIrql
== MM_NOIRQL
))
544 ASSERT(MI_IS_PAGE_TABLE_ADDRESS(PointerPte
));
547 ASSERT(Process
->ForkInProgress
== NULL
);
549 /* Get process color */
550 Color
= MI_GET_NEXT_PROCESS_COLOR(Process
);
551 ASSERT(Color
!= 0xFFFFFFFF);
553 /* We'll need a zero page */
558 /* Check if we need a zero page */
559 NeedZero
= (OldIrql
!= MM_NOIRQL
);
561 /* Session-backed image views must be zeroed */
562 if ((Process
== HYDRA_PROCESS
) &&
563 ((MI_IS_SESSION_IMAGE_ADDRESS(Address
)) ||
564 ((Address
>= MiSessionViewStart
) && (Address
< MiSessionSpaceWs
))))
569 /* Hardcode unknown color */
573 /* Check if the PFN database should be acquired */
574 if (OldIrql
== MM_NOIRQL
)
576 /* Acquire it and remember we should release it after */
577 OldIrql
= KeAcquireQueuedSpinLock(LockQueuePfnLock
);
581 /* We either manually locked the PFN DB, or already came with it locked */
582 ASSERT(KeGetCurrentIrql() == DISPATCH_LEVEL
);
583 ASSERT(PointerPte
->u
.Hard
.Valid
== 0);
585 /* Assert we have enough pages */
586 ASSERT(MmAvailablePages
>= 32);
589 if (UserPdeFault
) MI_SET_USAGE(MI_USAGE_PAGE_TABLE
);
590 if (!UserPdeFault
) MI_SET_USAGE(MI_USAGE_DEMAND_ZERO
);
592 if (Process
) MI_SET_PROCESS2(Process
->ImageFileName
);
593 if (!Process
) MI_SET_PROCESS2("Kernel Demand 0");
595 /* Do we need a zero page? */
596 if (Color
!= 0xFFFFFFFF)
598 /* Try to get one, if we couldn't grab a free page and zero it */
599 PageFrameNumber
= MiRemoveZeroPageSafe(Color
);
600 if (!PageFrameNumber
)
602 /* We'll need a free page and zero it manually */
603 PageFrameNumber
= MiRemoveAnyPage(Color
);
609 /* Get a color, and see if we should grab a zero or non-zero page */
610 Color
= MI_GET_NEXT_COLOR();
613 /* Process or system doesn't want a zero page, grab anything */
614 PageFrameNumber
= MiRemoveAnyPage(Color
);
618 /* System wants a zero page, obtain one */
619 PageFrameNumber
= MiRemoveZeroPage(Color
);
624 MiInitializePfn(PageFrameNumber
, PointerPte
, TRUE
);
626 /* Do we have the lock? */
630 KeReleaseQueuedSpinLock(LockQueuePfnLock
, OldIrql
);
632 /* Update performance counters */
633 if (Process
> HYDRA_PROCESS
) Process
->NumberOfPrivatePages
++;
636 /* Increment demand zero faults */
637 InterlockedIncrement(&KeGetCurrentPrcb()->MmDemandZeroCount
);
639 /* Zero the page if need be */
640 if (NeedZero
) MiZeroPfn(PageFrameNumber
);
642 /* Fault on user PDE, or fault on user PTE? */
643 if (PointerPte
<= MiHighestUserPte
)
645 /* User fault, build a user PTE */
646 MI_MAKE_HARDWARE_PTE_USER(&TempPte
,
648 PointerPte
->u
.Soft
.Protection
,
653 /* This is a user-mode PDE, create a kernel PTE for it */
654 MI_MAKE_HARDWARE_PTE(&TempPte
,
656 PointerPte
->u
.Soft
.Protection
,
660 /* Set it dirty if it's a writable page */
661 if (MI_IS_PAGE_WRITEABLE(&TempPte
)) MI_MAKE_DIRTY_PAGE(&TempPte
);
664 MI_WRITE_VALID_PTE(PointerPte
, TempPte
);
666 /* Did we manually acquire the lock */
669 /* Get the PFN entry */
670 Pfn1
= MI_PFN_ELEMENT(PageFrameNumber
);
672 /* Windows does these sanity checks */
673 ASSERT(Pfn1
->u1
.Event
== 0);
674 ASSERT(Pfn1
->u3
.e1
.PrototypePte
== 0);
680 DPRINT("Demand zero page has now been paged in\n");
681 return STATUS_PAGE_FAULT_DEMAND_ZERO
;
686 MiCompleteProtoPteFault(IN BOOLEAN StoreInstruction
,
688 IN PMMPTE PointerPte
,
689 IN PMMPTE PointerProtoPte
,
691 IN PMMPFN
* LockedProtoPfn
)
694 PMMPTE OriginalPte
, PageTablePte
;
695 ULONG_PTR Protection
;
696 PFN_NUMBER PageFrameIndex
;
698 BOOLEAN OriginalProtection
, DirtyPage
;
700 /* Must be called with an valid prototype PTE, with the PFN lock held */
701 ASSERT(KeGetCurrentIrql() == DISPATCH_LEVEL
);
702 ASSERT(PointerProtoPte
->u
.Hard
.Valid
== 1);
705 PageFrameIndex
= PFN_FROM_PTE(PointerProtoPte
);
707 /* Get the PFN entry and set it as a prototype PTE */
708 Pfn1
= MiGetPfnEntry(PageFrameIndex
);
709 Pfn1
->u3
.e1
.PrototypePte
= 1;
711 /* Increment the share count for the page table */
712 PageTablePte
= MiAddressToPte(PointerPte
);
713 Pfn2
= MiGetPfnEntry(PageTablePte
->u
.Hard
.PageFrameNumber
);
714 Pfn2
->u2
.ShareCount
++;
716 /* Check where we should be getting the protection information from */
717 if (PointerPte
->u
.Soft
.PageFileHigh
== MI_PTE_LOOKUP_NEEDED
)
719 /* Get the protection from the PTE, there's no real Proto PTE data */
720 Protection
= PointerPte
->u
.Soft
.Protection
;
722 /* Remember that we did not use the proto protection */
723 OriginalProtection
= FALSE
;
727 /* Get the protection from the original PTE link */
728 OriginalPte
= &Pfn1
->OriginalPte
;
729 Protection
= OriginalPte
->u
.Soft
.Protection
;
731 /* Remember that we used the original protection */
732 OriginalProtection
= TRUE
;
734 /* Check if this was a write on a read only proto */
735 if ((StoreInstruction
) && !(Protection
& MM_READWRITE
))
738 StoreInstruction
= 0;
742 /* Check if this was a write on a non-COW page */
744 if ((StoreInstruction
) && ((Protection
& MM_WRITECOPY
) != MM_WRITECOPY
))
746 /* Then the page should be marked dirty */
750 ASSERT(Pfn1
->OriginalPte
.u
.Soft
.Prototype
!= 0);
753 /* Did we get a locked incoming PFN? */
756 /* Drop a reference */
757 ASSERT((*LockedProtoPfn
)->u3
.e2
.ReferenceCount
>= 1);
758 MiDereferencePfnAndDropLockCount(*LockedProtoPfn
);
759 *LockedProtoPfn
= NULL
;
762 /* Release the PFN lock */
763 KeReleaseQueuedSpinLock(LockQueuePfnLock
, OldIrql
);
765 /* Remove special/caching bits */
766 Protection
&= ~MM_PROTECT_SPECIAL
;
769 if (Pfn1
->u3
.e1
.CacheAttribute
== MiWriteCombined
)
771 /* Write combining, no caching */
772 MI_PAGE_DISABLE_CACHE(&TempPte
);
773 MI_PAGE_WRITE_COMBINED(&TempPte
);
775 else if (Pfn1
->u3
.e1
.CacheAttribute
== MiNonCached
)
777 /* Write through, no caching */
778 MI_PAGE_DISABLE_CACHE(&TempPte
);
779 MI_PAGE_WRITE_THROUGH(&TempPte
);
782 /* Check if this is a kernel or user address */
783 if (Address
< MmSystemRangeStart
)
785 /* Build the user PTE */
786 MI_MAKE_HARDWARE_PTE_USER(&TempPte
, PointerPte
, Protection
, PageFrameIndex
);
790 /* Build the kernel PTE */
791 MI_MAKE_HARDWARE_PTE(&TempPte
, PointerPte
, Protection
, PageFrameIndex
);
794 /* Set the dirty flag if needed */
795 if (DirtyPage
) MI_MAKE_DIRTY_PAGE(&TempPte
);
798 MI_WRITE_VALID_PTE(PointerPte
, TempPte
);
800 /* Reset the protection if needed */
801 if (OriginalProtection
) Protection
= MM_ZERO_ACCESS
;
804 ASSERT(PointerPte
== MiAddressToPte(Address
));
805 return STATUS_SUCCESS
;
810 MiResolvePageFileFault(_In_ BOOLEAN StoreInstruction
,
811 _In_ PVOID FaultingAddress
,
812 _In_ PMMPTE PointerPte
,
813 _In_ PEPROCESS CurrentProcess
,
814 _Inout_ KIRQL
*OldIrql
)
819 MMPTE TempPte
= *PointerPte
;
822 ULONG PageFileIndex
= TempPte
.u
.Soft
.PageFileLow
;
823 ULONG_PTR PageFileOffset
= TempPte
.u
.Soft
.PageFileHigh
;
825 /* Things we don't support yet */
826 ASSERT(CurrentProcess
> HYDRA_PROCESS
);
827 ASSERT(*OldIrql
!= MM_NOIRQL
);
829 /* We must hold the PFN lock */
830 ASSERT(KeGetCurrentIrql() == DISPATCH_LEVEL
);
832 /* Some sanity checks */
833 ASSERT(TempPte
.u
.Hard
.Valid
== 0);
834 ASSERT(TempPte
.u
.Soft
.PageFileHigh
!= 0);
835 ASSERT(TempPte
.u
.Soft
.PageFileHigh
!= MI_PTE_LOOKUP_NEEDED
);
837 /* Get any page, it will be overwritten */
838 Color
= MI_GET_NEXT_PROCESS_COLOR(CurrentProcess
);
839 Page
= MiRemoveAnyPage(Color
);
841 /* Initialize this PFN */
842 MiInitializePfn(Page
, PointerPte
, StoreInstruction
);
844 /* Sets the PFN as being in IO operation */
845 Pfn1
= MI_PFN_ELEMENT(Page
);
846 ASSERT(Pfn1
->u1
.Event
== NULL
);
847 ASSERT(Pfn1
->u3
.e1
.ReadInProgress
== 0);
848 ASSERT(Pfn1
->u3
.e1
.WriteInProgress
== 0);
850 KeInitializeEvent(&Event
, NotificationEvent
, FALSE
);
851 Pfn1
->u1
.Event
= &Event
;
852 Pfn1
->u3
.e1
.ReadInProgress
= 1;
854 /* We must write the PTE now as the PFN lock will be released while performing the IO operation */
855 TempPte
.u
.Soft
.Transition
= 1;
856 TempPte
.u
.Soft
.PageFileLow
= 0;
857 TempPte
.u
.Soft
.Prototype
= 0;
858 TempPte
.u
.Trans
.PageFrameNumber
= Page
;
860 MI_WRITE_INVALID_PTE(PointerPte
, TempPte
);
862 /* Release the PFN lock while we proceed */
863 KeReleaseQueuedSpinLock(LockQueuePfnLock
, *OldIrql
);
865 /* Do the paging IO */
866 Status
= MiReadPageFile(Page
, PageFileIndex
, PageFileOffset
);
868 /* Lock the PFN database again */
869 *OldIrql
= KeAcquireQueuedSpinLock(LockQueuePfnLock
);
871 /* Nobody should have changed that while we were not looking */
872 ASSERT(Pfn1
->u1
.Event
== &Event
);
873 ASSERT(Pfn1
->u3
.e1
.ReadInProgress
== 1);
874 ASSERT(Pfn1
->u3
.e1
.WriteInProgress
== 0);
876 if (!NT_SUCCESS(Status
))
880 Pfn1
->u4
.InPageError
= 1;
881 Pfn1
->u1
.ReadStatus
= Status
;
884 /* This is now a nice and normal PFN */
885 Pfn1
->u1
.Event
= NULL
;
886 Pfn1
->u3
.e1
.ReadInProgress
= 0;
888 /* And the PTE can finally be valid */
889 MI_MAKE_HARDWARE_PTE(&TempPte
, PointerPte
, TempPte
.u
.Trans
.Protection
, Page
);
890 MI_WRITE_VALID_PTE(PointerPte
, TempPte
);
892 /* Waiters gonna wait */
893 KeSetEvent(&Event
, IO_NO_INCREMENT
, FALSE
);
900 MiResolveTransitionFault(IN PVOID FaultingAddress
,
901 IN PMMPTE PointerPte
,
902 IN PEPROCESS CurrentProcess
,
904 OUT PVOID
*InPageBlock
)
906 PFN_NUMBER PageFrameIndex
;
909 PMMPTE PointerToPteForProtoPage
;
910 DPRINT("Transition fault on 0x%p with PTE 0x%p in process %s\n",
911 FaultingAddress
, PointerPte
, CurrentProcess
->ImageFileName
);
913 /* Windowss does this check */
914 ASSERT(*InPageBlock
== NULL
);
916 /* ARM3 doesn't support this path */
917 ASSERT(OldIrql
!= MM_NOIRQL
);
919 /* Capture the PTE and make sure it's in transition format */
920 TempPte
= *PointerPte
;
921 ASSERT((TempPte
.u
.Soft
.Valid
== 0) &&
922 (TempPte
.u
.Soft
.Prototype
== 0) &&
923 (TempPte
.u
.Soft
.Transition
== 1));
925 /* Get the PFN and the PFN entry */
926 PageFrameIndex
= TempPte
.u
.Trans
.PageFrameNumber
;
927 DPRINT("Transition PFN: %lx\n", PageFrameIndex
);
928 Pfn1
= MiGetPfnEntry(PageFrameIndex
);
930 /* One more transition fault! */
931 InterlockedIncrement(&KeGetCurrentPrcb()->MmTransitionCount
);
933 /* This is from ARM3 -- Windows normally handles this here */
934 ASSERT(Pfn1
->u4
.InPageError
== 0);
936 /* See if we should wait before terminating the fault */
937 if (Pfn1
->u3
.e1
.ReadInProgress
== 1)
939 DPRINT1("The page is currently being read!\n");
940 ASSERT(Pfn1
->u1
.Event
!= NULL
);
941 *InPageBlock
= Pfn1
->u1
.Event
;
942 if (PointerPte
== Pfn1
->PteAddress
)
944 DPRINT1("And this if for this particular PTE.\n");
945 /* The PTE will be made valid by the thread serving the fault */
946 return STATUS_SUCCESS
; // FIXME: Maybe something more descriptive
950 /* Windows checks there's some free pages and this isn't an in-page error */
951 ASSERT(MmAvailablePages
> 0);
952 ASSERT(Pfn1
->u4
.InPageError
== 0);
954 /* ReactOS checks for this */
955 ASSERT(MmAvailablePages
> 32);
957 /* Was this a transition page in the valid list, or free/zero list? */
958 if (Pfn1
->u3
.e1
.PageLocation
== ActiveAndValid
)
960 /* All Windows does here is a bunch of sanity checks */
961 DPRINT("Transition in active list\n");
962 ASSERT((Pfn1
->PteAddress
>= MiAddressToPte(MmPagedPoolStart
)) &&
963 (Pfn1
->PteAddress
<= MiAddressToPte(MmPagedPoolEnd
)));
964 ASSERT(Pfn1
->u2
.ShareCount
!= 0);
965 ASSERT(Pfn1
->u3
.e2
.ReferenceCount
!= 0);
969 /* Otherwise, the page is removed from its list */
970 DPRINT("Transition page in free/zero list\n");
971 MiUnlinkPageFromList(Pfn1
);
972 MiReferenceUnusedPageAndBumpLockCount(Pfn1
);
975 /* At this point, there should no longer be any in-page errors */
976 ASSERT(Pfn1
->u4
.InPageError
== 0);
978 /* Check if this was a PFN with no more share references */
979 if (Pfn1
->u2
.ShareCount
== 0) MiDropLockCount(Pfn1
);
981 /* Bump the share count and make the page valid */
982 Pfn1
->u2
.ShareCount
++;
983 Pfn1
->u3
.e1
.PageLocation
= ActiveAndValid
;
985 /* Prototype PTEs are in paged pool, which itself might be in transition */
986 if (FaultingAddress
>= MmSystemRangeStart
)
988 /* Check if this is a paged pool PTE in transition state */
989 PointerToPteForProtoPage
= MiAddressToPte(PointerPte
);
990 TempPte
= *PointerToPteForProtoPage
;
991 if ((TempPte
.u
.Hard
.Valid
== 0) && (TempPte
.u
.Soft
.Transition
== 1))
993 /* This isn't yet supported */
994 DPRINT1("Double transition fault not yet supported\n");
999 /* Build the transition PTE -- maybe a macro? */
1000 ASSERT(PointerPte
->u
.Hard
.Valid
== 0);
1001 ASSERT(PointerPte
->u
.Trans
.Prototype
== 0);
1002 ASSERT(PointerPte
->u
.Trans
.Transition
== 1);
1003 TempPte
.u
.Long
= (PointerPte
->u
.Long
& ~0xFFF) |
1004 (MmProtectToPteMask
[PointerPte
->u
.Trans
.Protection
]) |
1005 MiDetermineUserGlobalPteMask(PointerPte
);
1007 /* Is the PTE writeable? */
1008 if ((Pfn1
->u3
.e1
.Modified
) &&
1009 MI_IS_PAGE_WRITEABLE(&TempPte
) &&
1010 !MI_IS_PAGE_COPY_ON_WRITE(&TempPte
))
1013 MI_MAKE_DIRTY_PAGE(&TempPte
);
1018 MI_MAKE_CLEAN_PAGE(&TempPte
);
1021 /* Write the valid PTE */
1022 MI_WRITE_VALID_PTE(PointerPte
, TempPte
);
1024 /* Return success */
1025 return STATUS_PAGE_FAULT_TRANSITION
;
1030 MiResolveProtoPteFault(IN BOOLEAN StoreInstruction
,
1032 IN PMMPTE PointerPte
,
1033 IN PMMPTE PointerProtoPte
,
1034 IN OUT PMMPFN
*OutPfn
,
1035 OUT PVOID
*PageFileData
,
1036 OUT PMMPTE PteValue
,
1037 IN PEPROCESS Process
,
1039 IN PVOID TrapInformation
)
1041 MMPTE TempPte
, PteContents
;
1043 PFN_NUMBER PageFrameIndex
;
1045 PVOID InPageBlock
= NULL
;
1047 /* Must be called with an invalid, prototype PTE, with the PFN lock held */
1048 ASSERT(KeGetCurrentIrql() == DISPATCH_LEVEL
);
1049 ASSERT(PointerPte
->u
.Hard
.Valid
== 0);
1050 ASSERT(PointerPte
->u
.Soft
.Prototype
== 1);
1052 /* Read the prototype PTE and check if it's valid */
1053 TempPte
= *PointerProtoPte
;
1054 if (TempPte
.u
.Hard
.Valid
== 1)
1056 /* One more user of this mapped page */
1057 PageFrameIndex
= PFN_FROM_PTE(&TempPte
);
1058 Pfn1
= MiGetPfnEntry(PageFrameIndex
);
1059 Pfn1
->u2
.ShareCount
++;
1061 /* Call it a transition */
1062 InterlockedIncrement(&KeGetCurrentPrcb()->MmTransitionCount
);
1064 /* Complete the prototype PTE fault -- this will release the PFN lock */
1065 return MiCompleteProtoPteFault(StoreInstruction
,
1073 /* Make sure there's some protection mask */
1074 if (TempPte
.u
.Long
== 0)
1076 /* Release the lock */
1077 DPRINT1("Access on reserved section?\n");
1078 KeReleaseQueuedSpinLock(LockQueuePfnLock
, OldIrql
);
1079 return STATUS_ACCESS_VIOLATION
;
1082 /* There is no such thing as a decommitted prototype PTE */
1083 ASSERT(TempPte
.u
.Long
!= MmDecommittedPte
.u
.Long
);
1085 /* Check for access rights on the PTE proper */
1086 PteContents
= *PointerPte
;
1087 if (PteContents
.u
.Soft
.PageFileHigh
!= MI_PTE_LOOKUP_NEEDED
)
1089 if (!PteContents
.u
.Proto
.ReadOnly
)
1091 /* Check for page acess in software */
1092 Status
= MiAccessCheck(PointerProtoPte
,
1095 TempPte
.u
.Soft
.Protection
,
1098 ASSERT(Status
== STATUS_SUCCESS
);
1100 /* Check for copy on write page */
1101 if ((TempPte
.u
.Soft
.Protection
& MM_WRITECOPY
) == MM_WRITECOPY
)
1103 /* Not yet supported */
1110 /* Check for copy on write page */
1111 if ((PteContents
.u
.Soft
.Protection
& MM_WRITECOPY
) == MM_WRITECOPY
)
1113 /* Not yet supported */
1118 /* Check for clone PTEs */
1119 if (PointerPte
<= MiHighestUserPte
) ASSERT(Process
->CloneRoot
== NULL
);
1121 /* We don't support mapped files yet */
1122 ASSERT(TempPte
.u
.Soft
.Prototype
== 0);
1124 /* We might however have transition PTEs */
1125 if (TempPte
.u
.Soft
.Transition
== 1)
1127 /* Resolve the transition fault */
1128 ASSERT(OldIrql
!= MM_NOIRQL
);
1129 Status
= MiResolveTransitionFault(Address
,
1134 ASSERT(NT_SUCCESS(Status
));
1138 /* We also don't support paged out pages */
1139 ASSERT(TempPte
.u
.Soft
.PageFileHigh
== 0);
1141 /* Resolve the demand zero fault */
1142 Status
= MiResolveDemandZeroFault(Address
,
1146 ASSERT(NT_SUCCESS(Status
));
1149 /* Complete the prototype PTE fault -- this will release the PFN lock */
1150 ASSERT(PointerPte
->u
.Hard
.Valid
== 0);
1151 return MiCompleteProtoPteFault(StoreInstruction
,
1161 MiDispatchFault(IN BOOLEAN StoreInstruction
,
1163 IN PMMPTE PointerPte
,
1164 IN PMMPTE PointerProtoPte
,
1165 IN BOOLEAN Recursive
,
1166 IN PEPROCESS Process
,
1167 IN PVOID TrapInformation
,
1171 KIRQL OldIrql
, LockIrql
;
1173 PMMPTE SuperProtoPte
;
1174 PMMPFN Pfn1
, OutPfn
= NULL
;
1175 PFN_NUMBER PageFrameIndex
;
1176 PFN_COUNT PteCount
, ProcessedPtes
;
1177 DPRINT("ARM3 Page Fault Dispatcher for address: %p in process: %p\n",
1181 /* Make sure the addresses are ok */
1182 ASSERT(PointerPte
== MiAddressToPte(Address
));
1185 // Make sure APCs are off and we're not at dispatch
1187 OldIrql
= KeGetCurrentIrql();
1188 ASSERT(OldIrql
<= APC_LEVEL
);
1189 ASSERT(KeAreAllApcsDisabled() == TRUE
);
1192 // Grab a copy of the PTE
1194 TempPte
= *PointerPte
;
1196 /* Do we have a prototype PTE? */
1197 if (PointerProtoPte
)
1199 /* This should never happen */
1200 ASSERT(!MI_IS_PHYSICAL_ADDRESS(PointerProtoPte
));
1202 /* Check if this is a kernel-mode address */
1203 SuperProtoPte
= MiAddressToPte(PointerProtoPte
);
1204 if (Address
>= MmSystemRangeStart
)
1206 /* Lock the PFN database */
1207 LockIrql
= KeAcquireQueuedSpinLock(LockQueuePfnLock
);
1209 /* Has the PTE been made valid yet? */
1210 if (!SuperProtoPte
->u
.Hard
.Valid
)
1214 else if (PointerPte
->u
.Hard
.Valid
== 1)
1219 /* Resolve the fault -- this will release the PFN lock */
1220 Status
= MiResolveProtoPteFault(StoreInstruction
,
1230 ASSERT(Status
== STATUS_SUCCESS
);
1232 /* Complete this as a transition fault */
1233 ASSERT(OldIrql
== KeGetCurrentIrql());
1234 ASSERT(OldIrql
<= APC_LEVEL
);
1235 ASSERT(KeAreAllApcsDisabled() == TRUE
);
1240 /* We only handle the lookup path */
1241 ASSERT(PointerPte
->u
.Soft
.PageFileHigh
== MI_PTE_LOOKUP_NEEDED
);
1243 /* Is there a non-image VAD? */
1245 (Vad
->u
.VadFlags
.VadType
!= VadImageMap
) &&
1246 !(Vad
->u2
.VadFlags2
.ExtendableFile
))
1248 /* One day, ReactOS will cluster faults */
1249 ASSERT(Address
<= MM_HIGHEST_USER_ADDRESS
);
1250 DPRINT("Should cluster fault, but won't\n");
1253 /* Only one PTE to handle for now */
1257 /* Lock the PFN database */
1258 LockIrql
= KeAcquireQueuedSpinLock(LockQueuePfnLock
);
1260 /* We only handle the valid path */
1261 ASSERT(SuperProtoPte
->u
.Hard
.Valid
== 1);
1263 /* Capture the PTE */
1264 TempPte
= *PointerProtoPte
;
1266 /* Loop to handle future case of clustered faults */
1269 /* For our current usage, this should be true */
1270 if (TempPte
.u
.Hard
.Valid
== 1)
1272 /* Bump the share count on the PTE */
1273 PageFrameIndex
= PFN_FROM_PTE(&TempPte
);
1274 Pfn1
= MI_PFN_ELEMENT(PageFrameIndex
);
1275 Pfn1
->u2
.ShareCount
++;
1277 else if ((TempPte
.u
.Soft
.Prototype
== 0) &&
1278 (TempPte
.u
.Soft
.Transition
== 1))
1280 /* This is a standby page, bring it back from the cache */
1281 PageFrameIndex
= TempPte
.u
.Trans
.PageFrameNumber
;
1282 DPRINT("oooh, shiny, a soft fault! 0x%lx\n", PageFrameIndex
);
1283 Pfn1
= MI_PFN_ELEMENT(PageFrameIndex
);
1284 ASSERT(Pfn1
->u3
.e1
.PageLocation
!= ActiveAndValid
);
1286 /* Should not yet happen in ReactOS */
1287 ASSERT(Pfn1
->u3
.e1
.ReadInProgress
== 0);
1288 ASSERT(Pfn1
->u4
.InPageError
== 0);
1291 MiUnlinkPageFromList(Pfn1
);
1293 /* Bump its reference count */
1294 ASSERT(Pfn1
->u2
.ShareCount
== 0);
1295 InterlockedIncrement16((PSHORT
)&Pfn1
->u3
.e2
.ReferenceCount
);
1296 Pfn1
->u2
.ShareCount
++;
1298 /* Make it valid again */
1299 /* This looks like another macro.... */
1300 Pfn1
->u3
.e1
.PageLocation
= ActiveAndValid
;
1301 ASSERT(PointerProtoPte
->u
.Hard
.Valid
== 0);
1302 ASSERT(PointerProtoPte
->u
.Trans
.Prototype
== 0);
1303 ASSERT(PointerProtoPte
->u
.Trans
.Transition
== 1);
1304 TempPte
.u
.Long
= (PointerProtoPte
->u
.Long
& ~0xFFF) |
1305 MmProtectToPteMask
[PointerProtoPte
->u
.Trans
.Protection
];
1306 TempPte
.u
.Hard
.Valid
= 1;
1307 MI_MAKE_ACCESSED_PAGE(&TempPte
);
1309 /* Is the PTE writeable? */
1310 if ((Pfn1
->u3
.e1
.Modified
) &&
1311 MI_IS_PAGE_WRITEABLE(&TempPte
) &&
1312 !MI_IS_PAGE_COPY_ON_WRITE(&TempPte
))
1315 MI_MAKE_DIRTY_PAGE(&TempPte
);
1320 MI_MAKE_CLEAN_PAGE(&TempPte
);
1323 /* Write the valid PTE */
1324 MI_WRITE_VALID_PTE(PointerProtoPte
, TempPte
);
1325 ASSERT(PointerPte
->u
.Hard
.Valid
== 0);
1329 /* Page is invalid, get out of the loop */
1333 /* One more done, was it the last? */
1334 if (++ProcessedPtes
== PteCount
)
1336 /* Complete the fault */
1337 MiCompleteProtoPteFault(StoreInstruction
,
1344 /* THIS RELEASES THE PFN LOCK! */
1348 /* No clustered faults yet */
1352 /* Did we resolve the fault? */
1355 /* Bump the transition count */
1356 InterlockedExchangeAddSizeT(&KeGetCurrentPrcb()->MmTransitionCount
, ProcessedPtes
);
1359 /* Loop all the processing we did */
1360 ASSERT(ProcessedPtes
== 0);
1362 /* Complete this as a transition fault */
1363 ASSERT(OldIrql
== KeGetCurrentIrql());
1364 ASSERT(OldIrql
<= APC_LEVEL
);
1365 ASSERT(KeAreAllApcsDisabled() == TRUE
);
1366 return STATUS_PAGE_FAULT_TRANSITION
;
1369 /* We did not -- PFN lock is still held, prepare to resolve prototype PTE fault */
1370 OutPfn
= MI_PFN_ELEMENT(SuperProtoPte
->u
.Hard
.PageFrameNumber
);
1371 MiReferenceUsedPageAndBumpLockCount(OutPfn
);
1372 ASSERT(OutPfn
->u3
.e2
.ReferenceCount
> 1);
1373 ASSERT(PointerPte
->u
.Hard
.Valid
== 0);
1375 /* Resolve the fault -- this will release the PFN lock */
1376 Status
= MiResolveProtoPteFault(StoreInstruction
,
1386 //ASSERT(Status != STATUS_ISSUE_PAGING_IO);
1387 //ASSERT(Status != STATUS_REFAULT);
1388 //ASSERT(Status != STATUS_PTE_CHANGED);
1390 /* Did the routine clean out the PFN or should we? */
1393 /* We had a locked PFN, so acquire the PFN lock to dereference it */
1394 ASSERT(PointerProtoPte
!= NULL
);
1395 OldIrql
= KeAcquireQueuedSpinLock(LockQueuePfnLock
);
1397 /* Dereference the locked PFN */
1398 MiDereferencePfnAndDropLockCount(OutPfn
);
1399 ASSERT(OutPfn
->u3
.e2
.ReferenceCount
>= 1);
1401 /* And now release the lock */
1402 KeReleaseQueuedSpinLock(LockQueuePfnLock
, OldIrql
);
1405 /* Complete this as a transition fault */
1406 ASSERT(OldIrql
== KeGetCurrentIrql());
1407 ASSERT(OldIrql
<= APC_LEVEL
);
1408 ASSERT(KeAreAllApcsDisabled() == TRUE
);
1413 /* Is this a transition PTE */
1414 if (TempPte
.u
.Soft
.Transition
)
1416 PVOID InPageBlock
= NULL
;
1417 /* Lock the PFN database */
1418 LockIrql
= KeAcquireQueuedSpinLock(LockQueuePfnLock
);
1421 Status
= MiResolveTransitionFault(Address
, PointerPte
, Process
, LockIrql
, &InPageBlock
);
1423 ASSERT(NT_SUCCESS(Status
));
1425 /* And now release the lock and leave*/
1426 KeReleaseQueuedSpinLock(LockQueuePfnLock
, LockIrql
);
1428 if (InPageBlock
!= NULL
)
1430 /* The page is being paged in by another process */
1431 KeWaitForSingleObject(InPageBlock
, WrPageIn
, KernelMode
, FALSE
, NULL
);
1434 ASSERT(OldIrql
== KeGetCurrentIrql());
1435 ASSERT(OldIrql
<= APC_LEVEL
);
1436 ASSERT(KeAreAllApcsDisabled() == TRUE
);
1440 /* Should we page the data back in ? */
1441 if (TempPte
.u
.Soft
.PageFileHigh
!= 0)
1443 /* Lock the PFN database */
1444 LockIrql
= KeAcquireQueuedSpinLock(LockQueuePfnLock
);
1447 Status
= MiResolvePageFileFault(StoreInstruction
, Address
, PointerPte
, Process
, &LockIrql
);
1449 /* And now release the lock and leave*/
1450 KeReleaseQueuedSpinLock(LockQueuePfnLock
, LockIrql
);
1452 ASSERT(OldIrql
== KeGetCurrentIrql());
1453 ASSERT(OldIrql
<= APC_LEVEL
);
1454 ASSERT(KeAreAllApcsDisabled() == TRUE
);
1459 // The PTE must be invalid but not completely empty. It must also not be a
1460 // prototype a transition or a paged-out PTE as those scenarii should've been handled above.
1461 // These are all Windows checks
1463 ASSERT(TempPte
.u
.Hard
.Valid
== 0);
1464 ASSERT(TempPte
.u
.Soft
.Prototype
== 0);
1465 ASSERT(TempPte
.u
.Soft
.Transition
== 0);
1466 ASSERT(TempPte
.u
.Soft
.PageFileHigh
== 0);
1467 ASSERT(TempPte
.u
.Long
!= 0);
1470 // If we got this far, the PTE can only be a demand zero PTE, which is what
1471 // we want. Go handle it!
1473 Status
= MiResolveDemandZeroFault(Address
,
1477 ASSERT(KeAreAllApcsDisabled() == TRUE
);
1478 if (NT_SUCCESS(Status
))
1481 // Make sure we're returning in a sane state and pass the status down
1483 ASSERT(OldIrql
== KeGetCurrentIrql());
1484 ASSERT(KeGetCurrentIrql() <= APC_LEVEL
);
1489 // Generate an access fault
1491 return STATUS_ACCESS_VIOLATION
;
1496 MmArmAccessFault(IN BOOLEAN StoreInstruction
,
1498 IN KPROCESSOR_MODE Mode
,
1499 IN PVOID TrapInformation
)
1501 KIRQL OldIrql
= KeGetCurrentIrql(), LockIrql
;
1502 PMMPTE ProtoPte
= NULL
;
1503 PMMPTE PointerPte
= MiAddressToPte(Address
);
1504 PMMPDE PointerPde
= MiAddressToPde(Address
);
1505 #if (_MI_PAGING_LEVELS >= 3)
1506 PMMPDE PointerPpe
= MiAddressToPpe(Address
);
1507 #if (_MI_PAGING_LEVELS == 4)
1508 PMMPDE PointerPxe
= MiAddressToPxe(Address
);
1512 PETHREAD CurrentThread
;
1513 PEPROCESS CurrentProcess
;
1515 PMMSUPPORT WorkingSet
;
1516 ULONG ProtectionCode
;
1518 PFN_NUMBER PageFrameIndex
;
1520 BOOLEAN IsSessionAddress
;
1522 DPRINT("ARM3 FAULT AT: %p\n", Address
);
1524 /* Check for page fault on high IRQL */
1525 if (OldIrql
> APC_LEVEL
)
1527 #if (_MI_PAGING_LEVELS < 3)
1528 /* Could be a page table for paged pool, which we'll allow */
1529 if (MI_IS_SYSTEM_PAGE_TABLE_ADDRESS(Address
)) MiSynchronizeSystemPde((PMMPDE
)PointerPte
);
1530 MiCheckPdeForPagedPool(Address
);
1532 /* Check if any of the top-level pages are invalid */
1534 #if (_MI_PAGING_LEVELS == 4)
1535 (PointerPxe
->u
.Hard
.Valid
== 0) ||
1537 #if (_MI_PAGING_LEVELS >= 3)
1538 (PointerPpe
->u
.Hard
.Valid
== 0) ||
1540 (PointerPde
->u
.Hard
.Valid
== 0) ||
1541 (PointerPte
->u
.Hard
.Valid
== 0))
1543 /* This fault is not valid, print out some debugging help */
1544 DbgPrint("MM:***PAGE FAULT AT IRQL > 1 Va %p, IRQL %lx\n",
1547 if (TrapInformation
)
1549 PKTRAP_FRAME TrapFrame
= TrapInformation
;
1551 DbgPrint("MM:***EIP %p, EFL %p\n", TrapFrame
->Eip
, TrapFrame
->EFlags
);
1552 DbgPrint("MM:***EAX %p, ECX %p EDX %p\n", TrapFrame
->Eax
, TrapFrame
->Ecx
, TrapFrame
->Edx
);
1553 DbgPrint("MM:***EBX %p, ESI %p EDI %p\n", TrapFrame
->Ebx
, TrapFrame
->Esi
, TrapFrame
->Edi
);
1554 #elif defined(_M_AMD64)
1555 DbgPrint("MM:***RIP %p, EFL %p\n", TrapFrame
->Rip
, TrapFrame
->EFlags
);
1556 DbgPrint("MM:***RAX %p, RCX %p RDX %p\n", TrapFrame
->Rax
, TrapFrame
->Rcx
, TrapFrame
->Rdx
);
1557 DbgPrint("MM:***RBX %p, RSI %p RDI %p\n", TrapFrame
->Rbx
, TrapFrame
->Rsi
, TrapFrame
->Rdi
);
1558 #elif defined(_M_ARM)
1559 DbgPrint("MM:***PC %p\n", TrapFrame
->Pc
);
1560 DbgPrint("MM:***R0 %p, R1 %p R2 %p, R3 %p\n", TrapFrame
->R0
, TrapFrame
->R1
, TrapFrame
->R2
, TrapFrame
->R3
);
1561 DbgPrint("MM:***R11 %p, R12 %p SP %p, LR %p\n", TrapFrame
->R11
, TrapFrame
->R12
, TrapFrame
->Sp
, TrapFrame
->Lr
);
1565 /* Tell the trap handler to fail */
1566 return STATUS_IN_PAGE_ERROR
| 0x10000000;
1569 /* Not yet implemented in ReactOS */
1570 ASSERT(MI_IS_PAGE_LARGE(PointerPde
) == FALSE
);
1571 ASSERT(((StoreInstruction
) && MI_IS_PAGE_COPY_ON_WRITE(PointerPte
)) == FALSE
);
1573 /* Check if this was a write */
1574 if (StoreInstruction
)
1576 /* Was it to a read-only page? */
1577 Pfn1
= MI_PFN_ELEMENT(PointerPte
->u
.Hard
.PageFrameNumber
);
1578 if (!(PointerPte
->u
.Long
& PTE_READWRITE
) &&
1579 !(Pfn1
->OriginalPte
.u
.Soft
.Protection
& MM_READWRITE
))
1581 /* Crash with distinguished bugcheck code */
1582 KeBugCheckEx(ATTEMPTED_WRITE_TO_READONLY_MEMORY
,
1585 (ULONG_PTR
)TrapInformation
,
1590 /* Nothing is actually wrong */
1591 DPRINT1("Fault at IRQL %u is ok (%p)\n", OldIrql
, Address
);
1592 return STATUS_SUCCESS
;
1595 /* Check for kernel fault address */
1596 if (Address
>= MmSystemRangeStart
)
1598 /* Bail out, if the fault came from user mode */
1599 if (Mode
== UserMode
) return STATUS_ACCESS_VIOLATION
;
1601 #if (_MI_PAGING_LEVELS == 2)
1602 if (MI_IS_SYSTEM_PAGE_TABLE_ADDRESS(Address
)) MiSynchronizeSystemPde((PMMPDE
)PointerPte
);
1603 MiCheckPdeForPagedPool(Address
);
1606 /* Check if the higher page table entries are invalid */
1608 #if (_MI_PAGING_LEVELS == 4)
1609 /* AMD64 system, check if PXE is invalid */
1610 (PointerPxe
->u
.Hard
.Valid
== 0) ||
1612 #if (_MI_PAGING_LEVELS >= 3)
1613 /* PAE/AMD64 system, check if PPE is invalid */
1614 (PointerPpe
->u
.Hard
.Valid
== 0) ||
1616 /* Always check if the PDE is valid */
1617 (PointerPde
->u
.Hard
.Valid
== 0))
1619 /* PXE/PPE/PDE (still) not valid, kill the system */
1620 KeBugCheckEx(PAGE_FAULT_IN_NONPAGED_AREA
,
1623 (ULONG_PTR
)TrapInformation
,
1627 /* Not handling session faults yet */
1628 IsSessionAddress
= MI_IS_SESSION_ADDRESS(Address
);
1630 /* The PDE is valid, so read the PTE */
1631 TempPte
= *PointerPte
;
1632 if (TempPte
.u
.Hard
.Valid
== 1)
1634 /* Check if this was system space or session space */
1635 if (!IsSessionAddress
)
1637 /* Check if the PTE is still valid under PFN lock */
1638 OldIrql
= KeAcquireQueuedSpinLock(LockQueuePfnLock
);
1639 TempPte
= *PointerPte
;
1640 if (TempPte
.u
.Hard
.Valid
)
1642 /* Check if this was a write */
1643 if (StoreInstruction
)
1645 /* Was it to a read-only page? */
1646 Pfn1
= MI_PFN_ELEMENT(PointerPte
->u
.Hard
.PageFrameNumber
);
1647 if (!(PointerPte
->u
.Long
& PTE_READWRITE
) &&
1648 !(Pfn1
->OriginalPte
.u
.Soft
.Protection
& MM_READWRITE
))
1650 /* Crash with distinguished bugcheck code */
1651 KeBugCheckEx(ATTEMPTED_WRITE_TO_READONLY_MEMORY
,
1654 (ULONG_PTR
)TrapInformation
,
1660 /* Release PFN lock and return all good */
1661 KeReleaseQueuedSpinLock(LockQueuePfnLock
, OldIrql
);
1662 return STATUS_SUCCESS
;
1665 #if (_MI_PAGING_LEVELS == 2)
1666 /* Check if this was a session PTE that needs to remap the session PDE */
1667 if (MI_IS_SESSION_PTE(Address
))
1669 /* Do the remapping */
1670 Status
= MiCheckPdeForSessionSpace(Address
);
1671 if (!NT_SUCCESS(Status
))
1673 /* It failed, this address is invalid */
1674 KeBugCheckEx(PAGE_FAULT_IN_NONPAGED_AREA
,
1677 (ULONG_PTR
)TrapInformation
,
1683 _WARN("Session space stuff is not implemented yet!")
1687 /* Check for a fault on the page table or hyperspace */
1688 if (MI_IS_PAGE_TABLE_OR_HYPER_ADDRESS(Address
))
1690 #if (_MI_PAGING_LEVELS < 3)
1691 /* Windows does this check but I don't understand why -- it's done above! */
1692 ASSERT(MiCheckPdeForPagedPool(Address
) != STATUS_WAIT_1
);
1694 /* Handle this as a user mode fault */
1698 /* Get the current thread */
1699 CurrentThread
= PsGetCurrentThread();
1701 /* What kind of address is this */
1702 if (!IsSessionAddress
)
1704 /* Use the system working set */
1705 WorkingSet
= &MmSystemCacheWs
;
1706 CurrentProcess
= NULL
;
1708 /* Make sure we don't have a recursive working set lock */
1709 if ((CurrentThread
->OwnsProcessWorkingSetExclusive
) ||
1710 (CurrentThread
->OwnsProcessWorkingSetShared
) ||
1711 (CurrentThread
->OwnsSystemWorkingSetExclusive
) ||
1712 (CurrentThread
->OwnsSystemWorkingSetShared
) ||
1713 (CurrentThread
->OwnsSessionWorkingSetExclusive
) ||
1714 (CurrentThread
->OwnsSessionWorkingSetShared
))
1717 return STATUS_IN_PAGE_ERROR
| 0x10000000;
1722 /* Use the session process and working set */
1723 CurrentProcess
= HYDRA_PROCESS
;
1724 WorkingSet
= &MmSessionSpace
->GlobalVirtualAddress
->Vm
;
1726 /* Make sure we don't have a recursive working set lock */
1727 if ((CurrentThread
->OwnsSessionWorkingSetExclusive
) ||
1728 (CurrentThread
->OwnsSessionWorkingSetShared
))
1731 return STATUS_IN_PAGE_ERROR
| 0x10000000;
1735 /* Acquire the working set lock */
1736 KeRaiseIrql(APC_LEVEL
, &LockIrql
);
1737 MiLockWorkingSet(CurrentThread
, WorkingSet
);
1739 /* Re-read PTE now that we own the lock */
1740 TempPte
= *PointerPte
;
1741 if (TempPte
.u
.Hard
.Valid
== 1)
1743 /* Check if this was a write */
1744 if (StoreInstruction
)
1746 /* Was it to a read-only page that is not copy on write? */
1747 Pfn1
= MI_PFN_ELEMENT(PointerPte
->u
.Hard
.PageFrameNumber
);
1748 if (!(TempPte
.u
.Long
& PTE_READWRITE
) &&
1749 !(Pfn1
->OriginalPte
.u
.Soft
.Protection
& MM_READWRITE
) &&
1750 !MI_IS_PAGE_COPY_ON_WRITE(&TempPte
))
1752 /* Case not yet handled */
1753 ASSERT(!IsSessionAddress
);
1755 /* Crash with distinguished bugcheck code */
1756 KeBugCheckEx(ATTEMPTED_WRITE_TO_READONLY_MEMORY
,
1759 (ULONG_PTR
)TrapInformation
,
1764 /* Check for read-only write in session space */
1765 if ((IsSessionAddress
) &&
1766 (StoreInstruction
) &&
1767 !MI_IS_PAGE_WRITEABLE(&TempPte
))
1770 ASSERT(MI_IS_SESSION_IMAGE_ADDRESS(Address
));
1773 if (!MI_IS_PAGE_COPY_ON_WRITE(&TempPte
))
1775 /* Then this is not allowed */
1776 KeBugCheckEx(ATTEMPTED_WRITE_TO_READONLY_MEMORY
,
1778 (ULONG_PTR
)TempPte
.u
.Long
,
1779 (ULONG_PTR
)TrapInformation
,
1783 /* Otherwise, handle COW */
1787 /* Release the working set */
1788 MiUnlockWorkingSet(CurrentThread
, WorkingSet
);
1789 KeLowerIrql(LockIrql
);
1791 /* Otherwise, the PDE was probably invalid, and all is good now */
1792 return STATUS_SUCCESS
;
1795 /* Check one kind of prototype PTE */
1796 if (TempPte
.u
.Soft
.Prototype
)
1798 /* Make sure protected pool is on, and that this is a pool address */
1799 if ((MmProtectFreedNonPagedPool
) &&
1800 (((Address
>= MmNonPagedPoolStart
) &&
1801 (Address
< (PVOID
)((ULONG_PTR
)MmNonPagedPoolStart
+
1802 MmSizeOfNonPagedPoolInBytes
))) ||
1803 ((Address
>= MmNonPagedPoolExpansionStart
) &&
1804 (Address
< MmNonPagedPoolEnd
))))
1806 /* Bad boy, bad boy, whatcha gonna do, whatcha gonna do when ARM3 comes for you! */
1807 KeBugCheckEx(DRIVER_CAUGHT_MODIFYING_FREED_POOL
,
1814 /* Get the prototype PTE! */
1815 ProtoPte
= MiProtoPteToPte(&TempPte
);
1817 /* Do we need to locate the prototype PTE in session space? */
1818 if ((IsSessionAddress
) &&
1819 (TempPte
.u
.Soft
.PageFileHigh
== MI_PTE_LOOKUP_NEEDED
))
1821 /* Yep, go find it as well as the VAD for it */
1822 ProtoPte
= MiCheckVirtualAddress(Address
,
1825 ASSERT(ProtoPte
!= NULL
);
1830 /* We don't implement transition PTEs */
1831 ASSERT(TempPte
.u
.Soft
.Transition
== 0);
1833 /* Check for no-access PTE */
1834 if (TempPte
.u
.Soft
.Protection
== MM_NOACCESS
)
1836 /* Bugcheck the system! */
1837 KeBugCheckEx(PAGE_FAULT_IN_NONPAGED_AREA
,
1840 (ULONG_PTR
)TrapInformation
,
1844 /* Check for no protecton at all */
1845 if (TempPte
.u
.Soft
.Protection
== MM_ZERO_ACCESS
)
1847 /* Bugcheck the system! */
1848 KeBugCheckEx(PAGE_FAULT_IN_NONPAGED_AREA
,
1851 (ULONG_PTR
)TrapInformation
,
1856 /* Check for demand page */
1857 if ((StoreInstruction
) &&
1859 !(IsSessionAddress
) &&
1860 !(TempPte
.u
.Hard
.Valid
))
1862 /* Get the protection code */
1863 ASSERT(TempPte
.u
.Soft
.Transition
== 0);
1864 if (!(TempPte
.u
.Soft
.Protection
& MM_READWRITE
))
1866 /* Bugcheck the system! */
1867 KeBugCheckEx(ATTEMPTED_WRITE_TO_READONLY_MEMORY
,
1870 (ULONG_PTR
)TrapInformation
,
1875 /* Now do the real fault handling */
1876 Status
= MiDispatchFault(StoreInstruction
,
1885 /* Release the working set */
1886 ASSERT(KeAreAllApcsDisabled() == TRUE
);
1887 MiUnlockWorkingSet(CurrentThread
, WorkingSet
);
1888 KeLowerIrql(LockIrql
);
1891 DPRINT("Fault resolved with status: %lx\n", Status
);
1895 /* This is a user fault */
1897 CurrentThread
= PsGetCurrentThread();
1898 CurrentProcess
= (PEPROCESS
)CurrentThread
->Tcb
.ApcState
.Process
;
1900 /* Lock the working set */
1901 MiLockProcessWorkingSet(CurrentProcess
, CurrentThread
);
1903 #if (_MI_PAGING_LEVELS == 4)
1904 // Note to Timo: You should call MiCheckVirtualAddress and also check if it's zero pte
1905 // also this is missing the page count increment
1906 /* Check if the PXE is valid */
1907 if (PointerPxe
->u
.Hard
.Valid
== 0)
1909 /* Right now, we only handle scenarios where the PXE is totally empty */
1910 ASSERT(PointerPxe
->u
.Long
== 0);
1912 /* Resolve a demand zero fault */
1913 Status
= MiResolveDemandZeroFault(PointerPpe
,
1918 /* We should come back with a valid PXE */
1919 ASSERT(PointerPxe
->u
.Hard
.Valid
== 1);
1923 #if (_MI_PAGING_LEVELS >= 3)
1924 // Note to Timo: You should call MiCheckVirtualAddress and also check if it's zero pte
1925 // also this is missing the page count increment
1926 /* Check if the PPE is valid */
1927 if (PointerPpe
->u
.Hard
.Valid
== 0)
1929 /* Right now, we only handle scenarios where the PPE is totally empty */
1930 ASSERT(PointerPpe
->u
.Long
== 0);
1932 /* Resolve a demand zero fault */
1933 Status
= MiResolveDemandZeroFault(PointerPde
,
1938 /* We should come back with a valid PPE */
1939 ASSERT(PointerPpe
->u
.Hard
.Valid
== 1);
1943 /* Check if the PDE is valid */
1944 if (PointerPde
->u
.Hard
.Valid
== 0)
1946 /* Right now, we only handle scenarios where the PDE is totally empty */
1947 ASSERT(PointerPde
->u
.Long
== 0);
1949 /* And go dispatch the fault on the PDE. This should handle the demand-zero */
1951 UserPdeFault
= TRUE
;
1953 MiCheckVirtualAddress(Address
, &ProtectionCode
, &Vad
);
1954 if (ProtectionCode
== MM_NOACCESS
)
1956 #if (_MI_PAGING_LEVELS == 2)
1957 /* Could be a page table for paged pool */
1958 MiCheckPdeForPagedPool(Address
);
1960 /* Has the code above changed anything -- is this now a valid PTE? */
1961 Status
= (PointerPde
->u
.Hard
.Valid
== 1) ? STATUS_SUCCESS
: STATUS_ACCESS_VIOLATION
;
1963 /* Either this was a bogus VA or we've fixed up a paged pool PDE */
1964 MiUnlockProcessWorkingSet(CurrentProcess
, CurrentThread
);
1968 /* Write a demand-zero PDE */
1969 MI_WRITE_INVALID_PDE(PointerPde
, DemandZeroPde
);
1971 /* Dispatch the fault */
1972 Status
= MiDispatchFault(TRUE
,
1977 PsGetCurrentProcess(),
1981 UserPdeFault
= FALSE
;
1983 /* We should come back with APCs enabled, and with a valid PDE */
1984 ASSERT(KeAreAllApcsDisabled() == TRUE
);
1985 ASSERT(PointerPde
->u
.Hard
.Valid
== 1);
1989 /* Not yet implemented in ReactOS */
1990 ASSERT(MI_IS_PAGE_LARGE(PointerPde
) == FALSE
);
1993 /* Now capture the PTE. */
1994 TempPte
= *PointerPte
;
1996 /* Check if the PTE is valid */
1997 if (TempPte
.u
.Hard
.Valid
)
1999 /* Check if this is a write on a readonly PTE */
2000 if (StoreInstruction
)
2002 /* Is this a copy on write PTE? */
2003 if (MI_IS_PAGE_COPY_ON_WRITE(&TempPte
))
2005 /* Not supported yet */
2009 /* Is this a read-only PTE? */
2010 if (!MI_IS_PAGE_WRITEABLE(&TempPte
))
2012 /* Return the status */
2013 MiUnlockProcessWorkingSet(CurrentProcess
, CurrentThread
);
2014 return STATUS_ACCESS_VIOLATION
;
2018 /* FIXME: Execution is ignored for now, since we don't have no-execute pages yet */
2020 /* The fault has already been resolved by a different thread */
2021 MiUnlockProcessWorkingSet(CurrentProcess
, CurrentThread
);
2022 return STATUS_SUCCESS
;
2025 /* Quick check for demand-zero */
2026 if (TempPte
.u
.Long
== (MM_READWRITE
<< MM_PTE_SOFTWARE_PROTECTION_BITS
))
2028 /* Resolve the fault */
2029 MiResolveDemandZeroFault(Address
,
2034 /* Return the status */
2035 MiUnlockProcessWorkingSet(CurrentProcess
, CurrentThread
);
2036 return STATUS_PAGE_FAULT_DEMAND_ZERO
;
2039 /* Check for zero PTE */
2040 if (TempPte
.u
.Long
== 0)
2042 /* Check if this address range belongs to a valid allocation (VAD) */
2043 ProtoPte
= MiCheckVirtualAddress(Address
, &ProtectionCode
, &Vad
);
2044 if (ProtectionCode
== MM_NOACCESS
)
2046 #if (_MI_PAGING_LEVELS == 2)
2047 /* Could be a page table for paged pool */
2048 MiCheckPdeForPagedPool(Address
);
2050 /* Has the code above changed anything -- is this now a valid PTE? */
2051 Status
= (PointerPte
->u
.Hard
.Valid
== 1) ? STATUS_SUCCESS
: STATUS_ACCESS_VIOLATION
;
2053 /* Either this was a bogus VA or we've fixed up a paged pool PDE */
2054 MiUnlockProcessWorkingSet(CurrentProcess
, CurrentThread
);
2059 * Check if this is a real user-mode address or actually a kernel-mode
2060 * page table for a user mode address
2062 if (Address
<= MM_HIGHEST_USER_ADDRESS
)
2064 /* Add an additional page table reference */
2065 MiIncrementPageTableReferences(Address
);
2068 /* Is this a guard page? */
2069 if ((ProtectionCode
& MM_PROTECT_SPECIAL
) == MM_GUARDPAGE
)
2071 /* The VAD protection cannot be MM_DECOMMIT! */
2072 ASSERT(ProtectionCode
!= MM_DECOMMIT
);
2074 /* Remove the bit */
2075 TempPte
.u
.Soft
.Protection
= ProtectionCode
& ~MM_GUARDPAGE
;
2076 MI_WRITE_INVALID_PTE(PointerPte
, TempPte
);
2079 ASSERT(ProtoPte
== NULL
);
2080 ASSERT(CurrentThread
->ApcNeeded
== 0);
2082 /* Drop the working set lock */
2083 MiUnlockProcessWorkingSet(CurrentProcess
, CurrentThread
);
2084 ASSERT(KeGetCurrentIrql() == OldIrql
);
2086 /* Handle stack expansion */
2087 return MiCheckForUserStackOverflow(Address
, TrapInformation
);
2090 /* Did we get a prototype PTE back? */
2093 /* Is this PTE actually part of the PDE-PTE self-mapping directory? */
2094 if (PointerPde
== MiAddressToPde(PTE_BASE
))
2096 /* Then it's really a demand-zero PDE (on behalf of user-mode) */
2098 _WARN("This is probably completely broken!");
2099 MI_WRITE_INVALID_PDE((PMMPDE
)PointerPte
, DemandZeroPde
);
2101 MI_WRITE_INVALID_PTE(PointerPte
, DemandZeroPde
);
2106 /* No, create a new PTE. First, write the protection */
2107 TempPte
.u
.Soft
.Protection
= ProtectionCode
;
2108 MI_WRITE_INVALID_PTE(PointerPte
, TempPte
);
2111 /* Lock the PFN database since we're going to grab a page */
2112 OldIrql
= KeAcquireQueuedSpinLock(LockQueuePfnLock
);
2114 /* Make sure we have enough pages */
2115 ASSERT(MmAvailablePages
>= 32);
2117 /* Try to get a zero page */
2118 MI_SET_USAGE(MI_USAGE_PEB_TEB
);
2119 MI_SET_PROCESS2(CurrentProcess
->ImageFileName
);
2120 Color
= MI_GET_NEXT_PROCESS_COLOR(CurrentProcess
);
2121 PageFrameIndex
= MiRemoveZeroPageSafe(Color
);
2122 if (!PageFrameIndex
)
2124 /* Grab a page out of there. Later we should grab a colored zero page */
2125 PageFrameIndex
= MiRemoveAnyPage(Color
);
2126 ASSERT(PageFrameIndex
);
2128 /* Release the lock since we need to do some zeroing */
2129 KeReleaseQueuedSpinLock(LockQueuePfnLock
, OldIrql
);
2131 /* Zero out the page, since it's for user-mode */
2132 MiZeroPfn(PageFrameIndex
);
2134 /* Grab the lock again so we can initialize the PFN entry */
2135 OldIrql
= KeAcquireQueuedSpinLock(LockQueuePfnLock
);
2138 /* Initialize the PFN entry now */
2139 MiInitializePfn(PageFrameIndex
, PointerPte
, 1);
2141 /* And we're done with the lock */
2142 KeReleaseQueuedSpinLock(LockQueuePfnLock
, OldIrql
);
2144 /* Increment the count of pages in the process */
2145 CurrentProcess
->NumberOfPrivatePages
++;
2147 /* One more demand-zero fault */
2148 InterlockedIncrement(&KeGetCurrentPrcb()->MmDemandZeroCount
);
2150 /* Fault on user PDE, or fault on user PTE? */
2151 if (PointerPte
<= MiHighestUserPte
)
2153 /* User fault, build a user PTE */
2154 MI_MAKE_HARDWARE_PTE_USER(&TempPte
,
2156 PointerPte
->u
.Soft
.Protection
,
2161 /* This is a user-mode PDE, create a kernel PTE for it */
2162 MI_MAKE_HARDWARE_PTE(&TempPte
,
2164 PointerPte
->u
.Soft
.Protection
,
2168 /* Write the dirty bit for writeable pages */
2169 if (MI_IS_PAGE_WRITEABLE(&TempPte
)) MI_MAKE_DIRTY_PAGE(&TempPte
);
2171 /* And now write down the PTE, making the address valid */
2172 MI_WRITE_VALID_PTE(PointerPte
, TempPte
);
2173 Pfn1
= MI_PFN_ELEMENT(PageFrameIndex
);
2174 ASSERT(Pfn1
->u1
.Event
== NULL
);
2177 ASSERT(KeGetCurrentIrql() <= APC_LEVEL
);
2178 MiUnlockProcessWorkingSet(CurrentProcess
, CurrentThread
);
2179 return STATUS_PAGE_FAULT_DEMAND_ZERO
;
2182 /* We should have a valid protection here */
2183 ASSERT(ProtectionCode
!= 0x100);
2185 /* Write the prototype PTE */
2186 TempPte
= PrototypePte
;
2187 TempPte
.u
.Soft
.Protection
= ProtectionCode
;
2188 ASSERT(TempPte
.u
.Long
!= 0);
2189 MI_WRITE_INVALID_PTE(PointerPte
, TempPte
);
2193 /* Get the protection code and check if this is a proto PTE */
2194 ProtectionCode
= (ULONG
)TempPte
.u
.Soft
.Protection
;
2195 if (TempPte
.u
.Soft
.Prototype
)
2197 /* Do we need to go find the real PTE? */
2198 if (TempPte
.u
.Soft
.PageFileHigh
== MI_PTE_LOOKUP_NEEDED
)
2200 /* Get the prototype pte and VAD for it */
2201 ProtoPte
= MiCheckVirtualAddress(Address
,
2206 ASSERT(KeGetCurrentIrql() <= APC_LEVEL
);
2207 MiUnlockProcessWorkingSet(CurrentProcess
, CurrentThread
);
2208 return STATUS_ACCESS_VIOLATION
;
2213 /* Get the prototype PTE! */
2214 ProtoPte
= MiProtoPteToPte(&TempPte
);
2216 /* Is it read-only */
2217 if (TempPte
.u
.Proto
.ReadOnly
)
2219 /* Set read-only code */
2220 ProtectionCode
= MM_READONLY
;
2224 /* Set unknown protection */
2225 ProtectionCode
= 0x100;
2226 ASSERT(CurrentProcess
->CloneRoot
!= NULL
);
2232 /* Do we have a valid protection code? */
2233 if (ProtectionCode
!= 0x100)
2235 /* Run a software access check first, including to detect guard pages */
2236 Status
= MiAccessCheck(PointerPte
,
2242 if (Status
!= STATUS_SUCCESS
)
2245 ASSERT(CurrentThread
->ApcNeeded
== 0);
2247 /* Drop the working set lock */
2248 MiUnlockProcessWorkingSet(CurrentProcess
, CurrentThread
);
2249 ASSERT(KeGetCurrentIrql() == OldIrql
);
2251 /* Did we hit a guard page? */
2252 if (Status
== STATUS_GUARD_PAGE_VIOLATION
)
2254 /* Handle stack expansion */
2255 return MiCheckForUserStackOverflow(Address
, TrapInformation
);
2258 /* Otherwise, fail back to the caller directly */
2263 /* Dispatch the fault */
2264 Status
= MiDispatchFault(StoreInstruction
,
2273 /* Return the status */
2274 ASSERT(KeGetCurrentIrql() <= APC_LEVEL
);
2275 MiUnlockProcessWorkingSet(CurrentProcess
, CurrentThread
);
2281 MmGetExecuteOptions(IN PULONG ExecuteOptions
)
2283 PKPROCESS CurrentProcess
= &PsGetCurrentProcess()->Pcb
;
2284 ASSERT(KeGetCurrentIrql() == PASSIVE_LEVEL
);
2286 *ExecuteOptions
= 0;
2288 if (CurrentProcess
->Flags
.ExecuteDisable
)
2290 *ExecuteOptions
|= MEM_EXECUTE_OPTION_DISABLE
;
2293 if (CurrentProcess
->Flags
.ExecuteEnable
)
2295 *ExecuteOptions
|= MEM_EXECUTE_OPTION_ENABLE
;
2298 if (CurrentProcess
->Flags
.DisableThunkEmulation
)
2300 *ExecuteOptions
|= MEM_EXECUTE_OPTION_DISABLE_THUNK_EMULATION
;
2303 if (CurrentProcess
->Flags
.Permanent
)
2305 *ExecuteOptions
|= MEM_EXECUTE_OPTION_PERMANENT
;
2308 if (CurrentProcess
->Flags
.ExecuteDispatchEnable
)
2310 *ExecuteOptions
|= MEM_EXECUTE_OPTION_EXECUTE_DISPATCH_ENABLE
;
2313 if (CurrentProcess
->Flags
.ImageDispatchEnable
)
2315 *ExecuteOptions
|= MEM_EXECUTE_OPTION_IMAGE_DISPATCH_ENABLE
;
2318 return STATUS_SUCCESS
;
2323 MmSetExecuteOptions(IN ULONG ExecuteOptions
)
2325 PKPROCESS CurrentProcess
= &PsGetCurrentProcess()->Pcb
;
2326 KLOCK_QUEUE_HANDLE ProcessLock
;
2327 NTSTATUS Status
= STATUS_ACCESS_DENIED
;
2328 ASSERT(KeGetCurrentIrql() == PASSIVE_LEVEL
);
2330 /* Only accept valid flags */
2331 if (ExecuteOptions
& ~MEM_EXECUTE_OPTION_VALID_FLAGS
)
2334 DPRINT1("Invalid no-execute options\n");
2335 return STATUS_INVALID_PARAMETER
;
2338 /* Change the NX state in the process lock */
2339 KiAcquireProcessLock(CurrentProcess
, &ProcessLock
);
2341 /* Don't change anything if the permanent flag was set */
2342 if (!CurrentProcess
->Flags
.Permanent
)
2344 /* Start by assuming it's not disabled */
2345 CurrentProcess
->Flags
.ExecuteDisable
= FALSE
;
2347 /* Now process each flag and turn the equivalent bit on */
2348 if (ExecuteOptions
& MEM_EXECUTE_OPTION_DISABLE
)
2350 CurrentProcess
->Flags
.ExecuteDisable
= TRUE
;
2352 if (ExecuteOptions
& MEM_EXECUTE_OPTION_ENABLE
)
2354 CurrentProcess
->Flags
.ExecuteEnable
= TRUE
;
2356 if (ExecuteOptions
& MEM_EXECUTE_OPTION_DISABLE_THUNK_EMULATION
)
2358 CurrentProcess
->Flags
.DisableThunkEmulation
= TRUE
;
2360 if (ExecuteOptions
& MEM_EXECUTE_OPTION_PERMANENT
)
2362 CurrentProcess
->Flags
.Permanent
= TRUE
;
2364 if (ExecuteOptions
& MEM_EXECUTE_OPTION_EXECUTE_DISPATCH_ENABLE
)
2366 CurrentProcess
->Flags
.ExecuteDispatchEnable
= TRUE
;
2368 if (ExecuteOptions
& MEM_EXECUTE_OPTION_IMAGE_DISPATCH_ENABLE
)
2370 CurrentProcess
->Flags
.ImageDispatchEnable
= TRUE
;
2373 /* These are turned on by default if no-execution is also eanbled */
2374 if (CurrentProcess
->Flags
.ExecuteEnable
)
2376 CurrentProcess
->Flags
.ExecuteDispatchEnable
= TRUE
;
2377 CurrentProcess
->Flags
.ImageDispatchEnable
= TRUE
;
2381 Status
= STATUS_SUCCESS
;
2384 /* Release the lock and return status */
2385 KiReleaseProcessLock(&ProcessLock
);