reactos/sdk/include/ndk/arm/ketypes.h

   1 /*++ NDK Version: 0098
   2
   3 Copyright (c) Alex Ionescu.  All rights reserved.
   4
   5 Header Name:
   6
   7     ketypes.h (ARM)
   8
   9 Abstract:
  10
  11     ARM Type definitions for the Kernel services.
  12
  13 Author:
  14
  15     Alex Ionescu (alexi@tinykrnl.org) - Updated - 27-Feb-2006
  16     Timo Kreuzer (timo.kreuzer@reactos.org) - Updated 19-Apr-2015
  17
  18 --*/
  19
  20 #ifndef _ARM_KETYPES_H
  21 #define _ARM_KETYPES_H
  22
  23 #ifdef __cplusplus
  24 extern "C" {
  25 #endif
  26
  27 //
  28 // Dependencies
  29 //
  30
  31
  32 #define SYNCH_LEVEL DISPATCH_LEVEL
  33
  34 //
  35 // Co-Processor register definitions
  36 //
  37 #define CP15_MIDR       15, 0,  0,  0, 0
  38 #define CP15_CTR        15, 0,  0,  0, 1
  39 #define CP15_TCMTR      15, 0,  0,  0, 2
  40 #define CP15_TLBTR      15, 0,  0,  0, 3
  41 #define CP15_MPIDR      15, 0,  0,  0, 5
  42 #define CP15_PFR0       15, 0,  0,  1, 0
  43 #define CP15_PFR1       15, 0,  0,  1, 1
  44 #define CP15_DFR0       15, 0,  0,  1, 2
  45 #define CP15_AFR0       15, 0,  0,  1, 3
  46 #define CP15_MMFR0      15, 0,  0,  1, 4
  47 #define CP15_MMFR1      15, 0,  0,  1, 5
  48 #define CP15_MMFR2      15, 0,  0,  1, 6
  49 #define CP15_MMFR3      15, 0,  0,  1, 7
  50 #define CP15_ISAR0      15, 0,  0,  2, 0
  51 #define CP15_ISAR1      15, 0,  0,  2, 1
  52 #define CP15_ISAR2      15, 0,  0,  2, 2
  53 #define CP15_ISAR3      15, 0,  0,  2, 3
  54 #define CP15_ISAR4      15, 0,  0,  2, 4
  55 #define CP15_ISAR5      15, 0,  0,  2, 5
  56 #define CP15_ISAR6      15, 0,  0,  2, 6
  57 #define CP15_ISAR7      15, 0,  0,  2, 7
  58 #define CP15_SCTLR      15, 0,  1,  0, 0
  59 #define CP15_ACTLR      15, 0,  1,  0, 1
  60 #define CP15_CPACR      15, 0,  1,  0, 2
  61 #define CP15_SCR        15, 0,  1,  1, 0
  62 #define CP15_SDER       15, 0,  1,  1, 1
  63 #define CP15_NSACR      15, 0,  1,  1, 2
  64 #define CP15_TTBR0      15, 0,  2,  0, 0
  65 #define CP15_TTBR1      15, 0,  2,  0, 1
  66 #define CP15_TTBCR      15, 0,  2,  0, 2
  67 #define CP15_DACR       15, 0,  3,  0, 0
  68 #define CP15_DFSR       15, 0,  5,  0, 0
  69 #define CP15_IFSR       15, 0,  5,  0, 1
  70 #define CP15_DFAR       15, 0,  6,  0, 0
  71 #define CP15_IFAR       15, 0,  6,  0, 2
  72 #define CP15_ICIALLUIS  15, 0,  7,  1, 0
  73 #define CP15_BPIALLIS   15, 0,  7,  1, 6
  74 #define CP15_ICIALLU    15, 0,  7,  5, 0
  75 #define CP15_ICIMVAU    15, 0,  7,  5, 1
  76 #define CP15_BPIALL     15, 0,  7,  5, 6
  77 #define CP15_BPIMVA     15, 0,  7,  5, 7
  78 #define CP15_DCIMVAC    15, 0,  7,  6, 1
  79 #define CP15_DCISW      15, 0,  7,  6, 2
  80 #define CP15_DCCMVAC    15, 0,  7, 10, 1
  81 #define CP15_DCCSW      15, 0,  7, 10, 2
  82 #define CP15_DCCMVAU    15, 0,  7, 11, 1
  83 #define CP15_DCCIMVAC   15, 0,  7, 14, 1
  84 #define CP15_DCCISW     15, 0,  7, 14, 2
  85 #define CP15_PAR        15, 0,  7,  4, 0
  86 #define CP15_ATS1CPR    15, 0,  7,  8, 0
  87 #define CP15_ATS1CPW    15, 0,  7,  8, 1
  88 #define CP15_ATS1CUR    15, 0,  7,  8, 2
  89 #define CP15_ATS1CUW    15, 0,  7,  8, 3
  90 #define CP15_ISB        15, 0,  7,  5, 4
  91 #define CP15_DSB        15, 0,  7, 10, 4
  92 #define CP15_DMB        15, 0,  7, 10, 5
  93 #define CP15_TLBIALLIS  15, 0,  8,  3, 0
  94 #define CP15_TLBIMVAIS  15, 0,  8,  3, 1
  95 #define CP15_TLBIASIDIS 15, 0,  8,  3, 2
  96 #define CP15_TLBIMVAAIS 15, 0,  8,  3, 3
  97 #define CP15_ITLBIALL   15, 0,  8,  5, 0
  98 #define CP15_ITLBIMVA   15, 0,  8,  5, 1
  99 #define CP15_ITLBIASID  15, 0,  8,  5, 2
 100 #define CP15_DTLBIALL   15, 0,  8,  6, 0
 101 #define CP15_DTLBIMVA   15, 0,  8,  6, 1
 102 #define CP15_DTLBIASID  15, 0,  8,  6, 2
 103 #define CP15_TLBIALL    15, 0,  8,  7, 0
 104 #define CP15_TLBIMVA    15, 0,  8,  7, 1
 105 #define CP15_TLBIASID   15, 0,  8,  7, 2
 106 #define CP15_TLBIMVAA   15, 0,  8,  7, 3
 107 #define CP15_PMCR       15, 0,  9, 12, 0
 108 #define CP15_PMCNTENSET 15, 0,  9, 12, 1
 109 #define CP15_PMCNTENCLR 15, 0,  9, 12, 2
 110 #define CP15_PMOVSR     15, 0,  9, 12, 3
 111 #define CP15_PSWINC     15, 0,  9, 12, 4
 112 #define CP15_PMSELR     15, 0,  9, 12, 5
 113 #define CP15_PMCCNTR    15, 0,  9, 13, 0
 114 #define CP15_PMXEVTYPER 15, 0,  9, 13, 1
 115 #define CP15_PMXEVCNTR  15, 0,  9, 13, 2
 116 #define CP15_PMUSERENR  15, 0,  9, 14, 0
 117 #define CP15_PMINTENSET 15, 0,  9, 14, 1
 118 #define CP15_PMINTENCLR 15, 0,  9, 14, 2
 119 #define CP15_PRRR       15, 0, 10,  2, 0
 120 #define CP15_NMRR       15, 0, 10,  2, 1
 121 #define CP15_VBAR       15, 0, 12,  0, 0
 122 #define CP15_MVBAR      15, 0, 12,  0, 1
 123 #define CP15_ISR        15, 0, 12,  1, 0
 124 #define CP15_CONTEXTIDR 15, 0, 13,  0, 1
 125 #define CP15_TPIDRURW   15, 0, 13,  0, 2
 126 #define CP15_TPIDRURO   15, 0, 13,  0, 3
 127 #define CP15_TPIDRPRW   15, 0, 13,  0, 4
 128 #define CP15_CCSIDR     15, 1,  0,  0, 0
 129 #define CP15_CLIDR      15, 1,  0,  0, 1
 130 #define CP15_AIDR       15, 1,  0,  0, 7
 131 #define CP15_CSSELR     15, 2,  0,  0, 0
 132 #define CP14_DBGDIDR    14, 0,  0,  0, 0
 133 #define CP14_DBGWFAR    14, 0,  0,  6, 0
 134 #define CP14_DBGVCR     14, 0,  0,  7, 0
 135 #define CP14_DBGECR     14, 0,  0,  9, 0
 136 #define CP14_DBGDSCCR   14, 0,  0, 10, 0
 137 #define CP14_DBGDSMCR   14, 0,  0, 11, 0
 138 #define CP14_DBGDTRRX   14, 0,  0,  0, 2
 139 #define CP14_DBGPCSR    14, 0,  0,  1, 2
 140 #define CP14_DBGITR     14, 0,  0,  1, 2
 141 #define CP14_DBGDSCR    14, 0,  0,  2, 2
 142 #define CP14_DBGDTRTX   14, 0,  0,  3, 2
 143 #define CP14_DBGDRCR    14, 0,  0,  4, 2
 144 #define CP14_DBGCIDSR   14, 0,  0,  9, 2
 145 #define CP14_DBGBVR0    14, 0,  0,  0, 4
 146 #define CP14_DBGBVR1    14, 0,  0,  1, 4
 147 #define CP14_DBGBVR2    14, 0,  0,  2, 4
 148 #define CP14_DBGBVR3    14, 0,  0,  3, 4
 149 #define CP14_DBGBVR4    14, 0,  0,  4, 4
 150 #define CP14_DBGBVR5    14, 0,  0,  5, 4
 151 #define CP14_DBGBVR6    14, 0,  0,  6, 4
 152 #define CP14_DBGBVR7    14, 0,  0,  7, 4
 153 #define CP14_DBGBCR0    14, 0,  0,  0, 5
 154 #define CP14_DBGBCR1    14, 0,  0,  1, 5
 155 #define CP14_DBGBCR2    14, 0,  0,  2, 5
 156 #define CP14_DBGBCR3    14, 0,  0,  3, 5
 157 #define CP14_DBGBCR4    14, 0,  0,  4, 5
 158 #define CP14_DBGBCR5    14, 0,  0,  5, 5
 159 #define CP14_DBGBCR6    14, 0,  0,  6, 5
 160 #define CP14_DBGBCR7    14, 0,  0,  7, 5
 161 #define CP14_DBGWVR0    14, 0,  0,  0, 6
 162 #define CP14_DBGWVR1    14, 0,  0,  1, 6
 163 #define CP14_DBGWVR2    14, 0,  0,  2, 6
 164 #define CP14_DBGWVR3    14, 0,  0,  3, 6
 165 #define CP14_DBGWCR0    14, 0,  0,  0, 7
 166 #define CP14_DBGWCR1    14, 0,  0,  1, 7
 167 #define CP14_DBGWCR2    14, 0,  0,  2, 7
 168 #define CP14_DBGWCR3    14, 0,  0,  3, 7
 169 #define CPVFP_FPSID     10, 7,  0,  0, 0
 170 #define CPVFP_FPSCR     10, 7,  1,  0, 0
 171 #define CPVFP_MVFR1     10, 7,  6,  0, 0
 172 #define CPVFP_MVFR0     10, 7,  7,  0, 0
 173 #define CPVFP_FPEXC     10, 7,  8,  0, 0
 174 #define CP15_TTBRx_PD_MASK 0xffffc000
 175
 176
 177 //
 178 // CPSR Values
 179 //
 180 #define CPSRM_USER           0x10
 181 #define CPSRM_FIQ            0x11
 182 #define CPSRM_INT            0x12
 183 #define CPSRM_SVC            0x13
 184 #define CPSRM_ABT            0x17
 185 #define CPSRM_UDF            0x1b
 186 #define CPSRM_SYS            0x1f
 187 #define CPSRM_MASK           0x1f
 188 #define SYSCALL_PSR          0x30
 189
 190 #define CPSRF_N 0x80000000
 191 #define CPSRF_Z 0x40000000
 192 #define CPSRF_C 0x20000000
 193 #define CPSRF_V 0x10000000
 194 #define CPSRF_Q 0x08000000
 195 #define CPSR_IT_MASK 0x600fc00
 196
 197 #define FPSCRF_N  0x80000000
 198 #define FPSCRF_Z  0x40000000
 199 #define FPSCRF_C  0x20000000
 200 #define FPSCRF_V  0x10000000
 201 #define FPSCRF_QC 0x08000000
 202
 203 #define FPSCRM_AHP 0x4000000
 204 #define FPSCRM_DN 0x2000000
 205 #define FPSCRM_FZ 0x1000000
 206 #define FPSCRM_RMODE_MASK 0xc00000
 207 #define FPSCRM_RMODE_RN 0x0
 208 #define FPSCRM_RMODE_RP 0x400000
 209 #define FPSCRM_RMODE_RM 0x800000
 210 #define FPSCRM_RMODE_RZ 0xc00000
 211 #define FPSCRM_DEPRECATED 0x370000
 212
 213 #define FPSCR_IDE 0x8000
 214 #define FPSCR_IXE 0x1000
 215 #define FPSCR_UFE 0x800
 216 #define FPSCR_OFE 0x400
 217 #define FPSCR_DZE 0x200
 218 #define FPSCR_IOE 0x100
 219 #define FPSCR_IDC 0x80
 220 #define FPSCR_IXC 0x10
 221 #define FPSCR_UFC 0x8
 222 #define FPSCR_OFC 0x4
 223 #define FPSCR_DZC 0x2
 224 #define FPSCR_IOC 0x1
 225
 226 #define CPSRC_INT 0x80
 227 #define CPSRC_ABORT 0x100
 228 #define CPSRC_THUMB 0x20
 229
 230 #define SWFS_PAGE_FAULT 0x10
 231 #define SWFS_ALIGN_FAULT 0x20
 232 #define SWFS_HWERR_FAULT 0x40
 233 #define SWFS_DEBUG_FAULT 0x80
 234 #define SWFS_EXECUTE 0x8
 235 #define SWFS_WRITE 0x1
 236
 237 #define CP14_DBGDSCR_MOE_MASK 0x3c
 238 #define CP14_DBGDSCR_MOE_SHIFT 0x2
 239 #define CP14_DBGDSCR_MOE_HALT 0x0
 240 #define CP14_DBGDSCR_MOE_BP 0x1
 241 #define CP14_DBGDSCR_MOE_WPASYNC 0x2
 242 #define CP14_DBGDSCR_MOE_BKPT 0x3
 243 #define CP14_DBGDSCR_MOE_EXTERNAL 0x4
 244 #define CP14_DBGDSCR_MOE_VECTOR 0x5
 245 #define CP14_DBGDSCR_MOE_WPSYNC 0xa
 246
 247 #define CP15_PMCR_DP 0x20
 248 #define CP15_PMCR_X 0x10
 249 #define CP15_PMCR_CLKCNT_DIV 0x8
 250 #define CP15_PMCR_CLKCNT_RST 0x4
 251 #define CP15_PMCR_CNT_RST 0x2
 252 #define CP15_PMCR_ENABLE 0x1
 253
 254 //
 255 // C1 Register Values
 256 //
 257 #define C1_MMU_CONTROL       0x01
 258 #define C1_ALIGNMENT_CONTROL 0x02
 259 #define C1_DCACHE_CONTROL    0x04
 260 #define C1_ICACHE_CONTROL    0x1000
 261 #define C1_VECTOR_CONTROL    0x2000
 262
 263 //
 264 // IPI Types
 265 //
 266 #define IPI_APC                 1
 267 #define IPI_DPC                 2
 268 #define IPI_FREEZE              4
 269 #define IPI_PACKET_READY        6
 270 #define IPI_SYNCH_REQUEST       16
 271
 272 //
 273 // PRCB Flags
 274 //
 275 #define PRCB_MAJOR_VERSION      1
 276 #define PRCB_BUILD_DEBUG        1
 277 #define PRCB_BUILD_UNIPROCESSOR 2
 278
 279 //
 280 // No LDTs on ARM
 281 //
 282 #define LDT_ENTRY              ULONG
 283
 284 //
 285 // HAL Variables
 286 //
 287 #define INITIAL_STALL_COUNT     100
 288 #define MM_HAL_VA_START         0xFFC00000
 289 #define MM_HAL_VA_END           0xFFFFFFFF
 290
 291 //
 292 // Static Kernel-Mode Address start (use MM_KSEG0_BASE for actual)
 293 //
 294 #define KSEG0_BASE              0x80000000
 295
 296 //
 297 // Number of pool lookaside lists per pool in the PRCB
 298 //
 299 #define NUMBER_POOL_LOOKASIDE_LISTS 32
 300
 301 //
 302 // ARM VFP State
 303 // Based on Windows RT 8.1 symbols and ksarm.h
 304 //
 305 typedef struct _KARM_VFP_STATE
 306 {
 307     struct _KARM_VFP_STATE* Link; // 0x00
 308     ULONG Fpscr;                  // 0x04
 309     ULONG Reserved;               // 0x08
 310     ULONG Reserved2;              // 0x0c
 311     ULONGLONG VfpD[32];           // 0x10
 312 } KARM_VFP_STATE, *PKARM_VFP_STATE; // size = 0x110
 313
 314 //
 315 // Trap Frame Definition
 316 // Based on Windows RT 8.1 symbols and ksarm.h
 317 //
 318 typedef struct _KTRAP_FRAME
 319 {
 320     ULONG Arg3;
 321     ULONG FaultStatus;
 322     union
 323     {
 324         ULONG FaultAddress;
 325         ULONG TrapFrame;
 326     };
 327     ULONG Reserved;
 328     BOOLEAN ExceptionActive;
 329     BOOLEAN ContextFromKFramesUnwound;
 330     BOOLEAN DebugRegistersValid;
 331     union
 332     {
 333         CHAR PreviousMode;
 334         KIRQL PreviousIrql;
 335     };
 336     PKARM_VFP_STATE VfpState;
 337     ULONG Bvr[8];
 338     ULONG Bcr[8];
 339     ULONG Wvr[1];
 340     ULONG Wcr[1];
 341     ULONG R0;
 342     ULONG R1;
 343     ULONG R2;
 344     ULONG R3;
 345     ULONG R12;
 346     ULONG Sp;
 347     ULONG Lr;
 348     ULONG R11;
 349     ULONG Pc;
 350     ULONG Cpsr;
 351 } KTRAP_FRAME, *PKTRAP_FRAME;
 352
 353 #ifndef NTOS_MODE_USER
 354
 355 //
 356 // Exception Frame Definition
 357 // FIXME: this should go into ntddk.h
 358 //
 359 typedef struct _KEXCEPTION_FRAME
 360 {
 361     ULONG Param5;        // 0x00
 362     ULONG TrapFrame;     // 0x04
 363     ULONG OutputBuffer;  // 0x08
 364     ULONG OutputLength;  // 0x0c
 365     ULONG Pad;           // 0x04
 366     ULONG R4;            // 0x14
 367     ULONG R5;            // 0x18
 368     ULONG R6;            // 0x1c
 369     ULONG R7;            // 0x20
 370     ULONG R8;            // 0x24
 371     ULONG R9;            // 0x28
 372     ULONG R10;           // 0x2c
 373     ULONG R11;           // 0x30
 374     ULONG Return;        // 0x34
 375 } KEXCEPTION_FRAME, *PKEXCEPTION_FRAME; // size = 0x38
 376
 377 //
 378 // ARM Architecture State
 379 // Based on Windows RT 8.1 symbols and ksarm.h
 380 //
 381 typedef struct _KARM_ARCH_STATE
 382 {
 383     ULONG Cp15_Cr0_CpuId;
 384     ULONG Cp15_Cr1_Control;
 385     ULONG Cp15_Cr1_AuxControl;
 386     ULONG Cp15_Cr1_Cpacr;
 387     ULONG Cp15_Cr2_TtbControl;
 388     ULONG Cp15_Cr2_Ttb0;
 389     ULONG Cp15_Cr2_Ttb1;
 390     ULONG Cp15_Cr3_Dacr;
 391     ULONG Cp15_Cr5_Dfsr;
 392     ULONG Cp15_Cr5_Ifsr;
 393     ULONG Cp15_Cr6_Dfar;
 394     ULONG Cp15_Cr6_Ifar;
 395     ULONG Cp15_Cr9_PmControl;
 396     ULONG Cp15_Cr9_PmCountEnableSet;
 397     ULONG Cp15_Cr9_PmCycleCounter;
 398     ULONG Cp15_Cr9_PmEventCounter[31];
 399     ULONG Cp15_Cr9_PmEventType[31];
 400     ULONG Cp15_Cr9_PmInterruptSelect;
 401     ULONG Cp15_Cr9_PmOverflowStatus;
 402     ULONG Cp15_Cr9_PmSelect;
 403     ULONG Cp15_Cr9_PmUserEnable;
 404     ULONG Cp15_Cr10_PrimaryMemoryRemap;
 405     ULONG Cp15_Cr10_NormalMemoryRemap;
 406     ULONG Cp15_Cr12_VBARns;
 407     ULONG Cp15_Cr13_ContextId;
 408 } KARM_ARCH_STATE, *PKARM_ARCH_STATE;
 409
 410 ///
 411 /// "Custom" definition start
 412 ///
 413
 414 //
 415 // ARM Internal Registers
 416 //
 417 typedef union _ARM_TTB_REGISTER
 418 {
 419     struct
 420     {
 421         ULONG Reserved:14;
 422         ULONG BaseAddress:18;
 423     };
 424     ULONG AsUlong;
 425 } ARM_TTB_REGISTER;
 426
 427 typedef union _ARM_STATUS_REGISTER
 428 {
 429
 430     struct
 431     {
 432         ULONG Mode:5;
 433         ULONG State:1;
 434         ULONG FiqDisable:1;
 435         ULONG IrqDisable:1;
 436         ULONG ImpreciseAbort:1;
 437         ULONG Endianness:1;
 438         ULONG Sbz:6;
 439         ULONG GreaterEqual:4;
 440         ULONG Sbz1:4;
 441         ULONG Java:1;
 442         ULONG Sbz2:2;
 443         ULONG StickyOverflow:1;
 444         ULONG Overflow:1;
 445         ULONG CarryBorrowExtend:1;
 446         ULONG Zero:1;
 447         ULONG NegativeLessThan:1;
 448     };
 449     ULONG AsUlong;
 450 } ARM_STATUS_REGISTER;
 451
 452 typedef union _ARM_DOMAIN_REGISTER
 453 {
 454     struct
 455     {
 456         ULONG Domain0:2;
 457         ULONG Domain1:2;
 458         ULONG Domain2:2;
 459         ULONG Domain3:2;
 460         ULONG Domain4:2;
 461         ULONG Domain5:2;
 462         ULONG Domain6:2;
 463         ULONG Domain7:2;
 464         ULONG Domain8:2;
 465         ULONG Domain9:2;
 466         ULONG Domain10:2;
 467         ULONG Domain11:2;
 468         ULONG Domain12:2;
 469         ULONG Domain13:2;
 470         ULONG Domain14:2;
 471         ULONG Domain15:2;
 472     };
 473     ULONG AsUlong;
 474 } ARM_DOMAIN_REGISTER;
 475
 476 typedef union _ARM_CONTROL_REGISTER
 477 {
 478     struct
 479     {
 480         ULONG MmuEnabled:1;
 481         ULONG AlignmentFaultsEnabled:1;
 482         ULONG DCacheEnabled:1;
 483         ULONG Sbo:4;
 484         ULONG BigEndianEnabled:1;
 485         ULONG System:1;
 486         ULONG Rom:1;
 487         ULONG Sbz:2;
 488         ULONG ICacheEnabled:1;
 489         ULONG HighVectors:1;
 490         ULONG RoundRobinReplacementEnabled:1;
 491         ULONG Armv4Compat:1;
 492         ULONG Ignored:6;
 493         ULONG UnalignedAccess:1;
 494         ULONG ExtendedPageTables:1;
 495         ULONG Sbz1:1;
 496         ULONG ExceptionBit:1;
 497         ULONG Sbz2:1;
 498         ULONG Nmif:1;
 499         ULONG TexRemap:1;
 500         ULONG ForceAp:1;
 501         ULONG Reserved:2;
 502     };
 503     ULONG AsUlong;
 504 } ARM_CONTROL_REGISTER, *PARM_CONTROL_REGISTER;
 505
 506 C_ASSERT(sizeof(ARM_CONTROL_REGISTER) == sizeof(ULONG));
 507
 508 typedef union _ARM_ID_CODE_REGISTER
 509 {
 510     struct
 511     {
 512         ULONG Revision:4;
 513         ULONG PartNumber:12;
 514         ULONG Architecture:4;
 515         ULONG Variant:4;
 516         ULONG Identifier:8;
 517     };
 518     ULONG AsUlong;
 519 } ARM_ID_CODE_REGISTER, *PARM_ID_CODE_REGISTER;
 520
 521 typedef union _ARM_CACHE_REGISTER
 522 {
 523     struct
 524     {
 525         ULONG ILength:2;
 526         ULONG IMultipler:1;
 527         ULONG IAssociativty:3;
 528         ULONG ISize:4;
 529         ULONG IReserved:2;
 530         ULONG DLength:2;
 531         ULONG DMultipler:1;
 532         ULONG DAssociativty:3;
 533         ULONG DSize:4;
 534         ULONG DReserved:2;
 535         ULONG Separate:1;
 536         ULONG CType:4;
 537         ULONG Reserved:3;
 538     };
 539     ULONG AsUlong;
 540 } ARM_CACHE_REGISTER, *PARM_CACHE_REGISTER;
 541
 542 typedef union _ARM_LOCKDOWN_REGISTER
 543 {
 544     struct
 545     {
 546         ULONG Preserve:1;
 547         ULONG Ignored:25;
 548         ULONG Victim:3;
 549         ULONG Reserved:3;
 550     };
 551     ULONG AsUlong;
 552 } ARM_LOCKDOWN_REGISTER, *PARM_LOCKDOWN_REGISTER;
 553
 554 //
 555 // ARM Domains
 556 //
 557 typedef enum _ARM_DOMAINS
 558 {
 559     Domain0,
 560     Domain1,
 561     Domain2,
 562     Domain3,
 563     Domain4,
 564     Domain5,
 565     Domain6,
 566     Domain7,
 567     Domain8,
 568     Domain9,
 569     Domain10,
 570     Domain11,
 571     Domain12,
 572     Domain13,
 573     Domain14,
 574     Domain15
 575 } ARM_DOMAINS;
 576
 577 ///
 578 /// "Custom" definition end
 579 ///
 580
 581 //
 582 // Special Registers Structure (outside of CONTEXT)
 583 // Based on Windows RT 8.1 symbols and ksarm.h
 584 //
 585 typedef struct _KSPECIAL_REGISTERS
 586 {
 587     ULONG Reserved[7];     // 0x00
 588     ULONG Cp15_Cr13_UsrRW; // 0x1c
 589     ULONG Cp15_Cr13_UsrRO; // 0x20
 590     ULONG Cp15_Cr13_SvcRW; // 0x24
 591     ULONG KernelBvr[8];    // 0x28
 592     ULONG KernelBcr[8];    // 0x48
 593     ULONG KernelWvr[1];    // 0x68
 594     ULONG KernelWcr[1];    // 0x6c
 595     ULONG Fpexc;           // 0x70
 596     ULONG Fpinst;          // 0x74
 597     ULONG Fpinst2;         // 0x78
 598     ULONG UserSp;          // 0x7c
 599     ULONG UserLr;          // 0x80
 600     ULONG AbortSp;         // 0x84
 601     ULONG AbortLr;         // 0x88
 602     ULONG AbortSpsr;       // 0x8c
 603     ULONG UdfSp;           // 0x90
 604     ULONG UdfLr;           // 0x94
 605     ULONG UdfSpsr;         // 0x98
 606     ULONG IrqSp;           // 0x9c
 607     ULONG IrqLr;           // 0xa0
 608     ULONG IrqSpsr;         // 0xa4
 609 } KSPECIAL_REGISTERS, *PKSPECIAL_REGISTERS;
 610
 611 //
 612 // Processor State
 613 // Based on Windows RT 8.1 symbols and ksarm.h
 614 //
 615 typedef struct _KPROCESSOR_STATE
 616 {
 617     KSPECIAL_REGISTERS SpecialRegisters; // 0x000
 618     KARM_ARCH_STATE ArchState;           // 0x0a8
 619     CONTEXT ContextFrame;                // 0x200
 620 } KPROCESSOR_STATE, *PKPROCESSOR_STATE;
 621 C_ASSERT(sizeof(KPROCESSOR_STATE) == 0x3a0);
 622
 623 //
 624 // ARM Mini Stack
 625 // Based on Windows RT 8.1 symbols and ksarm.h
 626 //
 627 typedef struct _KARM_MINI_STACK
 628 {
 629     ULONG Pc;
 630     ULONG Cpsr;
 631     ULONG R4;
 632     ULONG R5;
 633     ULONG R6;
 634     ULONG R7;
 635     ULONG Reserved[2];
 636 } KARM_MINI_STACK, *PKARM_MINI_STACK; // size = 0x20
 637
 638 typedef struct _DISPATCHER_CONTEXT
 639 {
 640     ULONG ControlPc; // 0x0
 641     PVOID ImageBase; // 0x4
 642     PVOID FunctionEntry; // 0x8
 643     PVOID EstablisherFrame; // 0xc
 644     ULONG TargetPc; // 0x10
 645     PVOID ContextRecord; // 0x14
 646     PVOID LanguageHandler; // 0x18
 647     PVOID HandlerData; // 0x1c
 648     PVOID HistoryTable; // 0x20
 649     ULONG ScopeIndex; // 0x24
 650     ULONG ControlPcIsUnwound; // 0x28
 651     PVOID NonVolatileRegisters; // 0x2c
 652     ULONG Reserved; // 0x30
 653 } DISPATCHER_CONTEXT, *PDISPATCHER_CONTEXT;
 654
 655 //
 656 // Machine Frame
 657 // Based on ksarm.h
 658 //
 659 typedef struct _MACHINE_FRAME
 660 {
 661     ULONG Sp;
 662     ULONG Pc;
 663 } MACHINE_FRAME, *PMACHINE_FRAME;
 664
 665 //
 666 // Defines the Callback Stack Layout for User Mode Callbacks
 667 //
 668 typedef KEXCEPTION_FRAME KCALLOUT_FRAME, PKCALLOUT_FRAME;
 669
 670 //
 671 // User mode callout frame
 672 //
 673 typedef struct _UCALLOUT_FRAME
 674 {
 675     PVOID Buffer;
 676     ULONG Length;
 677     ULONG ApiNumber;
 678     ULONG OriginalLr;
 679     MACHINE_FRAME MachineFrame;
 680 } UCALLOUT_FRAME, *PUCALLOUT_FRAME;
 681
 682 typedef struct _KSTART_FRAME
 683 {
 684     ULONG R0;
 685     ULONG R1;
 686     ULONG R2;
 687     ULONG Return;
 688 } KSTART_FRAME, *PKSTART_FRAME;
 689
 690 typedef struct _KSWITCH_FRAME
 691 {
 692     KIRQL ApcBypass;
 693     UCHAR Fill[7];
 694     ULONG R11;
 695     ULONG Return;
 696 } KSWITCH_FRAME, *PKSWITCH_FRAME;
 697
 698 //
 699 // Cache types
 700 // (These are made up constants!)
 701 //
 702 enum _ARM_CACHE_TYPES
 703 {
 704     FirstLevelDcache = 0,
 705     SecondLevelDcache = 1,
 706     FirstLevelIcache = 2,
 707     SecondLevelIcache = 3,
 708     GlobalDcache = 4,
 709     GlobalIcache = 5
 710 };
 711
 712 #if (NTDDI_VERSION < NTDDI_LONGHORN)
 713 #define GENERAL_LOOKASIDE_POOL PP_LOOKASIDE_LIST
 714 #endif
 715
 716 //
 717 // Processor Region Control Block
 718 // Based on Windows RT 8.1 symbols
 719 //
 720 typedef struct _KPRCB
 721 {
 722     UCHAR LegacyNumber;
 723     UCHAR ReservedMustBeZero;
 724     UCHAR IdleHalt;
 725     PKTHREAD CurrentThread;
 726     PKTHREAD NextThread;
 727     PKTHREAD IdleThread;
 728     UCHAR NestingLevel;
 729     UCHAR ClockOwner;
 730     union
 731     {
 732         UCHAR PendingTickFlags;
 733         struct
 734         {
 735             UCHAR PendingTick : 1;
 736             UCHAR PendingBackupTick : 1;
 737         };
 738     };
 739     UCHAR PrcbPad00[1];
 740     ULONG Number;
 741     ULONG PrcbLock;
 742     PCHAR PriorityState;
 743     KPROCESSOR_STATE ProcessorState;
 744     USHORT ProcessorModel;
 745     USHORT ProcessorRevision;
 746     ULONG MHz;
 747     UINT64 CycleCounterFrequency;
 748     ULONG HalReserved[15];
 749     USHORT MinorVersion;
 750     USHORT MajorVersion;
 751     UCHAR BuildType;
 752     UCHAR CpuVendor;
 753     UCHAR CoresPerPhysicalProcessor;
 754     UCHAR LogicalProcessorsPerCore;
 755     PVOID AcpiReserved;
 756     ULONG GroupSetMember;
 757     UCHAR Group;
 758     UCHAR GroupIndex;
 759     //UCHAR _PADDING1_[0x62];
 760     KSPIN_LOCK_QUEUE DECLSPEC_ALIGN(128) LockQueue[17];
 761     UCHAR ProcessorVendorString[2];
 762     UCHAR _PADDING2_[0x2];
 763     ULONG FeatureBits;
 764     ULONG MaxBreakpoints;
 765     ULONG MaxWatchpoints;
 766     PCONTEXT Context;
 767     ULONG ContextFlagsInit;
 768     //UCHAR _PADDING3_[0x60];
 769     PP_LOOKASIDE_LIST DECLSPEC_ALIGN(128) PPLookasideList[16];
 770     LONG PacketBarrier;
 771     SINGLE_LIST_ENTRY DeferredReadyListHead;
 772     LONG MmPageFaultCount;
 773     LONG MmCopyOnWriteCount;
 774     LONG MmTransitionCount;
 775     LONG MmDemandZeroCount;
 776     LONG MmPageReadCount;
 777     LONG MmPageReadIoCount;
 778     LONG MmDirtyPagesWriteCount;
 779     LONG MmDirtyWriteIoCount;
 780     LONG MmMappedPagesWriteCount;
 781     LONG MmMappedWriteIoCount;
 782     ULONG KeSystemCalls;
 783     ULONG KeContextSwitches;
 784     ULONG CcFastReadNoWait;
 785     ULONG CcFastReadWait;
 786     ULONG CcFastReadNotPossible;
 787     ULONG CcCopyReadNoWait;
 788     ULONG CcCopyReadWait;
 789     ULONG CcCopyReadNoWaitMiss;
 790     LONG LookasideIrpFloat;
 791     LONG IoReadOperationCount;
 792     LONG IoWriteOperationCount;
 793     LONG IoOtherOperationCount;
 794     LARGE_INTEGER IoReadTransferCount;
 795     LARGE_INTEGER IoWriteTransferCount;
 796     LARGE_INTEGER IoOtherTransferCount;
 797     UCHAR _PADDING4_[0x8];
 798     struct _REQUEST_MAILBOX* Mailbox;
 799     LONG TargetCount;
 800     ULONG IpiFrozen;
 801     ULONG RequestSummary;
 802     KDPC_DATA DpcData[2];
 803     PVOID DpcStack;
 804     PVOID SpBase;
 805     LONG MaximumDpcQueueDepth;
 806     ULONG DpcRequestRate;
 807     ULONG MinimumDpcRate;
 808     ULONG DpcLastCount;
 809     UCHAR ThreadDpcEnable;
 810     UCHAR QuantumEnd;
 811     UCHAR DpcRoutineActive;
 812     UCHAR IdleSchedule;
 813 #if (NTDDI_VERSION >= NTDDI_WIN8)
 814     union
 815     {
 816         LONG DpcRequestSummary;
 817         SHORT DpcRequestSlot[2];
 818         struct
 819         {
 820             SHORT NormalDpcState;
 821             SHORT ThreadDpcState;
 822         };
 823         struct
 824         {
 825             ULONG DpcNormalProcessingActive : 1;
 826             ULONG DpcNormalProcessingRequested : 1;
 827             ULONG DpcNormalThreadSignal : 1;
 828             ULONG DpcNormalTimerExpiration : 1;
 829             ULONG DpcNormalDpcPresent : 1;
 830             ULONG DpcNormalLocalInterrupt : 1;
 831             ULONG DpcNormalSpare : 10;
 832             ULONG DpcThreadActive : 1;
 833             ULONG DpcThreadRequested : 1;
 834             ULONG DpcThreadSpare : 14;
 835         };
 836     };
 837 #else
 838     LONG DpcSetEventRequest;
 839 #endif
 840     ULONG LastTimerHand;
 841     ULONG LastTick;
 842     ULONG ClockInterrupts;
 843     ULONG ReadyScanTick;
 844     ULONG PrcbPad10[1];
 845     ULONG InterruptLastCount;
 846     ULONG InterruptRate;
 847     UCHAR _PADDING5_[0x4];
 848 #if (NTDDI_VERSION >= NTDDI_LONGHORN)
 849     KGATE DpcGate;
 850 #else
 851     KEVENT DpcEvent;
 852 #endif
 853     ULONG MPAffinity;
 854     KDPC CallDpc;
 855     LONG ClockKeepAlive;
 856     UCHAR ClockCheckSlot;
 857     UCHAR ClockPollCycle;
 858     //UCHAR _PADDING6_[0x2];
 859     LONG DpcWatchdogPeriod;
 860     LONG DpcWatchdogCount;
 861     LONG KeSpinLockOrdering;
 862     UCHAR _PADDING7_[0x38];
 863     LIST_ENTRY WaitListHead;
 864     ULONG WaitLock;
 865     ULONG ReadySummary;
 866     LONG AffinitizedSelectionMask;
 867     ULONG QueueIndex;
 868     KDPC TimerExpirationDpc;
 869     //RTL_RB_TREE ScbQueue;
 870     LIST_ENTRY ScbList;
 871     UCHAR _PADDING8_[0x38];
 872     LIST_ENTRY DispatcherReadyListHead[32];
 873     ULONG InterruptCount;
 874     ULONG KernelTime;
 875     ULONG UserTime;
 876     ULONG DpcTime;
 877     ULONG InterruptTime;
 878     ULONG AdjustDpcThreshold;
 879     UCHAR SkipTick;
 880     UCHAR DebuggerSavedIRQL;
 881     UCHAR PollSlot;
 882     UCHAR GroupSchedulingOverQuota;
 883     ULONG DpcTimeCount;
 884     ULONG DpcTimeLimit;
 885     ULONG PeriodicCount;
 886     ULONG PeriodicBias;
 887     ULONG AvailableTime;
 888     ULONG ScbOffset;
 889     ULONG KeExceptionDispatchCount;
 890     struct _KNODE* ParentNode;
 891     UCHAR _PADDING9_[0x4];
 892     ULONG64 AffinitizedCycles;
 893     ULONG64 StartCycles;
 894     ULONG64 GenerationTarget;
 895     ULONG64 CycleCounterHigh;
 896 #if (NTDDI_VERSION >= NTDDI_WIN8)
 897     KENTROPY_TIMING_STATE EntropyTimingState;
 898 #endif /* (NTDDI_VERSION >= NTDDI_WIN8) */
 899     LONG MmSpinLockOrdering;
 900     ULONG PageColor;
 901     ULONG NodeColor;
 902     ULONG NodeShiftedColor;
 903     ULONG SecondaryColorMask;
 904     ULONG64 CycleTime;
 905     UCHAR _PADDING10_[0x58];
 906     ULONG CcFastMdlReadNoWait;
 907     ULONG CcFastMdlReadWait;
 908     ULONG CcFastMdlReadNotPossible;
 909     ULONG CcMapDataNoWait;
 910     ULONG CcMapDataWait;
 911     ULONG CcPinMappedDataCount;
 912     ULONG CcPinReadNoWait;
 913     ULONG CcPinReadWait;
 914     ULONG CcMdlReadNoWait;
 915     ULONG CcMdlReadWait;
 916     ULONG CcLazyWriteHotSpots;
 917     ULONG CcLazyWriteIos;
 918     ULONG CcLazyWritePages;
 919     ULONG CcDataFlushes;
 920     ULONG CcDataPages;
 921     ULONG CcLostDelayedWrites;
 922     ULONG CcFastReadResourceMiss;
 923     ULONG CcCopyReadWaitMiss;
 924     ULONG CcFastMdlReadResourceMiss;
 925     ULONG CcMapDataNoWaitMiss;
 926     ULONG CcMapDataWaitMiss;
 927     ULONG CcPinReadNoWaitMiss;
 928     ULONG CcPinReadWaitMiss;
 929     ULONG CcMdlReadNoWaitMiss;
 930     ULONG CcMdlReadWaitMiss;
 931     ULONG CcReadAheadIos;
 932     LONG MmCacheTransitionCount;
 933     LONG MmCacheReadCount;
 934     LONG MmCacheIoCount;
 935     UCHAR _PADDING11_[0xC];
 936     PROCESSOR_POWER_STATE PowerState;
 937     ULONG SharedReadyQueueOffset;
 938     ULONG PrcbPad15[2];
 939     ULONG DeviceInterrupts;
 940     PVOID IsrDpcStats;
 941     ULONG KeAlignmentFixupCount;
 942     KDPC DpcWatchdogDpc;
 943     KTIMER DpcWatchdogTimer;
 944     SLIST_HEADER InterruptObjectPool;
 945     //KAFFINITY_EX PackageProcessorSet;
 946     UCHAR _PADDING12_[0x4];
 947     ULONG SharedReadyQueueMask;
 948     struct _KSHARED_READY_QUEUE* SharedReadyQueue;
 949     ULONG CoreProcessorSet;
 950     ULONG ScanSiblingMask;
 951     ULONG LLCMask;
 952     ULONG CacheProcessorMask[5];
 953     ULONG ScanSiblingIndex;
 954     CACHE_DESCRIPTOR Cache[6];
 955     UCHAR CacheCount;
 956     UCHAR PrcbPad20[3];
 957     ULONG CachedCommit;
 958     ULONG CachedResidentAvailable;
 959     PVOID HyperPte;
 960     PVOID WheaInfo;
 961     PVOID EtwSupport;
 962     UCHAR _PADDING13_[0x74];
 963     SYNCH_COUNTERS SynchCounters;
 964     //FILESYSTEM_DISK_COUNTERS FsCounters;
 965     UCHAR _PADDING14_[0x8];
 966     KARM_MINI_STACK FiqMiniStack;
 967     KARM_MINI_STACK IrqMiniStack;
 968     KARM_MINI_STACK UdfMiniStack;
 969     KARM_MINI_STACK AbtMiniStack;
 970     KARM_MINI_STACK PanicMiniStack;
 971     ULONG PanicStackBase;
 972     PVOID IsrStack;
 973     ULONG PteBitCache;
 974     ULONG PteBitOffset;
 975     KTIMER_TABLE TimerTable;
 976     GENERAL_LOOKASIDE_POOL PPNxPagedLookasideList[32];
 977     GENERAL_LOOKASIDE_POOL PPNPagedLookasideList[32];
 978     GENERAL_LOOKASIDE_POOL PPPagedLookasideList[32];
 979     SINGLE_LIST_ENTRY AbSelfIoBoostsList;
 980     SINGLE_LIST_ENTRY AbPropagateBoostsList;
 981     KDPC AbDpc;
 982     UCHAR _PADDING15_[0x58];
 983     //REQUEST_MAILBOX RequestMailbox[1];
 984
 985     // FIXME: Oldstyle stuff
 986 #if (NTDDI_VERSION < NTDDI_WIN8) // FIXME
 987     UCHAR CpuType;
 988     volatile UCHAR DpcInterruptRequested;
 989     volatile UCHAR DpcThreadRequested;
 990     volatile UCHAR DpcThreadActive;
 991     volatile ULONG TimerHand;
 992     volatile ULONG TimerRequest;
 993     ULONG DebugDpcTime;
 994     LONG Sleeping;
 995     KAFFINITY SetMember;
 996     CHAR VendorString[13];
 997 #endif
 998
 999 } KPRCB, *PKPRCB;
1000 C_ASSERT(FIELD_OFFSET(KPRCB, ProcessorState) == 0x20);
1001 C_ASSERT(FIELD_OFFSET(KPRCB, ProcessorModel) == 0x3C0);
1002 C_ASSERT(FIELD_OFFSET(KPRCB, LockQueue) == 0x480);
1003 C_ASSERT(FIELD_OFFSET(KPRCB, PacketBarrier) == 0x600);
1004 C_ASSERT(FIELD_OFFSET(KPRCB, Mailbox) == 0x680);
1005 C_ASSERT(FIELD_OFFSET(KPRCB, DpcData) == 0x690);
1006 C_ASSERT(FIELD_OFFSET(KPRCB, DpcStack) == 0x6c0);
1007 //C_ASSERT(FIELD_OFFSET(KPRCB, CallDpc) == 0x714);
1008
1009
1010 //
1011 // Processor Control Region
1012 // Based on Windows RT 8.1 symbols
1013 //
1014 typedef struct _KIPCR
1015 {
1016     union
1017     {
1018         NT_TIB NtTib;
1019         struct
1020         {
1021             ULONG TibPad0[2];
1022             PVOID Spare1;
1023             struct _KPCR *Self;
1024             struct _KPRCB *CurrentPrcb;
1025             struct _KSPIN_LOCK_QUEUE* LockArray;
1026             PVOID Used_Self;
1027         };
1028     };
1029     KIRQL CurrentIrql;
1030     UCHAR SecondLevelCacheAssociativity;
1031     ULONG Unused0[3];
1032     USHORT MajorVersion;
1033     USHORT MinorVersion;
1034     ULONG StallScaleFactor;
1035     PVOID Unused1[3];
1036     ULONG KernelReserved[15];
1037     ULONG SecondLevelCacheSize;
1038     union
1039     {
1040         USHORT SoftwareInterruptPending;
1041         struct
1042         {
1043             UCHAR ApcInterrupt;
1044             UCHAR DispatchInterrupt;
1045         };
1046     };
1047     USHORT InterruptPad;
1048     ULONG HalReserved[32];
1049     PVOID KdVersionBlock;
1050     PVOID Unused3;
1051     ULONG PcrAlign1[8];
1052
1053     /* Private members, not in ntddk.h */
1054     PVOID Idt[256];
1055     PVOID* IdtExt;
1056     ULONG PcrAlign2[19];
1057     UCHAR _PADDING1_[0x4];
1058     KPRCB Prcb;
1059 } KIPCR, *PKIPCR;
1060
1061 C_ASSERT(FIELD_OFFSET(KIPCR, Prcb.LegacyNumber) == 0x580);
1062
1063 //
1064 // Macro to get current KPRCB
1065 //
1066 FORCEINLINE
1067 struct _KPRCB *
1068 KeGetCurrentPrcb(VOID)
1069 {
1070     return KeGetPcr()->CurrentPrcb;
1071 }
1072
1073 //
1074 // Just read it from the PCR
1075 //
1076 #define KeGetCurrentIrql()             KeGetPcr()->CurrentIrql
1077 #define _KeGetCurrentThread()          KeGetCurrentPrcb()->CurrentThread
1078 #define _KeGetPreviousMode()           KeGetCurrentPrcb()->CurrentThread->PreviousMode
1079 #define _KeIsExecutingDpc()            (KeGetCurrentPrcb()->DpcRoutineActive != 0)
1080 #define KeGetCurrentThread()           _KeGetCurrentThread()
1081 #define KeGetPreviousMode()            _KeGetPreviousMode()
1082 //#define KeGetDcacheFillSize()          PCR->DcacheFillSize
1083
1084 #endif // !NTOS_MODE_USER
1085
1086 #ifdef __cplusplus
1087 }; // extern "C"
1088 #endif
1089
1090 #endif // !_ARM_KETYPES_H