[NTVDM]: Fix VgaGetDoubleVisionState definition (it was already correctly used in...
[reactos.git] / reactos / subsystems / mvdm / ntvdm / hardware / video / vga.h
1 /*
2 * COPYRIGHT: GPL - See COPYING in the top level directory
3 * PROJECT: ReactOS Virtual DOS Machine
4 * FILE: vga.h
5 * PURPOSE: VGA hardware emulation
6 * PROGRAMMERS: Aleksandar Andrejevic <theflash AT sdf DOT lonestar DOT org>
7 */
8
9 #ifndef _VGA_H_
10 #define _VGA_H_
11
12 /* INCLUDES *******************************************************************/
13
14 #include "ntvdm.h"
15
16 /* DEFINES ********************************************************************/
17
18 #define VGA_NUM_BANKS 4
19 #define VGA_BANK_SIZE 0x10000
20 #define VGA_MAX_COLORS 256
21 #define VGA_PALETTE_SIZE (VGA_MAX_COLORS * 3)
22 #define VGA_BITMAP_INFO_SIZE (sizeof(BITMAPINFOHEADER) + 2 * (VGA_PALETTE_SIZE / 3))
23 #define VGA_MINIMUM_WIDTH 400
24 #define VGA_MINIMUM_HEIGHT 300
25 #define VGA_DAC_TO_COLOR(x) (((x) << 2) | ((x) >> 4))
26 #define VGA_COLOR_TO_DAC(x) ((x) >> 2)
27 #define VGA_INTERLACE_HIGH_BIT (1 << 13)
28 #define VGA_FONT_BANK 2
29 #define VGA_FONT_CHARACTERS 256
30 #define VGA_MAX_FONT_HEIGHT 32
31 #define VGA_FONT_SIZE (VGA_FONT_CHARACTERS * VGA_MAX_FONT_HEIGHT)
32
33
34 /* Register I/O ports */
35
36 #define VGA_MISC_READ 0x3CC
37 #define VGA_MISC_WRITE 0x3C2
38
39 #define VGA_INSTAT0_READ 0x3C2
40
41 #define VGA_INSTAT1_READ_MONO 0x3BA
42 #define VGA_INSTAT1_READ_COLOR 0x3DA
43
44 #define VGA_FEATURE_READ 0x3CA
45 #define VGA_FEATURE_WRITE_MONO 0x3BA
46 #define VGA_FEATURE_WRITE_COLOR 0x3DA
47
48 #define VGA_AC_INDEX 0x3C0
49 #define VGA_AC_WRITE 0x3C0
50 #define VGA_AC_READ 0x3C1
51
52 #define VGA_SEQ_INDEX 0x3C4
53 #define VGA_SEQ_DATA 0x3C5
54
55 #define VGA_DAC_MASK 0x3C6
56 #define VGA_DAC_READ_INDEX 0x3C7
57 #define VGA_DAC_WRITE_INDEX 0x3C8
58 #define VGA_DAC_DATA 0x3C9
59
60 #define VGA_CRTC_INDEX_MONO 0x3B4
61 #define VGA_CRTC_DATA_MONO 0x3B5
62 #define VGA_CRTC_INDEX_COLOR 0x3D4
63 #define VGA_CRTC_DATA_COLOR 0x3D5
64
65 #define VGA_GC_INDEX 0x3CE
66 #define VGA_GC_DATA 0x3CF
67
68
69
70 //
71 // Miscellaneous and Status Registers
72 //
73
74 /* Miscellaneous register bits */
75 #define VGA_MISC_COLOR (1 << 0)
76 #define VGA_MISC_RAM_ENABLED (1 << 1)
77 // #define VGA_MISC_CSEL1 (1 << 2)
78 // #define VGA_MISC_CSEL2 (1 << 3)
79 #define VGA_MISC_OE_PAGESEL (1 << 5)
80 #define VGA_MISC_HSYNCP (1 << 6)
81 #define VGA_MISC_VSYNCP (1 << 7)
82
83 /* Status register flags */
84 #define VGA_STAT_DD (1 << 0)
85 #define VGA_STAT_VRETRACE (1 << 3)
86
87
88 //
89 // Sequencer Registers
90 //
91
92 /* Sequencer reset register bits */
93 #define VGA_SEQ_RESET_AR (1 << 0)
94 #define VGA_SEQ_RESET_SR (1 << 1)
95
96 /* Sequencer clock register bits */
97 #define VGA_SEQ_CLOCK_98DM (1 << 0)
98 #define VGA_SEQ_CLOCK_SLR (1 << 2)
99 #define VGA_SEQ_CLOCK_DCR (1 << 3)
100 #define VGA_SEQ_CLOCK_S4 (1 << 4)
101 #define VGA_SEQ_CLOCK_SD (1 << 5)
102
103 /* Sequencer memory register bits */
104 #define VGA_SEQ_MEM_EXT (1 << 1)
105 #define VGA_SEQ_MEM_OE_DIS (1 << 2)
106 #define VGA_SEQ_MEM_C4 (1 << 3)
107
108 enum
109 {
110 VGA_SEQ_RESET_REG,
111 VGA_SEQ_CLOCK_REG,
112 VGA_SEQ_MASK_REG,
113 VGA_SEQ_CHAR_REG,
114 VGA_SEQ_MEM_REG,
115 VGA_SEQ_MAX_REG
116 };
117
118
119 //
120 // CRT Controller Registers
121 //
122
123 /* CRTC overflow register bits */
124 #define VGA_CRTC_OVERFLOW_VT8 (1 << 0)
125 #define VGA_CRTC_OVERFLOW_VDE8 (1 << 1)
126 #define VGA_CRTC_OVERFLOW_VRS8 (1 << 2)
127 #define VGA_CRTC_OVERFLOW_SVB8 (1 << 3)
128 #define VGA_CRTC_OVERFLOW_LC8 (1 << 4)
129 #define VGA_CRTC_OVERFLOW_VT9 (1 << 5)
130 #define VGA_CRTC_OVERFLOW_VDE9 (1 << 6)
131 #define VGA_CRTC_OVERFLOW_VRS9 (1 << 7)
132
133 /* CRTC underline register bits */
134 #define VGA_CRTC_UNDERLINE_DWORD (1 << 6)
135
136 /* CRTC max scanline register bits */
137 #define VGA_CRTC_MAXSCANLINE_DOUBLE (1 << 7)
138
139 /* CRTC mode control register bits */
140 #define VGA_CRTC_MODE_CONTROL_WRAP (1 << 5)
141 #define VGA_CRTC_MODE_CONTROL_BYTE (1 << 6)
142 #define VGA_CRTC_MODE_CONTROL_SYNC (1 << 7)
143
144 enum
145 {
146 VGA_CRTC_HORZ_TOTAL_REG,
147 VGA_CRTC_END_HORZ_DISP_REG,
148 VGA_CRTC_START_HORZ_BLANKING_REG,
149 VGA_CRTC_END_HORZ_BLANKING_REG,
150 VGA_CRTC_START_HORZ_RETRACE_REG,
151 VGA_CRTC_END_HORZ_RETRACE_REG,
152 VGA_CRTC_VERT_TOTAL_REG,
153 VGA_CRTC_OVERFLOW_REG,
154 VGA_CRTC_PRESET_ROW_SCAN_REG,
155 VGA_CRTC_MAX_SCAN_LINE_REG,
156 VGA_CRTC_CURSOR_START_REG,
157 VGA_CRTC_CURSOR_END_REG,
158 VGA_CRTC_START_ADDR_HIGH_REG,
159 VGA_CRTC_START_ADDR_LOW_REG,
160 VGA_CRTC_CURSOR_LOC_HIGH_REG,
161 VGA_CRTC_CURSOR_LOC_LOW_REG,
162 VGA_CRTC_VERT_RETRACE_START_REG,
163 VGA_CRTC_VERT_RETRACE_END_REG,
164 VGA_CRTC_VERT_DISP_END_REG,
165 VGA_CRTC_OFFSET_REG,
166 VGA_CRTC_UNDERLINE_REG,
167 VGA_CRTC_START_VERT_BLANKING_REG,
168 VGA_CRTC_END_VERT_BLANKING,
169 VGA_CRTC_MODE_CONTROL_REG,
170 VGA_CRTC_LINE_COMPARE_REG,
171 VGA_CRTC_MAX_REG
172 };
173
174
175 //
176 // Graphics Controller Registers
177 //
178
179 /* Graphics controller mode register bits */
180 #define VGA_GC_MODE_READ (1 << 3)
181 #define VGA_GC_MODE_OE (1 << 4)
182 #define VGA_GC_MODE_SHIFTREG (1 << 5)
183 #define VGA_GC_MODE_SHIFT256 (1 << 6)
184
185 /* Graphics controller miscellaneous register bits */
186 #define VGA_GC_MISC_NOALPHA (1 << 0)
187 #define VGA_GC_MISC_OE (1 << 1)
188
189 enum
190 {
191 VGA_GC_RESET_REG,
192 VGA_GC_ENABLE_RESET_REG,
193 VGA_GC_COLOR_COMPARE_REG,
194 VGA_GC_ROTATE_REG,
195 VGA_GC_READ_MAP_SEL_REG,
196 VGA_GC_MODE_REG,
197 VGA_GC_MISC_REG,
198 VGA_GC_COLOR_IGNORE_REG,
199 VGA_GC_BITMASK_REG,
200 VGA_GC_MAX_REG
201 };
202
203
204 //
205 // Attribute Controller Registers
206 // They are a relinquish of the CGA/EGA era.
207 //
208
209 /* AC mode control register bits */
210 #define VGA_AC_CONTROL_ATGE (1 << 0)
211 #define VGA_AC_CONTROL_MONO (1 << 1)
212 #define VGA_AC_CONTROL_LGE (1 << 2)
213 #define VGA_AC_CONTROL_BLINK (1 << 3)
214 #define VGA_AC_CONTROL_PPM (1 << 5)
215 #define VGA_AC_CONTROL_8BIT (1 << 6)
216 #define VGA_AC_CONTROL_P54S (1 << 7)
217
218 enum
219 {
220 VGA_AC_PAL_0_REG,
221 VGA_AC_PAL_1_REG,
222 VGA_AC_PAL_2_REG,
223 VGA_AC_PAL_3_REG,
224 VGA_AC_PAL_4_REG,
225 VGA_AC_PAL_5_REG,
226 VGA_AC_PAL_6_REG,
227 VGA_AC_PAL_7_REG,
228 VGA_AC_PAL_8_REG,
229 VGA_AC_PAL_9_REG,
230 VGA_AC_PAL_A_REG,
231 VGA_AC_PAL_B_REG,
232 VGA_AC_PAL_C_REG,
233 VGA_AC_PAL_D_REG,
234 VGA_AC_PAL_E_REG,
235 VGA_AC_PAL_F_REG,
236 VGA_AC_CONTROL_REG,
237 VGA_AC_OVERSCAN_REG,
238 VGA_AC_COLOR_PLANE_REG,
239 VGA_AC_HORZ_PANNING_REG,
240 VGA_AC_COLOR_SEL_REG,
241 VGA_AC_MAX_REG
242 };
243
244
245 typedef struct _VGA_REGISTERS
246 {
247 UCHAR Misc;
248 UCHAR Sequencer[VGA_SEQ_MAX_REG];
249 UCHAR CRT[VGA_CRTC_MAX_REG];
250 UCHAR Graphics[VGA_GC_MAX_REG];
251 UCHAR Attribute[VGA_AC_MAX_REG];
252 } VGA_REGISTERS, *PVGA_REGISTERS;
253
254
255 /* FUNCTIONS ******************************************************************/
256
257 VOID ScreenEventHandler(PWINDOW_BUFFER_SIZE_RECORD ScreenEvent);
258 BOOL VgaAttachToConsole(VOID);
259 VOID VgaDetachFromConsole(BOOL ChangeMode);
260
261 COORD VgaGetDisplayResolution(VOID);
262 VOID VgaRefreshDisplay(VOID);
263 VOID VgaWriteFont(UINT FontNumber, CONST UCHAR *FontData, UINT Height);
264 VOID VgaClearMemory(VOID);
265 BOOLEAN VgaGetDoubleVisionState(PBOOLEAN Horizontal, PBOOLEAN Vertical);
266
267 BOOLEAN VgaInitialize(HANDLE TextHandle);
268 VOID VgaCleanup(VOID);
269
270 #endif // _VGA_H_
271
272 /* EOF */