eb6f385daf5a08ba57509bccabd4145a3e7bd47a
[reactos.git] / reactos / subsystems / ntvdm / bios / bios32 / bios32.c
1 /*
2 * COPYRIGHT: GPL - See COPYING in the top level directory
3 * PROJECT: ReactOS Virtual DOS Machine
4 * FILE: bios32.c
5 * PURPOSE: VDM 32-bit BIOS
6 * PROGRAMMERS: Aleksandar Andrejevic <theflash AT sdf DOT lonestar DOT org>
7 */
8
9 /* INCLUDES *******************************************************************/
10
11 #define NDEBUG
12
13 /* For BIOS Version number */
14 #include <reactos/buildno.h>
15
16 #include "emulator.h"
17 #include "cpu/cpu.h" // for EMULATOR_FLAG_CF
18 #include "cpu/bop.h"
19 #include "int32.h"
20
21 #include "../bios.h"
22 #include "../rom.h"
23 #include "bios32.h"
24 #include "bios32p.h"
25 #include "kbdbios32.h"
26 #include "vidbios32.h"
27 #include "moubios32.h"
28
29 #include "io.h"
30 #include "hardware/cmos.h"
31 #include "hardware/pic.h"
32 #include "hardware/timer.h"
33
34 /* PRIVATE VARIABLES **********************************************************/
35
36 CALLBACK16 BiosContext;
37
38 /*
39
40 Bochs BIOS, see rombios.h
41 =========================
42
43 // model byte 0xFC = AT
44 #define SYS_MODEL_ID 0xFC
45 #define SYS_SUBMODEL_ID 0x00
46 #define BIOS_REVISION 1
47 #define BIOS_CONFIG_TABLE 0xe6f5
48
49 #ifndef BIOS_BUILD_DATE
50 # define BIOS_BUILD_DATE "06/23/99"
51 #endif
52
53 // 1K of base memory used for Extended Bios Data Area (EBDA)
54 // EBDA is used for PS/2 mouse support, and IDE BIOS, etc.
55 #define EBDA_SEG 0x9FC0
56 #define EBDA_SIZE 1 // In KiB
57 #define BASE_MEM_IN_K (640 - EBDA_SIZE)
58
59
60 See rombios.c
61 =============
62
63 ROM BIOS compatibility entry points:
64 ===================================
65 $e05b ; POST Entry Point
66 $e2c3 ; NMI Handler Entry Point
67 $e3fe ; INT 13h Fixed Disk Services Entry Point
68 $e401 ; Fixed Disk Parameter Table
69 $e6f2 ; INT 19h Boot Load Service Entry Point
70 $e6f5 ; Configuration Data Table
71 $e729 ; Baud Rate Generator Table
72 $e739 ; INT 14h Serial Communications Service Entry Point
73 $e82e ; INT 16h Keyboard Service Entry Point
74 $e987 ; INT 09h Keyboard Service Entry Point
75 $ec59 ; INT 13h Diskette Service Entry Point
76 $ef57 ; INT 0Eh Diskette Hardware ISR Entry Point
77 $efc7 ; Diskette Controller Parameter Table
78 $efd2 ; INT 17h Printer Service Entry Point
79 $f045 ; INT 10 Functions 0-Fh Entry Point
80 $f065 ; INT 10h Video Support Service Entry Point
81 $f0a4 ; MDA/CGA Video Parameter Table (INT 1Dh)
82 $f841 ; INT 12h Memory Size Service Entry Point
83 $f84d ; INT 11h Equipment List Service Entry Point
84 $f859 ; INT 15h System Services Entry Point
85 $fa6e ; Character Font for 320x200 & 640x200 Graphics (lower 128 characters)
86 $fe6e ; INT 1Ah Time-of-day Service Entry Point
87 $fea5 ; INT 08h System Timer ISR Entry Point
88 $fef3 ; Initial Interrupt Vector Offsets Loaded by POST
89 $ff53 ; IRET Instruction for Dummy Interrupt Handler
90 $ff54 ; INT 05h Print Screen Service Entry Point
91 $fff0 ; Power-up Entry Point
92 $fff5 ; ASCII Date ROM was built - 8 characters in MM/DD/YY
93 $fffe ; System Model ID
94
95 */
96
97 /*
98 * See Ralf Brown: http://www.ctyme.com/intr/rb-1594.htm#Table515
99 * for more information.
100 */
101 #define BIOS_MODEL 0xFC // PC-AT
102 #define BIOS_SUBMODEL 0x01 // AT models 319,339 8 MHz, Enh Keyb, 3.5"
103 #define BIOS_REVISION 0x00
104 // FIXME: Find a nice PS/2 486 + 487 BIOS combination!
105
106 /*
107 * WARNING! For compatibility purposes the string "IBM" should be at F000:E00E .
108 * Some programs alternatively look at "COPR. IBM" that is at F000:E008 .
109 */
110 static const CHAR BiosCopyright[] = "0000000 NTVDM IBM Compatible 486 32-bit BIOS Copyright (C) ReactOS Team 1996-2014";
111 static const CHAR BiosVersion[] = "ReactOS NTVDM 32-bit BIOS "KERNEL_VERSION_STR" (Build "KERNEL_VERSION_BUILD_STR")";
112 static const CHAR BiosDate[] = "06/17/13";
113
114 C_ASSERT(sizeof(BiosCopyright)-1 <= 0x5B); // Ensures that we won't overflow on the POST Code starting at F000:E05B
115 C_ASSERT(sizeof(BiosDate)-1 == 0x08);
116
117 /* 16-bit bootstrap code at F000:FFF0 */
118 static BYTE Bootstrap[] =
119 {
120 0xEA, // jmp far ptr
121 0x5B, 0xE0, 0x00, 0xF0, // F000:E05B
122 };
123
124 /*
125 * Normally at F000:E05B there is the POST that finally calls the bootstrap
126 * interrupt. It should also check the value of Bda->SoftReset. Since we do
127 * all the POST in 32 bit from the start, we just place there the bootstrap
128 * interrupt call.
129 */
130 static BYTE PostCode[] =
131 {
132 LOBYTE(EMULATOR_BOP), HIBYTE(EMULATOR_BOP), BOP_RESET, // Call BIOS POST
133 0xCD, 0x19, // INT 0x19, the bootstrap loader interrupt
134 // LOBYTE(EMULATOR_BOP), HIBYTE(EMULATOR_BOP), BOP_UNSIMULATE
135 };
136
137
138 /* PRIVATE FUNCTIONS **********************************************************/
139
140 static VOID WINAPI BiosException(LPWORD Stack)
141 {
142 /* Get the exception number and call the emulator API */
143 BYTE ExceptionNumber = LOBYTE(Stack[STACK_INT_NUM]);
144 EmulatorException(ExceptionNumber, Stack);
145 }
146
147 static VOID WINAPI BiosMiscService(LPWORD Stack)
148 {
149 switch (getAH())
150 {
151 /* Keyboard intercept */
152 case 0x4F:
153 {
154 /* CF should be set but let's just set it again just in case */
155 /* Do not modify AL (the hardware scan code), but set CF to continue processing */
156 // setCF(1);
157 Stack[STACK_FLAGS] |= EMULATOR_FLAG_CF;
158 break;
159 }
160
161 /* Wait */
162 case 0x86:
163 {
164 /*
165 * Interval in microseconds in CX:DX
166 * See Ralf Brown: http://www.ctyme.com/intr/rb-1525.htm
167 * for more information.
168 */
169 Sleep(MAKELONG(getDX(), getCX()));
170
171 /* Clear CF */
172 Stack[STACK_FLAGS] &= ~EMULATOR_FLAG_CF;
173
174 break;
175 }
176
177 /* Copy Extended Memory */
178 case 0x87:
179 {
180 DWORD Count = (DWORD)getCX() * 2;
181 PFAST486_GDT_ENTRY Gdt = (PFAST486_GDT_ENTRY)SEG_OFF_TO_PTR(getES(), getSI());
182 DWORD SourceBase = Gdt[2].Base + (Gdt[2].BaseMid << 16) + (Gdt[2].BaseHigh << 24);
183 DWORD SourceLimit = Gdt[2].Limit + (Gdt[2].LimitHigh << 16);
184 DWORD DestBase = Gdt[3].Base + (Gdt[3].BaseMid << 16) + (Gdt[3].BaseHigh << 24);
185 DWORD DestLimit = Gdt[3].Limit + (Gdt[3].LimitHigh << 16);
186
187 /* Check for flags */
188 if (Gdt[2].Granularity) SourceLimit = (SourceLimit << 12) | 0xFFF;
189 if (Gdt[3].Granularity) DestLimit = (DestLimit << 12) | 0xFFF;
190
191 if ((Count > SourceLimit) || (Count > DestLimit))
192 {
193 setAX(0x80);
194 Stack[STACK_FLAGS] |= EMULATOR_FLAG_CF;
195
196 break;
197 }
198
199 /* Copy */
200 RtlMoveMemory((PVOID)((ULONG_PTR)BaseAddress + DestBase),
201 (PVOID)((ULONG_PTR)BaseAddress + SourceBase),
202 Count);
203
204 setAX(ERROR_SUCCESS);
205 Stack[STACK_FLAGS] &= ~EMULATOR_FLAG_CF;
206 break;
207 }
208
209 /* Get Extended Memory Size */
210 case 0x88:
211 {
212 UCHAR Low, High;
213
214 /*
215 * Return the (usable) extended memory (after 1 MB)
216 * size in kB from CMOS.
217 */
218 IOWriteB(CMOS_ADDRESS_PORT, CMOS_REG_ACTUAL_EXT_MEMORY_LOW);
219 Low = IOReadB(CMOS_DATA_PORT);
220 IOWriteB(CMOS_ADDRESS_PORT, CMOS_REG_ACTUAL_EXT_MEMORY_HIGH);
221 High = IOReadB(CMOS_DATA_PORT);
222 setAX(MAKEWORD(Low, High));
223
224 /* Clear CF */
225 Stack[STACK_FLAGS] &= ~EMULATOR_FLAG_CF;
226
227 break;
228 }
229
230 /* Get Configuration */
231 case 0xC0:
232 {
233 /* Return the BIOS ROM Configuration Table address in ES:BX */
234 // The BCT is found at F000:E6F5 for 100% compatible BIOSes.
235 setES(BIOS_SEGMENT);
236 setBX(0xE6F5);
237
238 /* Call successful; clear CF */
239 setAH(0x00);
240 Stack[STACK_FLAGS] &= ~EMULATOR_FLAG_CF;
241
242 break;
243 }
244
245 /* Return Extended-Bios Data-Area Segment Address (PS) */
246 case 0xC1:
247 {
248 // Stack[STACK_FLAGS] &= ~EMULATOR_FLAG_CF;
249 // setES(???);
250
251 /* We do not support EBDA yet */
252 Stack[STACK_FLAGS] |= EMULATOR_FLAG_CF;
253
254 break;
255 }
256
257 /* Pointing Device BIOS Interface (PS) */
258 case 0xC2:
259 {
260 DPRINT1("INT 15h, AH = C2h must be implemented in order to support vendor mouse drivers\n");
261 break;
262 }
263
264 default:
265 {
266 DPRINT1("BIOS Function INT 15h, AH = 0x%02X NOT IMPLEMENTED\n",
267 getAH());
268 }
269 }
270 }
271
272 static VOID WINAPI BiosRomBasic(LPWORD Stack)
273 {
274 /* ROM Basic is unsupported, display a message to the user */
275 DisplayMessage(L"NTVDM doesn't support ROM Basic. The VDM is closing.");
276
277 /* Stop the VDM */
278 EmulatorTerminate();
279 return;
280 }
281
282
283 VOID DosBootsectorInitialize(VOID);
284
285 static VOID WINAPI BiosBootstrapLoader(LPWORD Stack)
286 {
287 /*
288 * In real BIOSes one loads the bootsector read from a diskette
289 * or from a disk, copy it to 0000:7C00 and then boot it.
290 * Since we are 32-bit VM and we hardcode our DOS at the moment,
291 * just call the DOS 32-bit initialization code.
292 */
293
294 DPRINT1("BiosBootstrapLoader -->\n");
295
296 /* Load DOS */
297 DosBootsectorInitialize();
298 /* Position CPU to 0000:7C00 to boot the OS */
299 setCS(0x0000);
300 setIP(0x7C00);
301
302 DPRINT1("<-- BiosBootstrapLoader\n");
303 }
304
305 static VOID WINAPI BiosTimeService(LPWORD Stack)
306 {
307 switch (getAH())
308 {
309 case 0x00:
310 {
311 /* Set AL to 1 if midnight had passed, 0 otherwise */
312 setAL(Bda->MidnightPassed ? 0x01 : 0x00);
313
314 /* Return the tick count in CX:DX */
315 setCX(HIWORD(Bda->TickCounter));
316 setDX(LOWORD(Bda->TickCounter));
317
318 /* Reset the midnight flag */
319 Bda->MidnightPassed = FALSE;
320
321 break;
322 }
323
324 case 0x01:
325 {
326 /* Set the tick count to CX:DX */
327 Bda->TickCounter = MAKELONG(getDX(), getCX());
328
329 /* Reset the midnight flag */
330 Bda->MidnightPassed = FALSE;
331
332 break;
333 }
334
335 default:
336 {
337 DPRINT1("BIOS Function INT 1Ah, AH = 0x%02X NOT IMPLEMENTED\n",
338 getAH());
339 }
340 }
341 }
342
343 static VOID WINAPI BiosSystemTimerInterrupt(LPWORD Stack)
344 {
345 /* Increase the system tick count */
346 Bda->TickCounter++;
347 }
348
349
350 // From SeaBIOS
351 static VOID PicSetIRQMask(USHORT off, USHORT on)
352 {
353 UCHAR pic1off = off, pic1on = on, pic2off = off>>8, pic2on = on>>8;
354 IOWriteB(PIC_MASTER_DATA, (IOReadB(PIC_MASTER_DATA) & ~pic1off) | pic1on);
355 IOWriteB(PIC_SLAVE_DATA , (IOReadB(PIC_SLAVE_DATA ) & ~pic2off) | pic2on);
356 }
357
358 // From SeaBIOS
359 VOID EnableHwIRQ(UCHAR hwirq, EMULATOR_INT32_PROC func)
360 {
361 UCHAR vector;
362
363 PicSetIRQMask(1 << hwirq, 0);
364 if (hwirq < 8)
365 vector = BIOS_PIC_MASTER_INT + hwirq;
366 else
367 vector = BIOS_PIC_SLAVE_INT + hwirq - 8;
368
369 RegisterBiosInt32(vector, func);
370 }
371
372
373 VOID PicIRQComplete(LPWORD Stack)
374 {
375 /* Get the interrupt number */
376 BYTE IntNum = LOBYTE(Stack[STACK_INT_NUM]);
377
378 /*
379 * If this was a PIC IRQ, send an End-of-Interrupt to the PIC.
380 */
381
382 if (IntNum >= BIOS_PIC_MASTER_INT && IntNum < BIOS_PIC_MASTER_INT + 8)
383 {
384 /* It was an IRQ from the master PIC */
385 IOWriteB(PIC_MASTER_CMD, PIC_OCW2_EOI);
386 }
387 else if (IntNum >= BIOS_PIC_SLAVE_INT && IntNum < BIOS_PIC_SLAVE_INT + 8)
388 {
389 /* It was an IRQ from the slave PIC */
390 IOWriteB(PIC_SLAVE_CMD , PIC_OCW2_EOI);
391 IOWriteB(PIC_MASTER_CMD, PIC_OCW2_EOI);
392 }
393 }
394
395 static VOID WINAPI BiosHandleMasterPicIRQ(LPWORD Stack)
396 {
397 BYTE IrqNumber;
398
399 IOWriteB(PIC_MASTER_CMD, PIC_OCW3_READ_ISR /* == 0x0B */);
400 IrqNumber = IOReadB(PIC_MASTER_CMD);
401
402 DPRINT("Master - IrqNumber = 0x%02X\n", IrqNumber);
403
404 PicIRQComplete(Stack);
405 }
406
407 static VOID WINAPI BiosHandleSlavePicIRQ(LPWORD Stack)
408 {
409 BYTE IrqNumber;
410
411 IOWriteB(PIC_SLAVE_CMD, PIC_OCW3_READ_ISR /* == 0x0B */);
412 IrqNumber = IOReadB(PIC_SLAVE_CMD);
413
414 DPRINT("Slave - IrqNumber = 0x%02X\n", IrqNumber);
415
416 PicIRQComplete(Stack);
417 }
418
419 // Timer IRQ 0
420 static VOID WINAPI BiosTimerIrq(LPWORD Stack)
421 {
422 /*
423 * Perform the system timer interrupt.
424 *
425 * Do not call directly BiosSystemTimerInterrupt(Stack);
426 * because some programs may hook only BIOS_SYS_TIMER_INTERRUPT
427 * for their purpose...
428 */
429 /** EmulatorInterrupt(BIOS_SYS_TIMER_INTERRUPT); **/
430 Int32Call(&BiosContext, BIOS_SYS_TIMER_INTERRUPT);
431 PicIRQComplete(Stack);
432 }
433
434
435 static VOID BiosHwSetup(VOID)
436 {
437 /* Initialize the master and the slave PICs (cascade mode) */
438 IOWriteB(PIC_MASTER_CMD, PIC_ICW1 | PIC_ICW1_ICW4);
439 IOWriteB(PIC_SLAVE_CMD , PIC_ICW1 | PIC_ICW1_ICW4);
440
441 /*
442 * Set the interrupt vector offsets for each PIC
443 * (base IRQs: 0x08-0x0F for IRQ 0-7, 0x70-0x77 for IRQ 8-15)
444 */
445 IOWriteB(PIC_MASTER_DATA, BIOS_PIC_MASTER_INT);
446 IOWriteB(PIC_SLAVE_DATA , BIOS_PIC_SLAVE_INT );
447
448 /* Tell the master PIC that there is a slave PIC at IRQ 2 */
449 IOWriteB(PIC_MASTER_DATA, 1 << 2);
450 /* Tell the slave PIC its cascade identity */
451 IOWriteB(PIC_SLAVE_DATA , 2);
452
453 /* Make sure both PICs are in 8086 mode */
454 IOWriteB(PIC_MASTER_DATA, PIC_ICW4_8086);
455 IOWriteB(PIC_SLAVE_DATA , PIC_ICW4_8086);
456
457 /* Clear the masks for both PICs */
458 // IOWriteB(PIC_MASTER_DATA, 0x00);
459 // IOWriteB(PIC_SLAVE_DATA , 0x00);
460 /* Disable all IRQs */
461 IOWriteB(PIC_MASTER_DATA, 0xFF);
462 IOWriteB(PIC_SLAVE_DATA , 0xFF);
463
464
465 /* Initialize PIT Counter 0 */
466 IOWriteB(PIT_COMMAND_PORT, 0x34);
467 IOWriteB(PIT_DATA_PORT(0), 0x00);
468 IOWriteB(PIT_DATA_PORT(0), 0x00);
469
470 /* Initialize PIT Counter 1 */
471 IOWriteB(PIT_COMMAND_PORT, 0x74);
472 IOWriteB(PIT_DATA_PORT(1), 0x00);
473 IOWriteB(PIT_DATA_PORT(1), 0x00);
474
475 /* Initialize PIT Counter 2 */
476 IOWriteB(PIT_COMMAND_PORT, 0xB4);
477 IOWriteB(PIT_DATA_PORT(2), 0x00);
478 IOWriteB(PIT_DATA_PORT(2), 0x00);
479
480 EnableHwIRQ(0, BiosTimerIrq);
481 }
482
483 static VOID InitializeBiosInt32(VOID)
484 {
485 USHORT i;
486
487 /* Initialize the callback context */
488 InitializeContext(&BiosContext, BIOS_SEGMENT, 0x0000);
489
490 /* Register the default BIOS 32-bit Interrupts */
491 for (i = 0x00; i <= 0xFF; i++)
492 {
493 RegisterBiosInt32(i, NULL);
494 }
495
496 /* Initialize the exception vector interrupts to a default Exception handler */
497 for (i = 0; i < 8; i++)
498 RegisterBiosInt32(i, BiosException);
499
500 /* Initialize HW vector interrupts to a default HW handler */
501 for (i = BIOS_PIC_MASTER_INT; i < BIOS_PIC_MASTER_INT + 8; i++)
502 RegisterBiosInt32(i, BiosHandleMasterPicIRQ);
503 for (i = BIOS_PIC_SLAVE_INT ; i < BIOS_PIC_SLAVE_INT + 8; i++)
504 RegisterBiosInt32(i, BiosHandleSlavePicIRQ);
505
506 /* Initialize software vector handlers */
507 RegisterBiosInt32(BIOS_EQUIPMENT_INTERRUPT, BiosEquipmentService );
508 RegisterBiosInt32(BIOS_MEMORY_SIZE , BiosGetMemorySize );
509 RegisterBiosInt32(BIOS_MISC_INTERRUPT , BiosMiscService );
510 RegisterBiosInt32(BIOS_ROM_BASIC , BiosRomBasic );
511 RegisterBiosInt32(BIOS_BOOTSTRAP_LOADER , BiosBootstrapLoader );
512 RegisterBiosInt32(BIOS_TIME_INTERRUPT , BiosTimeService );
513 RegisterBiosInt32(BIOS_SYS_TIMER_INTERRUPT, BiosSystemTimerInterrupt);
514
515 /* Some interrupts are in fact addresses to tables */
516 ((PULONG)BaseAddress)[0x1E] = (ULONG)NULL;
517 ((PULONG)BaseAddress)[0x41] = (ULONG)NULL;
518 ((PULONG)BaseAddress)[0x46] = (ULONG)NULL;
519 ((PULONG)BaseAddress)[0x48] = (ULONG)NULL;
520 ((PULONG)BaseAddress)[0x49] = (ULONG)NULL;
521 }
522
523 static VOID InitializeBiosData(VOID)
524 {
525 UCHAR Low, High;
526
527 /* Initialize the BDA contents */
528 RtlZeroMemory(Bda, sizeof(*Bda));
529 Bda->EquipmentList = BIOS_EQUIPMENT_LIST;
530
531 /*
532 * Retrieve the conventional memory size
533 * in kB from CMOS, typically 640 kB.
534 */
535 IOWriteB(CMOS_ADDRESS_PORT, CMOS_REG_BASE_MEMORY_LOW);
536 Low = IOReadB(CMOS_DATA_PORT);
537 IOWriteB(CMOS_ADDRESS_PORT, CMOS_REG_BASE_MEMORY_HIGH);
538 High = IOReadB(CMOS_DATA_PORT);
539 Bda->MemorySize = MAKEWORD(Low, High);
540 }
541
542 static VOID InitializeBiosInfo(VOID)
543 {
544 RtlZeroMemory(Bct, sizeof(*Bct));
545
546 Bct->Length = sizeof(*Bct);
547 Bct->Model = BIOS_MODEL;
548 Bct->SubModel = BIOS_SUBMODEL;
549 Bct->Revision = BIOS_REVISION;
550 Bct->Feature[0] = 0x70; // At the moment we don't support "wait for external event (INT 15/AH=41h)", we also don't have any "extended BIOS area allocated (usually at top of RAM)"; see http://www.ctyme.com/intr/rb-1594.htm#Table510
551 Bct->Feature[1] = 0x00; // We don't support anything from here; see http://www.ctyme.com/intr/rb-1594.htm#Table511
552 Bct->Feature[2] = 0x00;
553 Bct->Feature[3] = 0x00;
554 Bct->Feature[4] = 0x00;
555 }
556
557
558
559 /*
560 * The BIOS POST (Power On-Self Test)
561 */
562 VOID
563 Bios32Post(VOID)
564 {
565 BOOLEAN Success;
566
567 DPRINT1("Bios32Post\n");
568
569 /* Initialize the stack */
570 // That's what says IBM... (stack at 30:00FF going downwards)
571 // setSS(0x0000);
572 // setSP(0x0400);
573 setSS(0x0050); // Stack at 50:0400, going downwards
574 setSP(0x0400);
575
576 /* Set data segment */
577 setDS(BDA_SEGMENT);
578
579 /* Initialize the BDA and the BIOS ROM Information */
580 InitializeBiosData();
581 InitializeBiosInfo();
582
583 /* Register the BIOS 32-bit Interrupts */
584 InitializeBiosInt32();
585
586 /* Initialize platform hardware (PIC/PIT chips, ...) */
587 BiosHwSetup();
588
589 /* Initialize the Keyboard, Video and Mouse BIOS */
590 if (!KbdBios32Initialize() || !VidBios32Initialize() || !MouseBios32Initialize())
591 {
592 // return FALSE;
593
594 /* Stop the VDM */
595 EmulatorTerminate();
596 return;
597 }
598
599 ///////////// MUST BE DONE AFTER IVT INITIALIZATION !! /////////////////////
600
601 /* Load some ROMs */
602 Success = LoadRom("boot.bin", (PVOID)0xE0000, NULL);
603 DPRINT1("Test ROM loading %s ; GetLastError() = %u\n", Success ? "succeeded" : "failed", GetLastError());
604
605 SearchAndInitRoms(&BiosContext);
606
607 /*
608 * End of the 32-bit POST portion. We then fall back into 16-bit where
609 * the rest of the POST code is executed, typically calling INT 19h
610 * to boot up the OS.
611 */
612 }
613
614 static VOID WINAPI Bios32ResetBop(LPWORD Stack)
615 {
616 DPRINT1("Bios32ResetBop\n");
617
618 /* Disable interrupts */
619 setIF(0);
620
621 // FIXME: Check the word at 0040h:0072h (Bda->SoftReset) and do one of the
622 // following actions:
623 // - if the word is 1234h, perform a warm reboot (aka. Ctrl-Alt-Del);
624 // - if the word is 0000h, perform a cold reboot (aka. Reset).
625
626 /* Initialize IVT and hardware */
627
628 /* Initialize the Keyboard and Video BIOS */
629 if (!KbdBiosInitialize() || !VidBiosInitialize())
630 {
631 /* Stop the VDM */
632 EmulatorTerminate();
633 return;
634 }
635
636 /* Do the POST */
637 Bios32Post();
638
639 /* Enable interrupts */
640 setIF(1);
641 }
642
643
644 /* PUBLIC FUNCTIONS ***********************************************************/
645
646 BOOLEAN Bios32Initialize(VOID)
647 {
648 /*
649 * Initialize BIOS32 static data
650 */
651
652 /* Bootstrap code */
653 RtlCopyMemory(SEG_OFF_TO_PTR(0xF000, 0xE05B), PostCode , sizeof(PostCode ));
654 RtlCopyMemory(SEG_OFF_TO_PTR(0xF000, 0xFFF0), Bootstrap, sizeof(Bootstrap));
655
656 /* System BIOS Copyright */
657 RtlCopyMemory(SEG_OFF_TO_PTR(0xF000, 0xE000), BiosCopyright, sizeof(BiosCopyright)-1);
658
659 /* System BIOS Version */
660 RtlCopyMemory(SEG_OFF_TO_PTR(0xF000, 0xE080), BiosVersion, sizeof(BiosVersion)-1);
661 // FIXME: or E061, or E100 ??
662
663 /* System BIOS Date */
664 RtlCopyMemory(SEG_OFF_TO_PTR(0xF000, 0xFFF5), BiosDate, sizeof(BiosDate)-1);
665
666 /* System BIOS Model (same as Bct->Model) */
667 *(PBYTE)(SEG_OFF_TO_PTR(0xF000, 0xFFFE)) = BIOS_MODEL;
668
669 /* Redefine our POST function */
670 RegisterBop(BOP_RESET, Bios32ResetBop);
671
672 /* We are done */
673 return TRUE;
674 }
675
676 VOID Bios32Cleanup(VOID)
677 {
678 MouseBios32Cleanup();
679 VidBios32Cleanup();
680 KbdBios32Cleanup();
681 }
682
683 /* EOF */