2 #include "../../misc.h"
5 /* example how setup a opcode, this opcode is 16bit long (taken from M68K)
6 * 0 and 1 mean normal bit, 2 mean mask bit the bit that are determent diffent
7 * thing in the opcode, example which reg so on, it can be etither 0 or 1 in
8 * the opcode. but a opcode have also normal bit that is always been set to
9 * same. thuse bit are always 0 or 1
12 /* FIXME RA should be 0 in stwu */
13 CPU_BYTE cpuPPCInit_Blr
[32] = {0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0, 0,1,0,0,1,1, 1,0};
15 CPU_BYTE cpuPPCInit_Li
[32] = {2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,0,0,0,0,0, 0,0,1,1,1,0, 2,2};
16 CPU_BYTE cpuPPCInit_stw
[32] = {2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2, 1,0,0,1,0,0, 2,2};
17 CPU_BYTE cpuPPCInit_stwu
[32] = {2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2, 1,0,0,1,0,1, 2,2};
18 CPU_BYTE cpuPPCInit_mr
[32] = {0,1,1,1,1,0,0,0,0,0,0,0,1,0,1,1,2,2,2,2,2,2,2,2, 0,1,1,1,1,1, 2,2};
19 CPU_BYTE cpuPPCInit_lwz
[32] = {2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2, 1,0,0,0,0,0, 2,2};
25 * no mask we implement function getting the reg right
29 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0
30 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0