sdk/include/asm/ksarm.template.h

   1
   2 RAW(""),
   3 RAW("#include <kxarm.h>"),
   4 RAW(""),
   5
   6 HEADER("CPSR Values"),
   7 CONSTANT(CPSRM_USER),
   8 CONSTANT(CPSRM_FIQ),
   9 CONSTANT(CPSRM_INT),
  10 CONSTANT(CPSRM_SVC),
  11 CONSTANT(CPSRM_ABT),
  12 CONSTANT(CPSRM_UDF),
  13 CONSTANT(CPSRM_SYS),
  14 CONSTANT(CPSRM_MASK),
  15 CONSTANT(SYSCALL_PSR),
  16
  17 CONSTANT(CPSRF_N), // 0x80000000
  18 CONSTANT(CPSRF_Z), // 0x40000000
  19 CONSTANT(CPSRF_C), // 0x20000000
  20 CONSTANT(CPSRF_V), // 0x10000000
  21 CONSTANT(CPSRF_Q), // 0x8000000
  22 CONSTANT(CPSR_IT_MASK), // 0x600fc00
  23
  24 CONSTANT(FPSCRF_N), // 0x80000000
  25 CONSTANT(FPSCRF_Z), // 0x40000000
  26 CONSTANT(FPSCRF_C), // 0x20000000
  27 CONSTANT(FPSCRF_V), // 0x10000000
  28 CONSTANT(FPSCRF_QC), // 0x8000000
  29
  30 CONSTANT(FPSCRM_AHP), // 0x4000000
  31 CONSTANT(FPSCRM_DN), // 0x2000000
  32 CONSTANT(FPSCRM_FZ), // 0x1000000
  33 CONSTANT(FPSCRM_RMODE_MASK), // 0xc00000
  34 CONSTANT(FPSCRM_RMODE_RN), // 0x0
  35 CONSTANT(FPSCRM_RMODE_RP), // 0x400000
  36 CONSTANT(FPSCRM_RMODE_RM), // 0x800000
  37 CONSTANT(FPSCRM_RMODE_RZ), // 0xc00000
  38 CONSTANT(FPSCRM_DEPRECATED), // 0x370000
  39
  40 CONSTANT(FPSCR_IDE), // 0x8000
  41 CONSTANT(FPSCR_IXE), // 0x1000
  42 CONSTANT(FPSCR_UFE), // 0x800
  43 CONSTANT(FPSCR_OFE), // 0x400
  44 CONSTANT(FPSCR_DZE), // 0x200
  45 CONSTANT(FPSCR_IOE), // 0x100
  46 CONSTANT(FPSCR_IDC), // 0x80
  47 CONSTANT(FPSCR_IXC), // 0x10
  48 CONSTANT(FPSCR_UFC), // 0x8
  49 CONSTANT(FPSCR_OFC), // 0x4
  50 CONSTANT(FPSCR_DZC), // 0x2
  51 CONSTANT(FPSCR_IOC), // 0x1
  52
  53 CONSTANT(CPSRC_INT), // 0x80
  54 CONSTANT(CPSRC_ABORT), // 0x100
  55 CONSTANT(CPSRC_THUMB), // 0x20
  56
  57 CONSTANT(SWFS_PAGE_FAULT), // 0x10
  58 CONSTANT(SWFS_ALIGN_FAULT), // 0x20
  59 CONSTANT(SWFS_HWERR_FAULT), // 0x40
  60 CONSTANT(SWFS_DEBUG_FAULT), // 0x80
  61 CONSTANT(SWFS_EXECUTE), // 0x8
  62 CONSTANT(SWFS_WRITE), // 0x1
  63
  64 CONSTANT(CP14_DBGDSCR_MOE_MASK), // 0x3c
  65 CONSTANT(CP14_DBGDSCR_MOE_SHIFT), // 0x2
  66 CONSTANT(CP14_DBGDSCR_MOE_HALT), // 0x0
  67 CONSTANT(CP14_DBGDSCR_MOE_BP), // 0x1
  68 CONSTANT(CP14_DBGDSCR_MOE_WPASYNC), // 0x2
  69 CONSTANT(CP14_DBGDSCR_MOE_BKPT), // 0x3
  70 CONSTANT(CP14_DBGDSCR_MOE_EXTERNAL), // 0x4
  71 CONSTANT(CP14_DBGDSCR_MOE_VECTOR), // 0x5
  72 CONSTANT(CP14_DBGDSCR_MOE_WPSYNC), // 0xa
  73
  74 CONSTANT(CP15_PMCR_DP), // 0x20
  75 CONSTANT(CP15_PMCR_X), // 0x10
  76 CONSTANT(CP15_PMCR_CLKCNT_DIV), // 0x8
  77 CONSTANT(CP15_PMCR_CLKCNT_RST), // 0x4
  78 CONSTANT(CP15_PMCR_CNT_RST), // 0x2
  79 CONSTANT(CP15_PMCR_ENABLE), // 0x1
  80
  81 HEADER("DebugService Control Types"),
  82 //CONSTANT(BREAKPOINT_HW_SYNCH_WATCH), // 0x6
  83 //CONSTANT(BREAKPOINT_HW_ASYNCH_WATCH), // 0x7
  84 //CONSTANT(BREAKPOINT_HW_BREAK), // 0x8
  85
  86 // Handle table entry definition (FIXME: since win10, portable?)
  87 #if (NTDDI_VERSION >= NTDDI_WIN10)
  88 HEADER("Handle table entry definition"),
  89 #define EXHANDLE_TABLE_ENTRY_LOCK 0x1
  90 #define EXHANDLE_REFERENCE_SHIFT 0x1b
  91 #define EXHANDLE_REF_ACQUIRE_LOCK 0xffffffff
  92 #define EXHANDLE_REPLENISH_REFS 0x8
  93 #define EXHANDLE_CACHED_REFS 0x1f
  94 #endif
  95
  96 HEADER("Other constants"),
  97 CONSTANT(PAGE_SHIFT),
  98 //CONSTANT(PTE_TOP),
  99 //CONSTANT(TRANSITION_ASID),
 100 CONSTANT(KI_EXCEPTION_INTERNAL), // 0x10000000
 101 //CONSTANT(KI_EXCEPTION_HARDWARE_ERROR), // 0x10000005
 102
 103 HEADER("CONTEXT Offsets"),
 104 OFFSET(CxContextFlags, CONTEXT, ContextFlags), // 0x0
 105 OFFSET(CxR0, CONTEXT, R0), // 0x4
 106 OFFSET(CxR1, CONTEXT, R1), // 0x8
 107 OFFSET(CxR2, CONTEXT, R2), // 0xc
 108 OFFSET(CxR3, CONTEXT, R3), // 0x10
 109 OFFSET(CxR4, CONTEXT, R4), // 0x14
 110 OFFSET(CxR5, CONTEXT, R5), // 0x18
 111 OFFSET(CxR6, CONTEXT, R6), // 0x1c
 112 OFFSET(CxR7, CONTEXT, R7), // 0x20
 113 OFFSET(CxR8, CONTEXT, R8), // 0x24
 114 OFFSET(CxR9, CONTEXT, R9), // 0x28
 115 OFFSET(CxR10, CONTEXT, R10), // 0x2c
 116 OFFSET(CxR11, CONTEXT, R11), // 0x30
 117 OFFSET(CxR12, CONTEXT, R12), // 0x34
 118 OFFSET(CxSp, CONTEXT, Sp), // 0x38
 119 OFFSET(CxLr, CONTEXT, Lr), // 0x3c
 120 OFFSET(CxPc, CONTEXT, Pc), // 0x40
 121 OFFSET(CxCpsr, CONTEXT, Cpsr), // 0x44
 122 OFFSET(CxFpscr, CONTEXT, Fpscr), // 0x48
 123 OFFSET(CxQ, CONTEXT, Q), // 0x50
 124 OFFSET(CxD, CONTEXT, D), // 0x50
 125 OFFSET(CxS, CONTEXT, S), // 0x50
 126 OFFSET(CxD8, CONTEXT, D[8]), // 0x90
 127 OFFSET(CxBvr, CONTEXT, Bvr), // 0x150
 128 OFFSET(CxBcr, CONTEXT, Bcr), // 0x170
 129 OFFSET(CxWvr, CONTEXT, Wvr), // 0x190
 130 OFFSET(CxWcr, CONTEXT, Wcr), // 0x194
 131 SIZE(CONTEXT_FRAME_LENGTH, CONTEXT), // 0x1a0
 132 //CONSTANT(CONTEXT_ALIGN, __alignof(CONTEXT)),
 133
 134 HEADER("_JUMP_BUFFER offsets"),
 135 OFFSET(JbFrame, _JUMP_BUFFER, Frame), // 0x0
 136 OFFSET(JbR4, _JUMP_BUFFER, R4), // 0x4
 137 OFFSET(JbR5, _JUMP_BUFFER, R5), // 0x8
 138 OFFSET(JbR6, _JUMP_BUFFER, R6), // 0xc
 139 OFFSET(JbR7, _JUMP_BUFFER, R7), // 0x10
 140 OFFSET(JbR8, _JUMP_BUFFER, R8), // 0x14
 141 OFFSET(JbR9, _JUMP_BUFFER, R9), // 0x18
 142 OFFSET(JbR10, _JUMP_BUFFER, R10), // 0x1c
 143 OFFSET(JbR11, _JUMP_BUFFER, R11), // 0x20
 144 OFFSET(JbSp, _JUMP_BUFFER, Sp), // 0x24
 145 OFFSET(JbPc, _JUMP_BUFFER, Pc), // 0x28
 146 OFFSET(JbFpscr, _JUMP_BUFFER, Fpscr), // 0x2c
 147 OFFSET(JbD, _JUMP_BUFFER, D), // 0x30
 148
 149 HEADER("DISPATCHER_CONTEXT offsets"),
 150 OFFSET(DcControlPc, DISPATCHER_CONTEXT, ControlPc), // 0x0
 151 OFFSET(DcImageBase, DISPATCHER_CONTEXT, ImageBase), // 0x4
 152 OFFSET(DcFunctionEntry, DISPATCHER_CONTEXT, FunctionEntry), // 0x8
 153 OFFSET(DcEstablisherFrame, DISPATCHER_CONTEXT, EstablisherFrame), // 0xc
 154 OFFSET(DcTargetPc, DISPATCHER_CONTEXT, TargetPc), // 0x10
 155 OFFSET(DcContextRecord, DISPATCHER_CONTEXT, ContextRecord), // 0x14
 156 OFFSET(DcLanguageHandler, DISPATCHER_CONTEXT, LanguageHandler), // 0x18
 157 OFFSET(DcHandlerData, DISPATCHER_CONTEXT, HandlerData), // 0x1c
 158 OFFSET(DcHistoryTable, DISPATCHER_CONTEXT, HistoryTable), // 0x20
 159 OFFSET(DcScopeIndex, DISPATCHER_CONTEXT, ScopeIndex), // 0x24
 160 OFFSET(DcControlPcIsUnwound, DISPATCHER_CONTEXT, ControlPcIsUnwound), // 0x28
 161 OFFSET(DcNonVolatileRegisters, DISPATCHER_CONTEXT, NonVolatileRegisters), // 0x2c
 162 OFFSET(DcReserved, DISPATCHER_CONTEXT, Reserved), // 0x30
 163
 164 HEADER("Trap Frame offsets"),
 165 OFFSET(TrArg3, KTRAP_FRAME, Arg3), // 0x0
 166 OFFSET(TrFaultStatus, KTRAP_FRAME, FaultStatus), // 0x4
 167 OFFSET(TrFaultAddress, KTRAP_FRAME, FaultAddress), // 0x8
 168 OFFSET(TrTrapFrame, KTRAP_FRAME, TrapFrame), // 0x8
 169 OFFSET(TrReserved, KTRAP_FRAME, Reserved), // 0xc
 170 OFFSET(TrExceptionActive, KTRAP_FRAME, ExceptionActive), // 0x10
 171 OFFSET(TrPreviousMode, KTRAP_FRAME, PreviousMode), // 0x13
 172 OFFSET(TrDebugRegistersValid, KTRAP_FRAME, DebugRegistersValid), // 0x12
 173 OFFSET(TrBvr, KTRAP_FRAME, Bvr), // 0x18
 174 OFFSET(TrBcr, KTRAP_FRAME, Bcr), // 0x38
 175 OFFSET(TrWvr, KTRAP_FRAME, Wvr), // 0x58
 176 OFFSET(TrWcr, KTRAP_FRAME, Wcr), // 0x5c
 177 OFFSET(TrVfpState, KTRAP_FRAME, VfpState), // 0x14
 178 OFFSET(TrR0, KTRAP_FRAME, R0), // 0x60
 179 OFFSET(TrR1, KTRAP_FRAME, R1), // 0x64
 180 OFFSET(TrR2, KTRAP_FRAME, R2), // 0x68
 181 OFFSET(TrR3, KTRAP_FRAME, R3), // 0x6c
 182 OFFSET(TrR12, KTRAP_FRAME, R12), // 0x70
 183 OFFSET(TrSp, KTRAP_FRAME, Sp), // 0x74
 184 OFFSET(TrLr, KTRAP_FRAME, Lr), // 0x78
 185 OFFSET(TrR11, KTRAP_FRAME, R11), // 0x7c
 186 OFFSET(TrPc, KTRAP_FRAME, Pc), // 0x80
 187 OFFSET(TrCpsr, KTRAP_FRAME, Cpsr), // 0x84
 188 SIZE(KTRAP_FRAME_LENGTH, KTRAP_FRAME), // 0x88
 189
 190 HEADER("KEXCEPTION_FRAME offsets"),
 191 OFFSET(ExParam5, KEXCEPTION_FRAME, Param5), // 0x0
 192 OFFSET(ExTrapFrame, KEXCEPTION_FRAME, TrapFrame), // 0x4
 193 OFFSET(ExR4, KEXCEPTION_FRAME, R4), // 0x14
 194 OFFSET(ExR5, KEXCEPTION_FRAME, R5), // 0x18
 195 OFFSET(ExR6, KEXCEPTION_FRAME, R6), // 0x1c
 196 OFFSET(ExR7, KEXCEPTION_FRAME, R7), // 0x20
 197 OFFSET(ExR8, KEXCEPTION_FRAME, R8), // 0x24
 198 OFFSET(ExR9, KEXCEPTION_FRAME, R9), // 0x28
 199 OFFSET(ExR10, KEXCEPTION_FRAME, R10), // 0x2c
 200 OFFSET(ExR11, KEXCEPTION_FRAME, R11), // 0x30
 201 OFFSET(ExReturn, KEXCEPTION_FRAME, Return), // 0x34
 202 SIZE(KEXCEPTION_FRAME_LENGTH, KEXCEPTION_FRAME), // 0x38
 203
 204 HEADER("KSPECIAL_REGISTERS offsets"),
 205 OFFSET(KsCp15_Cr13_UsrRW, KSPECIAL_REGISTERS, Cp15_Cr13_UsrRW), // 0x1c
 206 OFFSET(KsCp15_Cr13_UsrRO, KSPECIAL_REGISTERS, Cp15_Cr13_UsrRO), // 0x20
 207 OFFSET(KsCp15_Cr13_SvcRW, KSPECIAL_REGISTERS, Cp15_Cr13_SvcRW), // 0x24
 208 OFFSET(KsKernelBvr, KSPECIAL_REGISTERS, KernelBvr), // 0x28
 209 OFFSET(KsKernelBcr, KSPECIAL_REGISTERS, KernelBcr), // 0x48
 210 OFFSET(KsKernelWcr, KSPECIAL_REGISTERS, KernelWcr), // 0x6c
 211 OFFSET(KsFpexc, KSPECIAL_REGISTERS, Fpexc), // 0x70
 212 OFFSET(KsFpinst, KSPECIAL_REGISTERS, Fpinst), // 0x74
 213 OFFSET(KsFpinst2, KSPECIAL_REGISTERS, Fpinst2), // 0x78
 214 OFFSET(KsUserSp, KSPECIAL_REGISTERS, UserSp), // 0x7c
 215 OFFSET(KsUserLr, KSPECIAL_REGISTERS, UserLr), // 0x80
 216 OFFSET(KsAbortSp, KSPECIAL_REGISTERS, AbortSp), // 0x84
 217 OFFSET(KsAbortLr, KSPECIAL_REGISTERS, AbortLr), // 0x88
 218 OFFSET(KsAbortSpsr, KSPECIAL_REGISTERS, AbortSpsr), // 0x8c
 219 OFFSET(KsUdfSp, KSPECIAL_REGISTERS, UdfSp), // 0x90
 220 OFFSET(KsUdfLr, KSPECIAL_REGISTERS, UdfLr), // 0x94
 221 OFFSET(KsUdfSpsr, KSPECIAL_REGISTERS, UdfSpsr), // 0x98
 222 OFFSET(KsIrqSp, KSPECIAL_REGISTERS, IrqSp), // 0x9c
 223 OFFSET(KsIrqLr, KSPECIAL_REGISTERS, IrqLr), // 0xa0
 224 OFFSET(KsIrqSpsr, KSPECIAL_REGISTERS, IrqSpsr), // 0xa4
 225
 226 HEADER("KPROCESSOR_STATE offsets"),
 227 OFFSET(PsSpecialRegisters, KPROCESSOR_STATE, SpecialRegisters), // 0x0
 228 OFFSET(PsUsrRW, KPROCESSOR_STATE, SpecialRegisters.Cp15_Cr13_UsrRW), // 0x1c
 229 OFFSET(PsUsrRO, KPROCESSOR_STATE, SpecialRegisters.Cp15_Cr13_UsrRO), // 0x20
 230 OFFSET(PsSvcRW, KPROCESSOR_STATE, SpecialRegisters.Cp15_Cr13_SvcRW), // 0x24
 231 OFFSET(PsArchState, KPROCESSOR_STATE, ArchState), // 0xa8
 232 OFFSET(PsCpuid, KPROCESSOR_STATE, ArchState.Cp15_Cr0_CpuId), // 0xa8
 233 OFFSET(PsControl, KPROCESSOR_STATE, ArchState.Cp15_Cr1_Control), // 0xac
 234 OFFSET(PsAuxControl, KPROCESSOR_STATE, ArchState.Cp15_Cr1_AuxControl), // 0xb0
 235 OFFSET(PsCpacr, KPROCESSOR_STATE, ArchState.Cp15_Cr1_Cpacr), // 0xb4
 236 OFFSET(PsTtbControl, KPROCESSOR_STATE, ArchState.Cp15_Cr2_TtbControl), // 0xb8
 237 OFFSET(PsTtb0, KPROCESSOR_STATE, ArchState.Cp15_Cr2_Ttb0), // 0xbc
 238 OFFSET(PsTtb1, KPROCESSOR_STATE, ArchState.Cp15_Cr2_Ttb1), // 0xc0
 239 OFFSET(PsDacr, KPROCESSOR_STATE, ArchState.Cp15_Cr3_Dacr), // 0xc4
 240 OFFSET(PsPrimaryMemoryRemap, KPROCESSOR_STATE, ArchState.Cp15_Cr10_PrimaryMemoryRemap), // 0x1ec
 241 OFFSET(PsNormalMemoryRemap, KPROCESSOR_STATE, ArchState.Cp15_Cr10_NormalMemoryRemap), // 0x1f0
 242 OFFSET(PsVBARns, KPROCESSOR_STATE, ArchState.Cp15_Cr12_VBARns), // 0x1f4
 243 OFFSET(PsAsid, KPROCESSOR_STATE, ArchState.Cp15_Cr13_ContextId), // 0x1f8
 244 OFFSET(PsContextId, KPROCESSOR_STATE, ArchState.Cp15_Cr13_ContextId), // 0x1f8
 245 OFFSET(PsContextFrame, KPROCESSOR_STATE, ContextFrame), // 0x200
 246 SIZE(ProcessorStateLength, KPROCESSOR_STATE), // 0x3a0
 247
 248 HEADER("KARM_ARCH_STATE offsets"),
 249 OFFSET(AaCp15_Cr0_CpuId, KARM_ARCH_STATE, Cp15_Cr0_CpuId), // 0x0
 250 OFFSET(AaCp15_Cr1_Control, KARM_ARCH_STATE, Cp15_Cr1_Control), // 0x4
 251 OFFSET(AaCp15_Cr1_AuxControl, KARM_ARCH_STATE, Cp15_Cr1_AuxControl), // 0x8
 252 OFFSET(AaCp15_Cr1_Cpacr, KARM_ARCH_STATE, Cp15_Cr1_Cpacr), // 0xc
 253 OFFSET(AaCp15_Cr2_TtbControl, KARM_ARCH_STATE, Cp15_Cr2_TtbControl), // 0x10
 254 OFFSET(AaCp15_Cr2_Ttb0, KARM_ARCH_STATE, Cp15_Cr2_Ttb0), // 0x14
 255 OFFSET(AaCp15_Cr2_Ttb1, KARM_ARCH_STATE, Cp15_Cr2_Ttb1), // 0x18
 256 OFFSET(AaCp15_Cr3_Dacr, KARM_ARCH_STATE, Cp15_Cr3_Dacr), // 0x1c
 257 OFFSET(AaCp15_Cr5_Dfsr, KARM_ARCH_STATE, Cp15_Cr5_Dfsr), // 0x20
 258 OFFSET(AaCp15_Cr5_Ifsr, KARM_ARCH_STATE, Cp15_Cr5_Ifsr), // 0x24
 259 OFFSET(AaCp15_Cr6_Dfar, KARM_ARCH_STATE, Cp15_Cr6_Dfar), // 0x28
 260 OFFSET(AaCp15_Cr6_Ifar, KARM_ARCH_STATE, Cp15_Cr6_Ifar), // 0x2c
 261 OFFSET(AaCp15_Cr9_PmControl, KARM_ARCH_STATE, Cp15_Cr9_PmControl), // 0x30
 262 OFFSET(AaCp15_Cr9_PmCountEnableSet, KARM_ARCH_STATE, Cp15_Cr9_PmCountEnableSet), // 0x34
 263 OFFSET(AaCp15_Cr9_PmCycleCounter, KARM_ARCH_STATE, Cp15_Cr9_PmCycleCounter), // 0x38
 264 OFFSET(AaCp15_Cr9_PmEventCounter, KARM_ARCH_STATE, Cp15_Cr9_PmEventCounter), // 0x3c
 265 OFFSET(AaCp15_Cr9_PmEventType, KARM_ARCH_STATE, Cp15_Cr9_PmEventType), // 0xb8
 266 OFFSET(AaCp15_Cr9_PmInterruptSelect, KARM_ARCH_STATE, Cp15_Cr9_PmInterruptSelect), // 0x134
 267 OFFSET(AaCp15_Cr9_PmOverflowStatus, KARM_ARCH_STATE, Cp15_Cr9_PmOverflowStatus), // 0x138
 268 OFFSET(AaCp15_Cr9_PmSelect, KARM_ARCH_STATE, Cp15_Cr9_PmSelect), // 0x13c
 269 OFFSET(AaCp15_Cr9_PmUserEnable, KARM_ARCH_STATE, Cp15_Cr9_PmUserEnable), // 0x140
 270 OFFSET(AaCp15_Cr10_PrimaryMemoryRemap, KARM_ARCH_STATE, Cp15_Cr10_PrimaryMemoryRemap), // 0x144
 271 OFFSET(AaCp15_Cr10_NormalMemoryRemap, KARM_ARCH_STATE, Cp15_Cr10_NormalMemoryRemap), // 0x148
 272 OFFSET(AaCp15_Cr12_VBARns, KARM_ARCH_STATE, Cp15_Cr12_VBARns), // 0x14c
 273 OFFSET(AaCp15_Cr13_ContextId, KARM_ARCH_STATE, Cp15_Cr13_ContextId), // 0x150
 274
 275 HEADER("KSTART_FRAME offsets"),
 276 OFFSET(SfR0, KSTART_FRAME, R0), // 0x0
 277 OFFSET(SfR1, KSTART_FRAME, R1), // 0x4
 278 OFFSET(SfR2, KSTART_FRAME, R2), // 0x8
 279 OFFSET(SfReturn, KSTART_FRAME, Return), // 0xc
 280 SIZE(KSTART_FRAME_LENGTH, KSTART_FRAME), // 0x10
 281
 282 HEADER("KSWITCH_FRAME offsets"),
 283 OFFSET(SwApcBypass, KSWITCH_FRAME, ApcBypass), // 0x0
 284 OFFSET(SwR11, KSWITCH_FRAME, R11), // 0x8
 285 OFFSET(SwReturn, KSWITCH_FRAME, Return), // 0xc
 286 SIZE(KSWITCH_FRAME_LENGTH, KSWITCH_FRAME), // 0x10
 287
 288 HEADER("MACHINE_FRAME offsets"),
 289 OFFSET(MfSp, MACHINE_FRAME, Sp), // 0x0
 290 OFFSET(MfPc, MACHINE_FRAME, Pc), // 0x4
 291 SIZE(MachineFrameLength, MACHINE_FRAME), // 0x8
 292
 293 HEADER("KARM_VFP_STATE offsets"),
 294 OFFSET(VsLink, KARM_VFP_STATE, Link), // 0x0
 295 OFFSET(VsFpscr, KARM_VFP_STATE, Fpscr), // 0x4
 296 OFFSET(VsVfpD, KARM_VFP_STATE, VfpD), // 0x10
 297 OFFSET(VsVfpD8, KARM_VFP_STATE, VfpD[8]), // 0x50
 298 SIZE(VFP_STATE_LENGTH, KARM_VFP_STATE), // 0x110
 299
 300 HEADER("KARM_MINI_STACK offsets"),
 301 OFFSET(MsPc, KARM_MINI_STACK, Pc), // 0x0
 302 OFFSET(MsCpsr, KARM_MINI_STACK, Cpsr), // 0x4
 303 OFFSET(MsR4, KARM_MINI_STACK, R4), // 0x8
 304 OFFSET(MsR5, KARM_MINI_STACK, R5), // 0xc
 305 OFFSET(MsR6, KARM_MINI_STACK, R6), // 0x10
 306 OFFSET(MsR7, KARM_MINI_STACK, R7), // 0x14
 307 OFFSET(MsReserved, KARM_MINI_STACK, Reserved), // 0x18
 308 SIZE(MiniStackLength, KARM_MINI_STACK), // 0x20
 309
 310 HEADER("KPCR offsets"),
 311 OFFSET(PcSelf, KIPCR, Self), //  0xc
 312 OFFSET(PcCurrentPrcb, KIPCR, CurrentPrcb), // 0x10
 313 OFFSET(PcLockArray, KIPCR, LockArray), // 0x14
 314 OFFSET(PcTeb, KIPCR, Used_Self), // 0x18
 315 OFFSET(PcStallScaleFactor, KIPCR, StallScaleFactor), // 0x30
 316 OFFSET(PcHalReserved, KIPCR, HalReserved), // 0x84
 317 OFFSET(PcPrcb, KIPCR, Prcb), // 0x580
 318 OFFSET(PcIdleHalt, KIPCR, Prcb.IdleHalt), // 0x582
 319 OFFSET(PcCurrentThread, KIPCR, Prcb.CurrentThread), // 0x584
 320 OFFSET(PcNextThread, KIPCR, Prcb.NextThread), // 0x588
 321 OFFSET(PcIdleThread, KIPCR, Prcb.IdleThread), // 0x58c
 322 OFFSET(PcNestingLevel, KIPCR, Prcb.NestingLevel), // 0x590
 323 OFFSET(PcNumber, KIPCR, Prcb.Number), // 0x594
 324 OFFSET(PcPrcbLock, KIPCR, Prcb.PrcbLock), // 0x598
 325 OFFSET(PcGroupSetMember, KIPCR, Prcb.GroupSetMember), // 0x998
 326 OFFSET(PcFeatureBits, KIPCR, Prcb.FeatureBits), // 0xa8c
 327 OFFSET(PcDeferredReadyListHead, KIPCR, Prcb.DeferredReadyListHead), // 0xb84
 328 OFFSET(PcSystemCalls, KIPCR, Prcb.KeSystemCalls), // 0xbb0
 329 OFFSET(PcSpBase, KIPCR, Prcb.SpBase), // 0xc44
 330 OFFSET(PcDpcRoutineActive, KIPCR, Prcb.DpcRoutineActive), // 0xc5a
 331 OFFSET(PcInterruptCount, KIPCR, Prcb.InterruptCount), // 0xe80
 332 OFFSET(PcSkipTick, KIPCR, Prcb.SkipTick), // 0xe98
 333 OFFSET(PcDebuggerSavedIRQL, KIPCR, Prcb.DebuggerSavedIRQL), // 0xe99
 334 OFFSET(PcStartCycles, KIPCR, Prcb.StartCycles), // 0xec8
 335 OFFSET(PcCycleCounterHigh, KIPCR, Prcb.CycleCounterHigh), // 0xed8
 336 SIZE(ProcessorControlRegisterLength, KIPCR), // 0x5b80
 337
 338 HEADER("KPRCB offsets"),
 339 OFFSET(PbIdleHalt, KPRCB, IdleHalt), // 0x2
 340 OFFSET(PbCurrentThread, KPRCB, CurrentThread), // 0x4
 341 OFFSET(PbNextThread, KPRCB, NextThread), // 0x8
 342 OFFSET(PbIdleThread, KPRCB, IdleThread), //  0xc
 343 OFFSET(PbNestingLevel, KPRCB, NestingLevel), // 0x10
 344 OFFSET(PbNumber, KPRCB, Number), // 0x14
 345 OFFSET(PbPrcbLock, KPRCB, PrcbLock), // 0x18
 346 OFFSET(PbPriorityState, KPRCB, PriorityState), // 0x1c
 347 OFFSET(PbProcessorState, KPRCB, ProcessorState), // 0x20
 348 OFFSET(PbHalReserved, KPRCB, HalReserved), // 0x3d0
 349 OFFSET(PbMinorVersion, KPRCB, MinorVersion), // 0x40c
 350 OFFSET(PbMajorVersion, KPRCB, MajorVersion), // 0x40e
 351 OFFSET(PbBuildType, KPRCB, BuildType), // 0x410
 352 OFFSET(PbCoresPerPhysicalProcessor, KPRCB, CoresPerPhysicalProcessor), // 0x412
 353 OFFSET(PbLogicalProcessorsPerCore, KPRCB, LogicalProcessorsPerCore), // 0x413
 354 OFFSET(PbGroup, KPRCB, Group), // 0x41c
 355 OFFSET(PbGroupIndex, KPRCB, GroupIndex), // 0x41d
 356 OFFSET(PbLockQueue, KPRCB, LockQueue), // 0x480
 357 OFFSET(PbProcessorVendorString, KPRCB, ProcessorVendorString), // 0x508
 358 OFFSET(PbFeatureBits, KPRCB, FeatureBits), // 0x50c
 359 OFFSET(PbPPLookasideList, KPRCB, PPLookasideList), // 0x580
 360 OFFSET(PbPacketBarrier, KPRCB, PacketBarrier), // 0x600
 361 OFFSET(PbDeferredReadyListHead, KPRCB, DeferredReadyListHead), // 0x604
 362 OFFSET(PbSystemCalls, KPRCB, KeSystemCalls), // 0x630
 363 OFFSET(PbContextSwitches, KPRCB, KeContextSwitches), // 0x634
 364 OFFSET(PbFastReadNoWait, KPRCB, CcFastReadNoWait), // 0x638
 365 OFFSET(PbFastReadWait, KPRCB, CcFastReadWait), // 0x63c
 366 OFFSET(PbFastReadNotPossible, KPRCB, CcFastReadNotPossible), // 0x640
 367 OFFSET(PbCopyReadNoWait, KPRCB, CcCopyReadNoWait), // 0x644
 368 OFFSET(PbCopyReadWait, KPRCB, CcCopyReadWait), // 0x648
 369 OFFSET(PbCopyReadNoWaitMiss, KPRCB, CcCopyReadNoWaitMiss), // 0x64c
 370 OFFSET(PbLookasideIrpFloat, KPRCB, LookasideIrpFloat), // 0x650
 371 OFFSET(PbReadOperationCount, KPRCB, IoReadOperationCount), // 0x654
 372 OFFSET(PbWriteOperationCount, KPRCB, IoWriteOperationCount), // 0x658
 373 OFFSET(PbOtherOperationCount, KPRCB, IoOtherOperationCount), // 0x65c
 374 OFFSET(PbReadTransferCount, KPRCB, IoReadTransferCount), // 0x660
 375 OFFSET(PbWriteTransferCount, KPRCB, IoWriteTransferCount), // 0x668
 376 OFFSET(PbOtherTransferCount, KPRCB, IoOtherTransferCount), // 0x670
 377 OFFSET(PbMailbox, KPRCB, Mailbox), // 0x680
 378 OFFSET(PbIpiFrozen, KPRCB, IpiFrozen), // 0x688
 379 #if (NTDDI_VERSION >= NTDDI_LONGHORN)
 380 OFFSET(PbDpcList, KPRCB, DpcData[0].DpcList), // 0x690
 381 #else
 382 OFFSET(PbDpcListHead, KPRCB, DpcData[0].DpcListHead), // 0x690
 383 #endif
 384 OFFSET(PbDpcLock, KPRCB, DpcData[0].DpcLock), // 0x698
 385 OFFSET(PbDpcCount, KPRCB, DpcData[0].DpcCount), // 0x6a0
 386 OFFSET(PbDpcStack, KPRCB, DpcStack), // 0x6c0
 387 OFFSET(PbSpBase, KPRCB, SpBase), // 0x6c4
 388 OFFSET(PbMaximumDpcQueueDepth, KPRCB, MaximumDpcQueueDepth), // 0x6c8
 389 OFFSET(PbDpcRequestRate, KPRCB, DpcRequestRate), // 0x6cc
 390 OFFSET(PbMinimumDpcRate, KPRCB, MinimumDpcRate), // 0x6d0
 391 OFFSET(PbDpcLastCount, KPRCB, DpcLastCount), // 0x6d4
 392 OFFSET(PbQuantumEnd, KPRCB, QuantumEnd), // 0x6d9
 393 OFFSET(PbDpcRoutineActive, KPRCB, DpcRoutineActive), // 0x6da
 394 OFFSET(PbIdleSchedule, KPRCB, IdleSchedule), // 0x6db
 395 #if (NTDDI_VERSION >= NTDDI_WIN8)
 396 OFFSET(PbDpcRequestSummary, KPRCB, DpcRequestSummary), // 0x6dc
 397 OFFSET(PbNormalDpcState, KPRCB, NormalDpcState), // 0x6dc
 398 OFFSET(PbDpcGate, KPRCB, DpcGate), // 0x700
 399 #else
 400 OFFSET(PbDpcSetEventRequest, KPRCB, DpcSetEventRequest), // 0x700
 401 OFFSET(PbDpcEvent, KPRCB, DpcEvent), // 0x700
 402 #endif
 403 OFFSET(PbKeSpinLockOrdering, KPRCB, KeSpinLockOrdering), // 0x744
 404 OFFSET(PbWaitListHead, KPRCB, WaitListHead), // 0x780
 405 OFFSET(PbDispatcherReadyListHead, KPRCB, DispatcherReadyListHead), // 0x800
 406 OFFSET(PbInterruptCount, KPRCB, InterruptCount), // 0x900
 407 OFFSET(PbKernelTime, KPRCB, KernelTime), // 0x904
 408 OFFSET(PbUserTime, KPRCB, UserTime), // 0x908
 409 OFFSET(PbDpcTime, KPRCB, DpcTime), // 0x90c
 410 OFFSET(PbInterruptTime, KPRCB, InterruptTime), // 0x910
 411 OFFSET(PbAdjustDpcThreshold, KPRCB, AdjustDpcThreshold), // 0x914
 412 OFFSET(PbExceptionDispatchCount, KPRCB, KeExceptionDispatchCount), // 0x934
 413 OFFSET(PbParentNode, KPRCB, ParentNode), // 0x938
 414 OFFSET(PbStartCycles, KPRCB, StartCycles), // 0x948
 415 OFFSET(PbCycleCounterHigh, KPRCB, CycleCounterHigh), // 0x958
 416 #if (NTDDI_VERSION >= NTDDI_WIN8)
 417 OFFSET(PbEntropyCount, KPRCB, EntropyTimingState.EntropyCount), // 0x960
 418 OFFSET(PbEntropyBuffer, KPRCB, EntropyTimingState.Buffer), // 0x964
 419 #endif /* (NTDDI_VERSION >= NTDDI_WIN8) */
 420 OFFSET(PbPageColor, KPRCB, PageColor), // 0xa8c
 421 OFFSET(PbNodeColor, KPRCB, NodeColor), // 0xa90
 422 OFFSET(PbNodeShiftedColor, KPRCB, NodeShiftedColor), // 0xa94
 423 OFFSET(PbSecondaryColorMask, KPRCB, SecondaryColorMask), // 0xa98
 424 OFFSET(PbCycleTime, KPRCB, CycleTime), // 0xaa0
 425 OFFSET(PbCcFastMdlReadNoWait, KPRCB, CcFastMdlReadNoWait), // 0xb00
 426 OFFSET(PbPowerState, KPRCB, PowerState), // 0xb80
 427 OFFSET(PbAlignmentFixupCount, KPRCB, KeAlignmentFixupCount), // 0xd14
 428 OFFSET(PbSpinLockAcquireCount, KPRCB, SynchCounters.SpinLockAcquireCount), // 0xe80
 429 OFFSET(PbFiqMiniStack, KPRCB, FiqMiniStack), // 0xf50
 430 OFFSET(PbIrqMiniStack, KPRCB, IrqMiniStack), // 0xf70
 431 OFFSET(PbUdfMiniStack, KPRCB, UdfMiniStack), // 0xf90
 432 OFFSET(PbAbtMiniStack, KPRCB, AbtMiniStack), // 0xfb0
 433 OFFSET(PbPanicMiniStack, KPRCB, PanicMiniStack), // 0xfd0
 434 OFFSET(PbPanicStackBase, KPRCB, PanicStackBase), // 0xff0
 435 OFFSET(PbPPNPagedLookasideList, KPRCB, PPNPagedLookasideList), // 0x3200
 436 OFFSET(PbPPPagedLookasideList, KPRCB, PPPagedLookasideList), // 0x3b00
 437 //OFFSET(PbRequestMailbox, KPRCB, RequestMailbox), // 0x4600
 438
 439 HEADER("UCALLOUT_FRAME offsets (yes, Cu/Ck is confusing...)"),
 440 OFFSET(CkBuffer, UCALLOUT_FRAME, Buffer),
 441 OFFSET(CkLength, UCALLOUT_FRAME, Length),
 442 OFFSET(CkApiNumber, UCALLOUT_FRAME, ApiNumber),
 443 OFFSET(CkPc, UCALLOUT_FRAME, MachineFrame.Pc),
 444 OFFSET(CkSp, UCALLOUT_FRAME, MachineFrame.Sp),
 445 SIZE(CalloutFrameLength, UCALLOUT_FRAME),
 446
 447 HEADER("KCALLOUT_FRAME offsets (yes, Cu/Ck is confusing...)"),
 448 OFFSET(CuTrapFrame, KCALLOUT_FRAME, TrapFrame),
 449 OFFSET(CuOutputBuffer, KCALLOUT_FRAME, OutputBuffer),
 450 OFFSET(CuOutputLength, KCALLOUT_FRAME, OutputLength),
 451
 452 // Processor Idle Times Offset Definitions
 453 //#define PiStartTime 0x0
 454 //#define PiEndTime 0x8
 455
 456 //#define DBGDSCR_MON_EN_BIT 0x8000
 457 //#define KF_VFP_32REG 0x10
 458 //#define KI_SPINLOCK_ORDER_PRCB_LOCK 0x40
 459 //#define THREAD_FLAGS_CYCLE_PROFILING 0x1
 460 //#define THREAD_FLAGS_CYCLE_PROFILING_LOCK_BIT 0x10
 461 //#define THREAD_FLAGS_CYCLE_PROFILING_LOCK 0x10000
 462 //#define THREAD_FLAGS_COUNTER_PROFILING 0x2
 463 //#define THREAD_FLAGS_COUNTER_PROFILING_LOCK_BIT 0x11
 464 //#define THREAD_FLAGS_COUNTER_PROFILING_LOCK 0x20000
 465 //#define THREAD_FLAGS_GROUP_SCHEDULING 0x4
 466 //#define THREAD_FLAGS_AFFINITY_SET 0x8
 467 //#define THREAD_FLAGS_ACCOUNTING_CSWITCH 0x6
 468 //#define THREAD_FLAGS_ACCOUNTING_ANY 0xe
 469 //#define KTHREAD_AUTO_ALIGNMENT_BIT 0x0
 470 //#define KTHREAD_GUI_THREAD_MASK 0x40
 471 //#define KTHREAD_SYSTEM_THREAD_BIT 0xb
 472 //#define KTHREAD_QUEUE_DEFER_PREEMPTION_BIT 0xa
 473 //#define DEBUG_ACTIVE_DBG 0x1
 474 //#define DEBUG_ACTIVE_DBG_INSTRUMENTED 0x3
 475 //#define DEBUG_ACTIVE_INSTRUMENTED 0x2
 476 //CONSTANT(DEBUG_ACTIVE_MINIMAL_THREAD),
 477
 478 //#define ARM_VFP_MANAGEMENT 0x1
 479 //#define ARM_VFP_ENABLE_STATISTICS 0x0
 480 //#define ARM_VFP_ALWAYSON 0x0
 481 //#define ARM_VFP_LAZY_ONEWAY 0x1
 482 //#define ARM_VFP_LAZY_WITH_DEMOTION 0x2
 483 #define TRAP_TYPE_INTERRUPT 0x1
 484 #define TRAP_TYPE_SYSCALL 0x2
 485 #define TRAP_TYPE_UNDEFINED 0x3
 486 #define TRAP_TYPE_DATA_ABORT 0x4
 487 #define TRAP_TYPE_PREFETCH_ABORT 0x5
 488 #define TRAP_TYPE_RESET 0x6
 489 #define TRAP_TYPE_FIQ 0x7
 490 #define THUMB_BREAKPOINT 0xdefe
 491 #define THUMB_DEBUG_SERVICE 0xdefd
 492 #define THUMB_ASSERT 0xdefc
 493 #define THUMB_FASTFAIL 0xdefb
 494 #define THUMB_READ_CYCLES 0xdefa
 495 #define THUMB_DIVIDE_BY_0 0xdef9
 496 #define ARM_EXCEPTION_VECTOR 0xffff0000 // obsolete in win10
 497 #define KI_DPC_INTERRUPT_FLAGS 0x2f // amd64 as well
 498 #define KI_EXCEPTION_HARDWARE_ERROR 0x10000005
 499 #define KTRAP_FRAME_ARGUMENTS 0x38
 500 #define ARM_RED_ZONE_BYTES 0x8
 501 CONSTANT(PF_ARM_EXTERNAL_CACHE_AVAILABLE),
 502 #define FAST_FAIL_DEPRECATED_SERVICE_INVOKED 0x1b // since win10
 503
 504 #define CP14_DBGBCR_MISMATCH_BIT 0x400000
 505 #define CP14_DBGBCR_ENABLE_BIT 0x1
 506
 507 #define CP15_CPACR_D32DIS 0x80000000
 508 #define CP15_CPACR_ASEDIS 0x40000000
 509 #define CP15_CPACR_VFP_MASK 0xf00000
 510 #define CPVFP_FPEXC_EX 0x80000000
 511 #define CPVFP_FPEXC_EN 0x40000000
 512 #define CPVFP_FPEXC_DEX 0x20000000
 513 #define CPVFP_FPEXC_FP2V 0x10000000
 514
 515 #define CP15_CR0_HARVARD_CACHE 0x1000000
 516 #define CP15_xFSR_FS_HIGH 0x400
 517 #define CP15_xFSR_FS_LOW 0xf
 518 #define CP15_DFSR_WnR 0x800
 519
 520 #define CP15_SCTLR_I 0x1000
 521 #define CP15_SCTLR_C 0x4
 522 #define CP15_SCTLR_M 0x1
 523 #define CP15_SCTLR_Z 0x800
 524 #define CP15_SCTLR_TR 0x10000000 // obsolete in win10
 525 #define CP15_THREAD_RESERVED_MASK 0x3f
 526
 527 // Processor Start Block Offset Definitions
 528 #define PsbSelfMap 0x0
 529 #define PsbTiledTtb0 0x4
 530 #define ProcessorStartBlockLength 0x8
 531
 532 // Processor Parked Page Offset Definitions
 533 #define PppArchitecturalStateVirtualAddress 0x10
 534 #define PppArchitecturalState 0x18
 535 #define PppDcacheFlushSavedRegisters 0x3b8 // obsolete in win10
 536 #define ProcessorParkedPageLength 0x1000
 537
 538 #define TlThread 0x0
 539 #define TlCpuNumber 0x4
 540 #define TlTrapType 0x5
 541 #define TlPadding 0x6
 542 #define TlR0 0x8
 543 #define TlR1 0xc
 544 #define TlR2 0x10
 545 #define TlR3 0x14
 546 #define TlR12 0x18
 547 #define TlSp 0x1c
 548 #define TlLr 0x20
 549 #define TlR11 0x24
 550 #define TlPc 0x28
 551 #define TlCpsr 0x2c
 552
 553 // DPC stack
 554 #define DpSp 0x8
 555 #define DpPc 0xc
 556
 557 // also amd64
 558 #define KEXCEPTION_ACTIVE_INTERRUPT_FRAME 0x0
 559 #define KEXCEPTION_ACTIVE_EXCEPTION_FRAME 0x1
 560 #define KEXCEPTION_ACTIVE_SERVICE_FRAME 0x2
 561
 562
 563
 564
 565