* Sync up to trunk head (r65481).
[reactos.git] / subsystems / ntvdm / bios / bios32 / bios32.c
1 /*
2 * COPYRIGHT: GPL - See COPYING in the top level directory
3 * PROJECT: ReactOS Virtual DOS Machine
4 * FILE: bios32.c
5 * PURPOSE: VDM 32-bit BIOS
6 * PROGRAMMERS: Aleksandar Andrejevic <theflash AT sdf DOT lonestar DOT org>
7 */
8
9 /* INCLUDES *******************************************************************/
10
11 #define NDEBUG
12
13 /* For BIOS Version number */
14 #include <reactos/buildno.h>
15
16 #include "emulator.h"
17 #include "cpu/cpu.h" // for EMULATOR_FLAG_CF
18 #include "cpu/bop.h"
19 #include "int32.h"
20
21 #include <bios/bios.h>
22 #include <bios/rom.h>
23 #include "bios32.h"
24 #include "bios32p.h"
25 #include "kbdbios32.h"
26 #include "vidbios32.h"
27 #include "moubios32.h"
28
29 #include "io.h"
30 #include "hardware/cmos.h"
31 #include "hardware/pic.h"
32 #include "hardware/pit.h"
33
34 /* Extra PSDK/NDK Headers */
35 #include <ndk/kefuncs.h>
36
37 /* PRIVATE VARIABLES **********************************************************/
38
39 CALLBACK16 BiosContext;
40
41 /*
42
43 Bochs BIOS, see rombios.h
44 =========================
45
46 // model byte 0xFC = AT
47 #define SYS_MODEL_ID 0xFC
48 #define SYS_SUBMODEL_ID 0x00
49 #define BIOS_REVISION 1
50 #define BIOS_CONFIG_TABLE 0xe6f5
51
52 #ifndef BIOS_BUILD_DATE
53 # define BIOS_BUILD_DATE "06/23/99"
54 #endif
55
56 // 1K of base memory used for Extended Bios Data Area (EBDA)
57 // EBDA is used for PS/2 mouse support, and IDE BIOS, etc.
58 #define EBDA_SEG 0x9FC0
59 #define EBDA_SIZE 1 // In KiB
60 #define BASE_MEM_IN_K (640 - EBDA_SIZE)
61
62
63 See rombios.c
64 =============
65
66 ROM BIOS compatibility entry points:
67 ===================================
68 $e05b ; POST Entry Point
69 $e2c3 ; NMI Handler Entry Point
70 $e3fe ; INT 13h Fixed Disk Services Entry Point
71 $e401 ; Fixed Disk Parameter Table
72 $e6f2 ; INT 19h Boot Load Service Entry Point
73 $e6f5 ; Configuration Data Table
74 $e729 ; Baud Rate Generator Table
75 $e739 ; INT 14h Serial Communications Service Entry Point
76 $e82e ; INT 16h Keyboard Service Entry Point
77 $e987 ; INT 09h Keyboard Service Entry Point
78 $ec59 ; INT 13h Diskette Service Entry Point
79 $ef57 ; INT 0Eh Diskette Hardware ISR Entry Point
80 $efc7 ; Diskette Controller Parameter Table
81 $efd2 ; INT 17h Printer Service Entry Point
82 $f045 ; INT 10 Functions 0-Fh Entry Point
83 $f065 ; INT 10h Video Support Service Entry Point
84 $f0a4 ; MDA/CGA Video Parameter Table (INT 1Dh)
85 $f841 ; INT 12h Memory Size Service Entry Point
86 $f84d ; INT 11h Equipment List Service Entry Point
87 $f859 ; INT 15h System Services Entry Point
88 $fa6e ; Character Font for 320x200 & 640x200 Graphics (lower 128 characters)
89 $fe6e ; INT 1Ah Time-of-day Service Entry Point
90 $fea5 ; INT 08h System Timer ISR Entry Point
91 $fef3 ; Initial Interrupt Vector Offsets Loaded by POST
92 $ff53 ; IRET Instruction for Dummy Interrupt Handler
93 $ff54 ; INT 05h Print Screen Service Entry Point
94 $fff0 ; Power-up Entry Point
95 $fff5 ; ASCII Date ROM was built - 8 characters in MM/DD/YY
96 $fffe ; System Model ID
97
98 */
99
100 /*
101 * See Ralf Brown: http://www.ctyme.com/intr/rb-1594.htm#Table515
102 * for more information.
103 */
104 #define BIOS_MODEL 0xFC // PC-AT
105 #define BIOS_SUBMODEL 0x01 // AT models 319,339 8 MHz, Enh Keyb, 3.5"
106 #define BIOS_REVISION 0x00
107 // FIXME: Find a nice PS/2 486 + 487 BIOS combination!
108
109 /*
110 * WARNING! For compatibility purposes the string "IBM" should be at F000:E00E .
111 * Some programs alternatively look at "COPR. IBM" that is at F000:E008 .
112 */
113 static const CHAR BiosCopyright[] = "0000000 NTVDM IBM Compatible 486 32-bit BIOS Copyright (C) ReactOS Team 1996-2014";
114 static const CHAR BiosVersion[] = "ReactOS NTVDM 32-bit BIOS "KERNEL_VERSION_STR" (Build "KERNEL_VERSION_BUILD_STR")";
115 static const CHAR BiosDate[] = "06/17/13";
116
117 C_ASSERT(sizeof(BiosCopyright)-1 <= 0x5B); // Ensures that we won't overflow on the POST Code starting at F000:E05B
118 C_ASSERT(sizeof(BiosDate)-1 == 0x08);
119
120 /* 16-bit bootstrap code at F000:FFF0 */
121 static BYTE Bootstrap[] =
122 {
123 0xEA, // jmp far ptr
124 0x5B, 0xE0, 0x00, 0xF0, // F000:E05B
125 };
126
127 /*
128 * Normally at F000:E05B there is the POST that finally calls the bootstrap
129 * interrupt. It should also check the value of Bda->SoftReset. Since we do
130 * all the POST in 32 bit from the start, we just place there the bootstrap
131 * interrupt call.
132 */
133 static BYTE PostCode[] =
134 {
135 LOBYTE(EMULATOR_BOP), HIBYTE(EMULATOR_BOP), BOP_RESET, // Call BIOS POST
136 0xCD, 0x19, // INT 0x19, the bootstrap loader interrupt
137 // LOBYTE(EMULATOR_BOP), HIBYTE(EMULATOR_BOP), BOP_UNSIMULATE
138 };
139
140
141 /* PRIVATE FUNCTIONS **********************************************************/
142
143 static VOID WINAPI BiosException(LPWORD Stack)
144 {
145 /* Get the exception number and call the emulator API */
146 BYTE ExceptionNumber = LOBYTE(Stack[STACK_INT_NUM]);
147 EmulatorException(ExceptionNumber, Stack);
148 }
149
150 static VOID WINAPI BiosMiscService(LPWORD Stack)
151 {
152 switch (getAH())
153 {
154 /* OS Hooks for Multitasking */
155 case 0x80: // Device Open
156 case 0x81: // Device Close
157 case 0x82: // Program Termination
158 case 0x90: // Device Busy
159 case 0x91: // Device POST
160 {
161 /* Return success by default */
162 setAH(0x00);
163 Stack[STACK_FLAGS] &= ~EMULATOR_FLAG_CF;
164 break;
165 }
166
167 /* Keyboard intercept */
168 case 0x4F:
169 {
170 /* CF should be set but let's just set it again just in case */
171 /* Do not modify AL (the hardware scan code), but set CF to continue processing */
172 // setCF(1);
173 Stack[STACK_FLAGS] |= EMULATOR_FLAG_CF;
174 break;
175 }
176
177 /* Wait */
178 case 0x86:
179 {
180 /*
181 * Interval in microseconds in CX:DX
182 * See Ralf Brown: http://www.ctyme.com/intr/rb-1525.htm
183 * for more information.
184 */
185 LARGE_INTEGER TimeOut;
186 TimeOut.QuadPart = MAKELONG(getDX(), getCX()) * -10LL;
187
188 // HACK: For now, use the NT API (time in hundreds of nanoseconds).
189 NtDelayExecution(FALSE, &TimeOut);
190
191 /* Clear CF */
192 Stack[STACK_FLAGS] &= ~EMULATOR_FLAG_CF;
193
194 break;
195 }
196
197 /* Copy Extended Memory */
198 case 0x87:
199 {
200 DWORD Count = (DWORD)getCX() * 2;
201 PFAST486_GDT_ENTRY Gdt = (PFAST486_GDT_ENTRY)SEG_OFF_TO_PTR(getES(), getSI());
202 DWORD SourceBase = Gdt[2].Base + (Gdt[2].BaseMid << 16) + (Gdt[2].BaseHigh << 24);
203 DWORD SourceLimit = Gdt[2].Limit + (Gdt[2].LimitHigh << 16);
204 DWORD DestBase = Gdt[3].Base + (Gdt[3].BaseMid << 16) + (Gdt[3].BaseHigh << 24);
205 DWORD DestLimit = Gdt[3].Limit + (Gdt[3].LimitHigh << 16);
206
207 /* Check for flags */
208 if (Gdt[2].Granularity) SourceLimit = (SourceLimit << 12) | 0xFFF;
209 if (Gdt[3].Granularity) DestLimit = (DestLimit << 12) | 0xFFF;
210
211 if ((Count > SourceLimit) || (Count > DestLimit))
212 {
213 setAX(0x80);
214 Stack[STACK_FLAGS] |= EMULATOR_FLAG_CF;
215
216 break;
217 }
218
219 /* Copy */
220 RtlMoveMemory((PVOID)((ULONG_PTR)BaseAddress + DestBase),
221 (PVOID)((ULONG_PTR)BaseAddress + SourceBase),
222 Count);
223
224 setAX(ERROR_SUCCESS);
225 Stack[STACK_FLAGS] &= ~EMULATOR_FLAG_CF;
226 break;
227 }
228
229 /* Get Extended Memory Size */
230 case 0x88:
231 {
232 UCHAR Low, High;
233
234 /*
235 * Return the (usable) extended memory (after 1 MB)
236 * size in kB from CMOS.
237 */
238 IOWriteB(CMOS_ADDRESS_PORT, CMOS_REG_ACTUAL_EXT_MEMORY_LOW);
239 Low = IOReadB(CMOS_DATA_PORT);
240 IOWriteB(CMOS_ADDRESS_PORT, CMOS_REG_ACTUAL_EXT_MEMORY_HIGH);
241 High = IOReadB(CMOS_DATA_PORT);
242 setAX(MAKEWORD(Low, High));
243
244 /* Clear CF */
245 Stack[STACK_FLAGS] &= ~EMULATOR_FLAG_CF;
246
247 break;
248 }
249
250 /* Switch to Protected Mode */
251 case 0x89:
252 {
253 DPRINT1("BIOS INT 15h, AH=89h \"Switch to Protected Mode\" is UNIMPLEMENTED");
254
255 Stack[STACK_FLAGS] |= EMULATOR_FLAG_CF;
256 break;
257 }
258
259 /* Get Configuration */
260 case 0xC0:
261 {
262 /* Return the BIOS ROM Configuration Table address in ES:BX */
263 // The BCT is found at F000:E6F5 for 100% compatible BIOSes.
264 setES(BIOS_SEGMENT);
265 setBX(0xE6F5);
266
267 /* Call successful; clear CF */
268 setAH(0x00);
269 Stack[STACK_FLAGS] &= ~EMULATOR_FLAG_CF;
270
271 break;
272 }
273
274 /* Return Extended-Bios Data-Area Segment Address (PS) */
275 case 0xC1:
276 {
277 // Stack[STACK_FLAGS] &= ~EMULATOR_FLAG_CF;
278 // setES(???);
279
280 UNIMPLEMENTED;
281
282 /* We do not support EBDA yet */
283 Stack[STACK_FLAGS] |= EMULATOR_FLAG_CF;
284
285 break;
286 }
287
288 /* Pointing Device BIOS Interface (PS) */
289 case 0xC2:
290 {
291 BiosMousePs2Interface(Stack);
292 break;
293 }
294
295 default:
296 {
297 DPRINT1("BIOS Function INT 15h, AH = 0x%02X NOT IMPLEMENTED\n",
298 getAH());
299 }
300 }
301 }
302
303 static VOID WINAPI BiosRomBasic(LPWORD Stack)
304 {
305 /* ROM Basic is unsupported, display a message to the user */
306 DisplayMessage(L"NTVDM doesn't support ROM Basic. The VDM is closing.");
307
308 /* Stop the VDM */
309 EmulatorTerminate();
310 return;
311 }
312
313
314 VOID DosBootsectorInitialize(VOID);
315
316 static VOID WINAPI BiosBootstrapLoader(LPWORD Stack)
317 {
318 /*
319 * In real BIOSes one loads the bootsector read from a diskette
320 * or from a disk, copy it to 0000:7C00 and then boot it.
321 * Since we are 32-bit VM and we hardcode our DOS at the moment,
322 * just call the DOS 32-bit initialization code.
323 */
324
325 DPRINT("BiosBootstrapLoader -->\n");
326
327 /* Load DOS */
328 DosBootsectorInitialize();
329
330 /*
331 * Position CPU to 0000:7C00 to boot the OS.
332 *
333 * Since we are called via the INT32 mechanism, we need to correctly set
334 * CS:IP, not by changing the current one (otherwise the interrupt could
335 * not be clean up and return properly), but by changing the CS:IP in the
336 * stack, so that when the interrupt returns, the modified CS:IP is popped
337 * off the stack and the CPU is correctly repositioned.
338 */
339 Stack[STACK_CS] = 0x0000;
340 Stack[STACK_IP] = 0x7C00;
341
342 DPRINT("<-- BiosBootstrapLoader\n");
343 }
344
345 static VOID WINAPI BiosTimeService(LPWORD Stack)
346 {
347 switch (getAH())
348 {
349 case 0x00:
350 {
351 /* Set AL to 1 if midnight had passed, 0 otherwise */
352 setAL(Bda->MidnightPassed ? 0x01 : 0x00);
353
354 /* Return the tick count in CX:DX */
355 setCX(HIWORD(Bda->TickCounter));
356 setDX(LOWORD(Bda->TickCounter));
357
358 /* Reset the midnight flag */
359 Bda->MidnightPassed = FALSE;
360
361 break;
362 }
363
364 case 0x01:
365 {
366 /* Set the tick count to CX:DX */
367 Bda->TickCounter = MAKELONG(getDX(), getCX());
368
369 /* Reset the midnight flag */
370 Bda->MidnightPassed = FALSE;
371
372 break;
373 }
374
375 default:
376 {
377 DPRINT1("BIOS Function INT 1Ah, AH = 0x%02X NOT IMPLEMENTED\n",
378 getAH());
379 }
380 }
381 }
382
383 static VOID WINAPI BiosSystemTimerInterrupt(LPWORD Stack)
384 {
385 /* Increase the system tick count */
386 Bda->TickCounter++;
387 }
388
389
390 // From SeaBIOS
391 static VOID PicSetIRQMask(USHORT off, USHORT on)
392 {
393 UCHAR pic1off = off, pic1on = on, pic2off = off>>8, pic2on = on>>8;
394 IOWriteB(PIC_MASTER_DATA, (IOReadB(PIC_MASTER_DATA) & ~pic1off) | pic1on);
395 IOWriteB(PIC_SLAVE_DATA , (IOReadB(PIC_SLAVE_DATA ) & ~pic2off) | pic2on);
396 }
397
398 // From SeaBIOS
399 VOID EnableHwIRQ(UCHAR hwirq, EMULATOR_INT32_PROC func)
400 {
401 UCHAR vector;
402
403 PicSetIRQMask(1 << hwirq, 0);
404 if (hwirq < 8)
405 vector = BIOS_PIC_MASTER_INT + hwirq;
406 else
407 vector = BIOS_PIC_SLAVE_INT + hwirq - 8;
408
409 RegisterBiosInt32(vector, func);
410 }
411
412
413 VOID PicIRQComplete(LPWORD Stack)
414 {
415 /* Get the interrupt number */
416 BYTE IntNum = LOBYTE(Stack[STACK_INT_NUM]);
417
418 /*
419 * If this was a PIC IRQ, send an End-of-Interrupt to the PIC.
420 */
421
422 if (IntNum >= BIOS_PIC_MASTER_INT && IntNum < BIOS_PIC_MASTER_INT + 8)
423 {
424 /* It was an IRQ from the master PIC */
425 IOWriteB(PIC_MASTER_CMD, PIC_OCW2_EOI);
426 }
427 else if (IntNum >= BIOS_PIC_SLAVE_INT && IntNum < BIOS_PIC_SLAVE_INT + 8)
428 {
429 /* It was an IRQ from the slave PIC */
430 IOWriteB(PIC_SLAVE_CMD , PIC_OCW2_EOI);
431 IOWriteB(PIC_MASTER_CMD, PIC_OCW2_EOI);
432 }
433 }
434
435 static VOID WINAPI BiosHandleMasterPicIRQ(LPWORD Stack)
436 {
437 BYTE IrqNumber;
438
439 IOWriteB(PIC_MASTER_CMD, PIC_OCW3_READ_ISR /* == 0x0B */);
440 IrqNumber = IOReadB(PIC_MASTER_CMD);
441
442 DPRINT("Master - IrqNumber = 0x%02X\n", IrqNumber);
443
444 PicIRQComplete(Stack);
445 }
446
447 static VOID WINAPI BiosHandleSlavePicIRQ(LPWORD Stack)
448 {
449 BYTE IrqNumber;
450
451 IOWriteB(PIC_SLAVE_CMD, PIC_OCW3_READ_ISR /* == 0x0B */);
452 IrqNumber = IOReadB(PIC_SLAVE_CMD);
453
454 DPRINT("Slave - IrqNumber = 0x%02X\n", IrqNumber);
455
456 PicIRQComplete(Stack);
457 }
458
459 // Timer IRQ 0
460 static VOID WINAPI BiosTimerIrq(LPWORD Stack)
461 {
462 /*
463 * Perform the system timer interrupt.
464 *
465 * Do not call directly BiosSystemTimerInterrupt(Stack);
466 * because some programs may hook only BIOS_SYS_TIMER_INTERRUPT
467 * for their purpose...
468 */
469 Int32Call(&BiosContext, BIOS_SYS_TIMER_INTERRUPT);
470 // BiosSystemTimerInterrupt(Stack);
471 PicIRQComplete(Stack);
472 }
473
474
475 static VOID BiosHwSetup(VOID)
476 {
477 /* Initialize the master and the slave PICs (cascade mode) */
478 IOWriteB(PIC_MASTER_CMD, PIC_ICW1 | PIC_ICW1_ICW4);
479 IOWriteB(PIC_SLAVE_CMD , PIC_ICW1 | PIC_ICW1_ICW4);
480
481 /*
482 * Set the interrupt vector offsets for each PIC
483 * (base IRQs: 0x08-0x0F for IRQ 0-7, 0x70-0x77 for IRQ 8-15)
484 */
485 IOWriteB(PIC_MASTER_DATA, BIOS_PIC_MASTER_INT);
486 IOWriteB(PIC_SLAVE_DATA , BIOS_PIC_SLAVE_INT );
487
488 /* Tell the master PIC that there is a slave PIC at IRQ 2 */
489 IOWriteB(PIC_MASTER_DATA, 1 << 2);
490 /* Tell the slave PIC its cascade identity */
491 IOWriteB(PIC_SLAVE_DATA , 2);
492
493 /* Make sure both PICs are in 8086 mode */
494 IOWriteB(PIC_MASTER_DATA, PIC_ICW4_8086);
495 IOWriteB(PIC_SLAVE_DATA , PIC_ICW4_8086);
496
497 /* Clear the masks for both PICs */
498 // IOWriteB(PIC_MASTER_DATA, 0x00);
499 // IOWriteB(PIC_SLAVE_DATA , 0x00);
500 /* Disable all IRQs */
501 IOWriteB(PIC_MASTER_DATA, 0xFF);
502 IOWriteB(PIC_SLAVE_DATA , 0xFF);
503
504
505 /* Initialize PIT Counter 0 - Mode 2, 16bit binary count */
506 // NOTE: Some BIOSes set it to Mode 3 instead.
507 IOWriteB(PIT_COMMAND_PORT, 0x34);
508 // 18.2Hz refresh rate
509 IOWriteB(PIT_DATA_PORT(0), 0x00);
510 IOWriteB(PIT_DATA_PORT(0), 0x00);
511
512 /* Initialize PIT Counter 1 - Mode 2, 8bit binary count */
513 IOWriteB(PIT_COMMAND_PORT, 0x54);
514 // DRAM refresh every 15ms: http://www.cs.dartmouth.edu/~spl/Academic/Organization/docs/PC%20Timer%208253.html
515 IOWriteB(PIT_DATA_PORT(1), 18);
516
517 /* Initialize PIT Counter 2 - Mode 3, 16bit binary count */
518 IOWriteB(PIT_COMMAND_PORT, 0xB6);
519 // Count for 440Hz
520 IOWriteB(PIT_DATA_PORT(2), 0x97);
521 IOWriteB(PIT_DATA_PORT(2), 0x0A);
522
523 EnableHwIRQ(0, BiosTimerIrq);
524 }
525
526 static VOID InitializeBiosInt32(VOID)
527 {
528 USHORT i;
529
530 /* Initialize the callback context */
531 InitializeContext(&BiosContext, BIOS_SEGMENT, 0x0000);
532
533 /* Register the default BIOS 32-bit Interrupts */
534 for (i = 0x00; i <= 0xFF; i++)
535 {
536 RegisterBiosInt32(i, NULL);
537 }
538
539 /* Initialize the exception vector interrupts to a default Exception handler */
540 for (i = 0; i < 8; i++)
541 RegisterBiosInt32(i, BiosException);
542
543 /* Initialize HW vector interrupts to a default HW handler */
544 for (i = BIOS_PIC_MASTER_INT; i < BIOS_PIC_MASTER_INT + 8; i++)
545 RegisterBiosInt32(i, BiosHandleMasterPicIRQ);
546 for (i = BIOS_PIC_SLAVE_INT ; i < BIOS_PIC_SLAVE_INT + 8; i++)
547 RegisterBiosInt32(i, BiosHandleSlavePicIRQ);
548
549 /* Initialize software vector handlers */
550 RegisterBiosInt32(BIOS_EQUIPMENT_INTERRUPT, BiosEquipmentService );
551 RegisterBiosInt32(BIOS_MEMORY_SIZE , BiosGetMemorySize );
552 RegisterBiosInt32(BIOS_MISC_INTERRUPT , BiosMiscService );
553 RegisterBiosInt32(BIOS_ROM_BASIC , BiosRomBasic );
554 RegisterBiosInt32(BIOS_BOOTSTRAP_LOADER , BiosBootstrapLoader );
555 RegisterBiosInt32(BIOS_TIME_INTERRUPT , BiosTimeService );
556 RegisterBiosInt32(BIOS_SYS_TIMER_INTERRUPT, BiosSystemTimerInterrupt);
557
558 /* Some interrupts are in fact addresses to tables */
559 ((PULONG)BaseAddress)[0x1E] = (ULONG)NULL;
560 ((PULONG)BaseAddress)[0x41] = (ULONG)NULL;
561 ((PULONG)BaseAddress)[0x46] = (ULONG)NULL;
562 ((PULONG)BaseAddress)[0x48] = (ULONG)NULL;
563 ((PULONG)BaseAddress)[0x49] = (ULONG)NULL;
564 }
565
566 static VOID InitializeBiosData(VOID)
567 {
568 UCHAR Low, High;
569
570 /* Initialize the BDA contents */
571 RtlZeroMemory(Bda, sizeof(*Bda));
572 Bda->EquipmentList = BIOS_EQUIPMENT_LIST;
573
574 /*
575 * Retrieve the conventional memory size
576 * in kB from CMOS, typically 640 kB.
577 */
578 IOWriteB(CMOS_ADDRESS_PORT, CMOS_REG_BASE_MEMORY_LOW);
579 Low = IOReadB(CMOS_DATA_PORT);
580 IOWriteB(CMOS_ADDRESS_PORT, CMOS_REG_BASE_MEMORY_HIGH);
581 High = IOReadB(CMOS_DATA_PORT);
582 Bda->MemorySize = MAKEWORD(Low, High);
583 }
584
585 static VOID InitializeBiosInfo(VOID)
586 {
587 RtlZeroMemory(Bct, sizeof(*Bct));
588
589 Bct->Length = sizeof(*Bct);
590 Bct->Model = BIOS_MODEL;
591 Bct->SubModel = BIOS_SUBMODEL;
592 Bct->Revision = BIOS_REVISION;
593 Bct->Feature[0] = 0x70; // At the moment we don't support "wait for external event (INT 15/AH=41h)", we also don't have any "extended BIOS area allocated (usually at top of RAM)"; see http://www.ctyme.com/intr/rb-1594.htm#Table510
594 Bct->Feature[1] = 0x00; // We don't support anything from here; see http://www.ctyme.com/intr/rb-1594.htm#Table511
595 Bct->Feature[2] = 0x00;
596 Bct->Feature[3] = 0x00;
597 Bct->Feature[4] = 0x00;
598 }
599
600
601
602 /*
603 * The BIOS POST (Power On-Self Test)
604 */
605 VOID
606 Bios32Post(VOID)
607 {
608 #if 0
609 BOOLEAN Success;
610 #endif
611
612 DPRINT("Bios32Post\n");
613
614 /* Initialize the stack */
615 // That's what says IBM... (stack at 30:00FF going downwards)
616 // setSS(0x0000);
617 // setSP(0x0400);
618 setSS(0x0050); // Stack at 50:0400, going downwards
619 setSP(0x0400);
620
621 /* Set data segment */
622 setDS(BDA_SEGMENT);
623
624 /* Initialize the BDA and the BIOS ROM Information */
625 InitializeBiosData();
626 InitializeBiosInfo();
627
628 /*
629 * Initialize IVT and hardware
630 */
631
632 /* Register the BIOS 32-bit Interrupts */
633 InitializeBiosInt32();
634
635 /* Initialize platform hardware (PIC/PIT chips, ...) */
636 BiosHwSetup();
637
638 /* Initialize the Keyboard, Video and Mouse BIOS */
639 if (!KbdBios32Initialize() || !VidBios32Initialize() || !MouseBios32Initialize())
640 {
641 // return FALSE;
642
643 /* Stop the VDM */
644 EmulatorTerminate();
645 return;
646 }
647
648 #if 0
649 /* Initialize the Keyboard and Video BIOS */
650 if (!KbdBiosInitialize() || !VidBiosInitialize())
651 {
652 /* Stop the VDM */
653 EmulatorTerminate();
654 return;
655 }
656 #endif
657
658 ///////////// MUST BE DONE AFTER IVT INITIALIZATION !! /////////////////////
659
660 #if 0
661 /* Load some ROMs */
662 Success = LoadRom("boot.bin", (PVOID)0xE0000, NULL);
663 DPRINT1("Test ROM loading %s ; GetLastError() = %u\n", Success ? "succeeded" : "failed", GetLastError());
664 #endif
665
666 SearchAndInitRoms(&BiosContext);
667
668 /*
669 * End of the 32-bit POST portion. We then fall back into 16-bit where
670 * the rest of the POST code is executed, typically calling INT 19h
671 * to boot up the OS.
672 */
673 }
674
675 static VOID WINAPI Bios32ResetBop(LPWORD Stack)
676 {
677 DPRINT("Bios32ResetBop\n");
678
679 /* Disable interrupts */
680 setIF(0);
681
682 // FIXME: Check the word at 0040h:0072h (Bda->SoftReset) and do one of the
683 // following actions:
684 // - if the word is 1234h, perform a warm reboot (aka. Ctrl-Alt-Del);
685 // - if the word is 0000h, perform a cold reboot (aka. Reset).
686
687 /* Do the POST */
688 Bios32Post();
689
690 /* Enable interrupts */
691 setIF(1);
692 }
693
694
695 /* PUBLIC FUNCTIONS ***********************************************************/
696
697 BOOLEAN Bios32Initialize(VOID)
698 {
699 /*
700 * Initialize BIOS32 static data
701 */
702
703 /* Bootstrap code */
704 RtlCopyMemory(SEG_OFF_TO_PTR(0xF000, 0xE05B), PostCode , sizeof(PostCode ));
705 RtlCopyMemory(SEG_OFF_TO_PTR(0xF000, 0xFFF0), Bootstrap, sizeof(Bootstrap));
706
707 /* System BIOS Copyright */
708 RtlCopyMemory(SEG_OFF_TO_PTR(0xF000, 0xE000), BiosCopyright, sizeof(BiosCopyright)-1);
709
710 /* System BIOS Version */
711 RtlCopyMemory(SEG_OFF_TO_PTR(0xF000, 0xE080), BiosVersion, sizeof(BiosVersion)-1);
712 // FIXME: or E061, or E100 ??
713
714 /* System BIOS Date */
715 RtlCopyMemory(SEG_OFF_TO_PTR(0xF000, 0xFFF5), BiosDate, sizeof(BiosDate)-1);
716
717 /* System BIOS Model (same as Bct->Model) */
718 *(PBYTE)(SEG_OFF_TO_PTR(0xF000, 0xFFFE)) = BIOS_MODEL;
719
720 /* Redefine our POST function */
721 RegisterBop(BOP_RESET, Bios32ResetBop);
722
723 /* We are done */
724 return TRUE;
725 }
726
727 VOID Bios32Cleanup(VOID)
728 {
729 MouseBios32Cleanup();
730 VidBios32Cleanup();
731 KbdBios32Cleanup();
732 }
733
734 /* EOF */