2294a6d565387bde982289b9c155c2d6882a2eb4
[reactos.git] / subsystems / ntvdm / vga.h
1 /*
2 * COPYRIGHT: GPL - See COPYING in the top level directory
3 * PROJECT: ReactOS Virtual DOS Machine
4 * FILE: vga.h
5 * PURPOSE: VGA hardware emulation
6 * PROGRAMMERS: Aleksandar Andrejevic <theflash AT sdf DOT lonestar DOT org>
7 */
8
9 #ifndef _VGA_H_
10 #define _VGA_H_
11
12 /* INCLUDES *******************************************************************/
13
14 #include "ntvdm.h"
15
16 /* DEFINES ********************************************************************/
17
18 #define VGA_NUM_BANKS 4
19 #define VGA_BANK_SIZE 0x10000
20 #define VGA_MAX_COLORS 256
21 #define VGA_PALETTE_SIZE (VGA_MAX_COLORS * 3)
22 #define VGA_BITMAP_INFO_SIZE (sizeof(BITMAPINFOHEADER) + 2 * (VGA_PALETTE_SIZE / 3))
23 #define VGA_MINIMUM_WIDTH 400
24 #define VGA_MINIMUM_HEIGHT 300
25 #define VGA_DAC_TO_COLOR(x) (((x) << 2) | ((x) >> 4))
26 #define VGA_COLOR_TO_DAC(x) ((x) >> 2)
27
28
29
30 /* Register I/O ports */
31
32 #define VGA_MISC_READ 0x3CC
33 #define VGA_MISC_WRITE 0x3C2
34
35 #define VGA_INSTAT0_READ 0x3C2
36
37 #define VGA_INSTAT1_READ_MONO 0x3BA
38 #define VGA_INSTAT1_READ_COLOR 0x3DA
39
40 #define VGA_FEATURE_READ 0x3CA
41 #define VGA_FEATURE_WRITE_MONO 0x3BA
42 #define VGA_FEATURE_WRITE_COLOR 0x3DA
43
44 #define VGA_AC_INDEX 0x3C0
45 #define VGA_AC_WRITE 0x3C0
46 #define VGA_AC_READ 0x3C1
47
48 #define VGA_SEQ_INDEX 0x3C4
49 #define VGA_SEQ_DATA 0x3C5
50
51 #define VGA_DAC_MASK 0x3C6
52 #define VGA_DAC_READ_INDEX 0x3C7
53 #define VGA_DAC_WRITE_INDEX 0x3C8
54 #define VGA_DAC_DATA 0x3C9
55
56 #define VGA_CRTC_INDEX_MONO 0x3B4
57 #define VGA_CRTC_DATA_MONO 0x3B5
58 #define VGA_CRTC_INDEX_COLOR 0x3D4
59 #define VGA_CRTC_DATA_COLOR 0x3D5
60
61 #define VGA_GC_INDEX 0x3CE
62 #define VGA_GC_DATA 0x3CF
63
64
65
66 //
67 // Miscellaneous and Status Registers
68 //
69
70 /* Miscellaneous register bits */
71 #define VGA_MISC_COLOR (1 << 0)
72 #define VGA_MISC_RAM_ENABLED (1 << 1)
73 // #define VGA_MISC_CSEL1 (1 << 2)
74 // #define VGA_MISC_CSEL2 (1 << 3)
75 #define VGA_MISC_OE_INVERT (1 << 5)
76 #define VGA_MISC_HSYNCP (1 << 6)
77 #define VGA_MISC_VSYNCP (1 << 7)
78
79 /* Status register flags */
80 #define VGA_STAT_DD (1 << 0)
81 #define VGA_STAT_VRETRACE (1 << 3)
82
83
84 //
85 // Sequencer Registers
86 //
87
88 /* Sequencer reset register bits */
89 #define VGA_SEQ_RESET_AR (1 << 0)
90 #define VGA_SEQ_RESET_SR (1 << 1)
91
92 /* Sequencer clock register bits */
93 #define VGA_SEQ_CLOCK_98DM (1 << 0)
94 #define VGA_SEQ_CLOCK_SLR (1 << 2)
95 #define VGA_SEQ_CLOCK_DCR (1 << 3)
96 #define VGA_SEQ_CLOCK_S4 (1 << 4)
97 #define VGA_SEQ_CLOCK_SD (1 << 5)
98
99 /* Sequencer memory register bits */
100 #define VGA_SEQ_MEM_EXT (1 << 1)
101 #define VGA_SEQ_MEM_OE (1 << 2)
102 #define VGA_SEQ_MEM_C4 (1 << 3)
103
104 enum
105 {
106 VGA_SEQ_RESET_REG,
107 VGA_SEQ_CLOCK_REG,
108 VGA_SEQ_MASK_REG,
109 VGA_SEQ_CHAR_REG,
110 VGA_SEQ_MEM_REG,
111 VGA_SEQ_MAX_REG
112 };
113
114
115 //
116 // CRT Controller Registers
117 //
118
119 /* CRTC overflow register bits */
120 #define VGA_CRTC_OVERFLOW_VT8 (1 << 0)
121 #define VGA_CRTC_OVERFLOW_VDE8 (1 << 1)
122 #define VGA_CRTC_OVERFLOW_VRS8 (1 << 2)
123 #define VGA_CRTC_OVERFLOW_SVB8 (1 << 3)
124 #define VGA_CRTC_OVERFLOW_LC8 (1 << 4)
125 #define VGA_CRTC_OVERFLOW_VT9 (1 << 5)
126 #define VGA_CRTC_OVERFLOW_VDE9 (1 << 6)
127 #define VGA_CRTC_OVERFLOW_VRS9 (1 << 7)
128
129 /* CRTC underline register bits */
130 #define VGA_CRTC_UNDERLINE_DWORD (1 << 6)
131
132 /* CRTC max scanline register bits */
133 #define VGA_CRTC_MAXSCANLINE_DOUBLE (1 << 7)
134
135 /* CRTC mode control register bits */
136 #define VGA_CRTC_MODE_CONTROL_WRAP (1 << 5)
137 #define VGA_CRTC_MODE_CONTROL_BYTE (1 << 6)
138 #define VGA_CRTC_MODE_CONTROL_SYNC (1 << 7)
139
140 enum
141 {
142 VGA_CRTC_HORZ_TOTAL_REG,
143 VGA_CRTC_END_HORZ_DISP_REG,
144 VGA_CRTC_START_HORZ_BLANKING_REG,
145 VGA_CRTC_END_HORZ_BLANKING_REG,
146 VGA_CRTC_START_HORZ_RETRACE_REG,
147 VGA_CRTC_END_HORZ_RETRACE_REG,
148 VGA_CRTC_VERT_TOTAL_REG,
149 VGA_CRTC_OVERFLOW_REG,
150 VGA_CRTC_PRESET_ROW_SCAN_REG,
151 VGA_CRTC_MAX_SCAN_LINE_REG,
152 VGA_CRTC_CURSOR_START_REG,
153 VGA_CRTC_CURSOR_END_REG,
154 VGA_CRTC_START_ADDR_HIGH_REG,
155 VGA_CRTC_START_ADDR_LOW_REG,
156 VGA_CRTC_CURSOR_LOC_HIGH_REG,
157 VGA_CRTC_CURSOR_LOC_LOW_REG,
158 VGA_CRTC_VERT_RETRACE_START_REG,
159 VGA_CRTC_VERT_RETRACE_END_REG,
160 VGA_CRTC_VERT_DISP_END_REG,
161 VGA_CRTC_OFFSET_REG,
162 VGA_CRTC_UNDERLINE_REG,
163 VGA_CRTC_START_VERT_BLANKING_REG,
164 VGA_CRTC_END_VERT_BLANKING,
165 VGA_CRTC_MODE_CONTROL_REG,
166 VGA_CRTC_LINE_COMPARE_REG,
167 VGA_CRTC_MAX_REG
168 };
169
170
171 //
172 // Graphics Controller Registers
173 //
174
175 /* Graphics controller mode register bits */
176 #define VGA_GC_MODE_READ (1 << 3)
177 #define VGA_GC_MODE_OE (1 << 4)
178 #define VGA_GC_MODE_SHIFTREG (1 << 5)
179 #define VGA_GC_MODE_SHIFT256 (1 << 6)
180
181 /* Graphics controller miscellaneous register bits */
182 #define VGA_GC_MISC_NOALPHA (1 << 0)
183 #define VGA_GC_MISC_OE (1 << 1)
184
185 enum
186 {
187 VGA_GC_RESET_REG,
188 VGA_GC_ENABLE_RESET_REG,
189 VGA_GC_COLOR_COMPARE_REG,
190 VGA_GC_ROTATE_REG,
191 VGA_GC_READ_MAP_SEL_REG,
192 VGA_GC_MODE_REG,
193 VGA_GC_MISC_REG,
194 VGA_GC_COLOR_IGNORE_REG,
195 VGA_GC_BITMASK_REG,
196 VGA_GC_MAX_REG
197 };
198
199
200 //
201 // Attribute Controller Registers
202 // They are a relinquish of the CGA/EGA era.
203 //
204
205 /* AC mode control register bits */
206 #define VGA_AC_CONTROL_ATGE (1 << 0)
207 #define VGA_AC_CONTROL_MONO (1 << 1)
208 #define VGA_AC_CONTROL_LGE (1 << 2)
209 #define VGA_AC_CONTROL_BLINK (1 << 3)
210 #define VGA_AC_CONTROL_PPM (1 << 5)
211 #define VGA_AC_CONTROL_8BIT (1 << 6)
212 #define VGA_AC_CONTROL_P54S (1 << 7)
213
214 enum
215 {
216 VGA_AC_PAL_0_REG,
217 VGA_AC_PAL_1_REG,
218 VGA_AC_PAL_2_REG,
219 VGA_AC_PAL_3_REG,
220 VGA_AC_PAL_4_REG,
221 VGA_AC_PAL_5_REG,
222 VGA_AC_PAL_6_REG,
223 VGA_AC_PAL_7_REG,
224 VGA_AC_PAL_8_REG,
225 VGA_AC_PAL_9_REG,
226 VGA_AC_PAL_A_REG,
227 VGA_AC_PAL_B_REG,
228 VGA_AC_PAL_C_REG,
229 VGA_AC_PAL_D_REG,
230 VGA_AC_PAL_E_REG,
231 VGA_AC_PAL_F_REG,
232 VGA_AC_CONTROL_REG,
233 VGA_AC_OVERSCAN_REG,
234 VGA_AC_COLOR_PLANE_REG,
235 VGA_AC_HORZ_PANNING_REG,
236 VGA_AC_COLOR_SEL_REG,
237 VGA_AC_MAX_REG
238 };
239
240
241 typedef struct _VGA_REGISTERS
242 {
243 UCHAR Misc;
244 UCHAR Sequencer[VGA_SEQ_MAX_REG];
245 UCHAR CRT[VGA_CRTC_MAX_REG];
246 UCHAR Graphics[VGA_GC_MAX_REG];
247 UCHAR Attribute[VGA_AC_MAX_REG];
248 } VGA_REGISTERS, *PVGA_REGISTERS;
249
250
251 /* FUNCTIONS ******************************************************************/
252
253 DWORD VgaGetVideoBaseAddress(VOID);
254 DWORD VgaGetVideoLimitAddress(VOID);
255 COORD VgaGetDisplayResolution(VOID);
256 VOID VgaRefreshDisplay(VOID);
257 VOID VgaHorizontalRetrace(VOID);
258 VOID VgaReadMemory(DWORD Address, LPBYTE Buffer, DWORD Size);
259 VOID VgaWriteMemory(DWORD Address, LPBYTE Buffer, DWORD Size);
260 VOID VgaClearMemory(VOID);
261 BOOLEAN VgaInitialize(HANDLE TextHandle);
262
263 BYTE WINAPI VgaReadPort(ULONG Port);
264 VOID WINAPI VgaWritePort(ULONG Port, BYTE Data);
265
266 #endif // _VGA_H_
267
268 /* EOF */