[NTVDM]
[reactos.git] / subsystems / ntvdm / vga.h
1 /*
2 * COPYRIGHT: GPL - See COPYING in the top level directory
3 * PROJECT: ReactOS Virtual DOS Machine
4 * FILE: vga.h
5 * PURPOSE: VGA hardware emulation (header file)
6 * PROGRAMMERS: Aleksandar Andrejevic <theflash AT sdf DOT lonestar DOT org>
7 */
8
9 #ifndef _VGA_H_
10 #define _VGA_H_
11
12 /* INCLUDES *******************************************************************/
13
14 #include "ntvdm.h"
15
16 /* DEFINES ********************************************************************/
17
18 /* Register I/O ports */
19 #define VGA_AC_INDEX 0x3C0
20 #define VGA_AC_WRITE 0x3C0
21 #define VGA_AC_READ 0x3C1
22 #define VGA_SEQ_INDEX 0x3C4
23 #define VGA_SEQ_DATA 0x3C5
24 #define VGA_DAC_READ_INDEX 0x3C7
25 #define VGA_DAC_WRITE_INDEX 0x3C8
26 #define VGA_DAC_DATA 0x3C9
27 #define VGA_MISC_READ 0x3CC
28 #define VGA_MISC_WRITE 0x3C2
29 #define VGA_CRTC_INDEX 0x3D4
30 #define VGA_CRTC_DATA 0x3D5
31 #define VGA_GC_INDEX 0x3CE
32 #define VGA_GC_DATA 0x3CF
33 #define VGA_STAT_MONO 0x3BA
34 #define VGA_STAT_COLOR 0x3DA
35
36 #define VGA_NUM_BANKS 4
37 #define VGA_BANK_SIZE 0x10000
38 #define VGA_MAX_COLORS 256
39 #define VGA_PALETTE_SIZE (VGA_MAX_COLORS * 3)
40 #define VGA_BITMAP_INFO_SIZE (sizeof(BITMAPINFOHEADER) + 2 * (VGA_PALETTE_SIZE / 3))
41 #define VGA_DAC_TO_COLOR(x) (((x) << 2) | ((x) >> 6))
42 #define VGA_COLOR_TO_DAC(x) ((x) >> 2)
43
44 /* Sequencer reset register bits */
45 #define VGA_SEQ_RESET_AR (1 << 0)
46 #define VGA_SEQ_RESET_SR (1 << 1)
47
48 /* Sequencer clock register bits */
49 #define VGA_SEQ_CLOCK_98DM (1 << 0)
50 #define VGA_SEQ_CLOCK_SLR (1 << 2)
51 #define VGA_SEQ_CLOCK_DCR (1 << 3)
52 #define VGA_SEQ_CLOCK_S4 (1 << 4)
53 #define VGA_SEQ_CLOCK_SD (1 << 5)
54
55 /* Sequencer memory register bits */
56 #define VGA_SEQ_MEM_EXT (1 << 1)
57 #define VGA_SEQ_MEM_OE (1 << 2)
58 #define VGA_SEQ_MEM_C4 (1 << 3)
59
60 /* Graphics controller mode register bits */
61 #define VGA_GC_MODE_READ (1 << 3)
62 #define VGA_GC_MODE_OE (1 << 4)
63 #define VGA_GC_MODE_SHIFTREG (1 << 5)
64 #define VGA_GC_MODE_SHIFT256 (1 << 6)
65
66 /* Graphics controller miscellaneous register bits */
67 #define VGA_GC_MISC_NOALPHA (1 << 0)
68 #define VGA_GC_MISC_OE (1 << 1)
69
70 /* CRTC overflow register bits */
71 #define VGA_CRTC_OVERFLOW_VT8 (1 << 0)
72 #define VGA_CRTC_OVERFLOW_VDE8 (1 << 1)
73 #define VGA_CRTC_OVERFLOW_VRS8 (1 << 2)
74 #define VGA_CRTC_OVERFLOW_SVB8 (1 << 3)
75 #define VGA_CRTC_OVERFLOW_LC8 (1 << 4)
76 #define VGA_CRTC_OVERFLOW_VT9 (1 << 5)
77 #define VGA_CRTC_OVERFLOW_VDE9 (1 << 6)
78 #define VGA_CRTC_OVERFLOW_VRS9 (1 << 7)
79
80 /* CRTC underline register bits */
81 #define VGA_CRTC_UNDERLINE_DWORD (1 << 6)
82
83 /* CRTC max scanline register bits */
84 #define VGA_CRTC_MAXSCANLINE_DOUBLE (1 << 7)
85
86 /* CRTC mode control register bits */
87 #define VGA_CRTC_MODE_CONTROL_WRAP (1 << 5)
88 #define VGA_CRTC_MODE_CONTROL_BYTE (1 << 6)
89 #define VGA_CRTC_MODE_CONTROL_SYNC (1 << 7)
90
91 /* AC control register bits */
92 #define VGA_AC_CONTROL_ATGE (1 << 0)
93 #define VGA_AC_CONTROL_MONO (1 << 1)
94 #define VGA_AC_CONTROL_LGE (1 << 2)
95 #define VGA_AC_CONTROL_BLINK (1 << 3)
96 #define VGA_AC_CONTROL_PPM (1 << 5)
97 #define VGA_AC_CONTROL_8BIT (1 << 6)
98 #define VGA_AC_CONTROL_P54S (1 << 7)
99
100 /* Miscellaneous register bits */
101 #define VGA_MISC_COLOR (1 << 0)
102 #define VGA_MISC_RAM_ENABLED (1 << 1)
103 #define VGA_MISC_OE_INVERT (1 << 5)
104 #define VGA_MISC_HSYNCP (1 << 6)
105 #define VGA_MISC_VSYNCP (1 << 7)
106
107 /* Status register flags */
108 #define VGA_STAT_DD (1 << 0)
109 #define VGA_STAT_VRETRACE (1 << 3)
110
111 enum
112 {
113 VGA_SEQ_RESET_REG,
114 VGA_SEQ_CLOCK_REG,
115 VGA_SEQ_MASK_REG,
116 VGA_SEQ_CHAR_REG,
117 VGA_SEQ_MEM_REG,
118 VGA_SEQ_MAX_REG
119 };
120
121 enum
122 {
123 VGA_GC_RESET_REG,
124 VGA_GC_ENABLE_RESET_REG,
125 VGA_GC_COLOR_COMPARE_REG,
126 VGA_GC_ROTATE_REG,
127 VGA_GC_READ_MAP_SEL_REG,
128 VGA_GC_MODE_REG,
129 VGA_GC_MISC_REG,
130 VGA_GC_COLOR_IGNORE_REG,
131 VGA_GC_BITMASK_REG,
132 VGA_GC_MAX_REG
133 };
134
135 enum
136 {
137 VGA_CRTC_HORZ_TOTAL_REG,
138 VGA_CRTC_END_HORZ_DISP_REG,
139 VGA_CRTC_START_HORZ_BLANKING_REG,
140 VGA_CRTC_END_HORZ_BLANKING_REG,
141 VGA_CRTC_START_HORZ_RETRACE_REG,
142 VGA_CRTC_END_HORZ_RETRACE_REG,
143 VGA_CRTC_VERT_TOTAL_REG,
144 VGA_CRTC_OVERFLOW_REG,
145 VGA_CRTC_PRESET_ROW_SCAN_REG,
146 VGA_CRTC_MAX_SCAN_LINE_REG,
147 VGA_CRTC_CURSOR_START_REG,
148 VGA_CRTC_CURSOR_END_REG,
149 VGA_CRTC_START_ADDR_HIGH_REG,
150 VGA_CRTC_START_ADDR_LOW_REG,
151 VGA_CRTC_CURSOR_LOC_HIGH_REG,
152 VGA_CRTC_CURSOR_LOC_LOW_REG,
153 VGA_CRTC_VERT_RETRACE_START_REG,
154 VGA_CRTC_VERT_RETRACE_END_REG,
155 VGA_CRTC_VERT_DISP_END_REG,
156 VGA_CRTC_OFFSET_REG,
157 VGA_CRTC_UNDERLINE_REG,
158 VGA_CRTC_START_VERT_BLANKING_REG,
159 VGA_CRTC_END_VERT_BLANKING,
160 VGA_CRTC_MODE_CONTROL_REG,
161 VGA_CRTC_LINE_COMPARE_REG,
162 VGA_CRTC_MAX_REG
163 };
164
165 enum
166 {
167 VGA_AC_PAL_0_REG,
168 VGA_AC_PAL_1_REG,
169 VGA_AC_PAL_2_REG,
170 VGA_AC_PAL_3_REG,
171 VGA_AC_PAL_4_REG,
172 VGA_AC_PAL_5_REG,
173 VGA_AC_PAL_6_REG,
174 VGA_AC_PAL_7_REG,
175 VGA_AC_PAL_8_REG,
176 VGA_AC_PAL_9_REG,
177 VGA_AC_PAL_A_REG,
178 VGA_AC_PAL_B_REG,
179 VGA_AC_PAL_C_REG,
180 VGA_AC_PAL_D_REG,
181 VGA_AC_PAL_E_REG,
182 VGA_AC_PAL_F_REG,
183 VGA_AC_CONTROL_REG,
184 VGA_AC_OVERSCAN_REG,
185 VGA_AC_COLOR_PLANE_REG,
186 VGA_AC_HORZ_PANNING_REG,
187 VGA_AC_COLOR_SEL_REG,
188 VGA_AC_MAX_REG
189 };
190
191 /* FUNCTIONS ******************************************************************/
192
193 DWORD VgaGetVideoBaseAddress(VOID);
194 DWORD VgaGetVideoLimitAddress(VOID);
195 COORD VgaGetDisplayResolution(VOID);
196 VOID VgaRefreshDisplay(VOID);
197 VOID VgaHorizontalRetrace(VOID);
198 VOID VgaReadMemory(DWORD Address, LPBYTE Buffer, DWORD Size);
199 VOID VgaWriteMemory(DWORD Address, LPBYTE Buffer, DWORD Size);
200 BYTE VgaReadPort(WORD Port);
201 VOID VgaWritePort(WORD Port, BYTE Data);
202 VOID VgaClearMemory(VOID);
203 VOID VgaResetPalette(VOID);
204 BOOLEAN VgaInitialize(HANDLE TextHandle);
205
206 #endif // _VGA_H_
207
208 /* EOF */