* These tables are not consumed directly by the ACPICA subsystem, but are
* included here to support device drivers and the AML disassembler.
*
- * Generally, the tables in this file are defined by third-party specifications,
- * and are not defined directly by the ACPI specification itself.
- *
******************************************************************************/
* file. Useful because they make it more difficult to inadvertently type in
* the wrong signature.
*/
-#define ACPI_SIG_ASF "ASF!" /* Alert Standard Format table */
-#define ACPI_SIG_BOOT "BOOT" /* Simple Boot Flag Table */
-#define ACPI_SIG_CSRT "CSRT" /* Core System Resource Table */
-#define ACPI_SIG_DBG2 "DBG2" /* Debug Port table type 2 */
-#define ACPI_SIG_DBGP "DBGP" /* Debug Port table */
-#define ACPI_SIG_DMAR "DMAR" /* DMA Remapping table */
-#define ACPI_SIG_HPET "HPET" /* High Precision Event Timer table */
-#define ACPI_SIG_IBFT "IBFT" /* iSCSI Boot Firmware Table */
#define ACPI_SIG_IORT "IORT" /* IO Remapping Table */
#define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */
#define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */
+#define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */
#define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */
#define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */
+#define ACPI_SIG_MPST "MPST" /* Memory Power State Table */
+#define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */
#define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */
#define ACPI_SIG_MTMR "MTMR" /* MID Timer table */
+#define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */
+#define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */
+#define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */
+#define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */
+#define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */
+#define ACPI_SIG_RASF "RASF" /* RAS Feature table */
+#define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */
#define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */
-#define ACPI_SIG_SLIC "SLIC" /* Software Licensing Description Table */
-#define ACPI_SIG_SPCR "SPCR" /* Serial Port Console Redirection table */
-#define ACPI_SIG_SPMI "SPMI" /* Server Platform Management Interface table */
-#define ACPI_SIG_TCPA "TCPA" /* Trusted Computing Platform Alliance table */
-#define ACPI_SIG_TPM2 "TPM2" /* Trusted Platform Module 2.0 H/W interface table */
-#define ACPI_SIG_UEFI "UEFI" /* Uefi Boot Optimization Table */
-#define ACPI_SIG_VRTC "VRTC" /* Virtual Real Time Clock Table */
-#define ACPI_SIG_WAET "WAET" /* Windows ACPI Emulated devices Table */
-#define ACPI_SIG_WDAT "WDAT" /* Watchdog Action Table */
-#define ACPI_SIG_WDDT "WDDT" /* Watchdog Timer Description Table */
-#define ACPI_SIG_WDRT "WDRT" /* Watchdog Resource Table */
-#define ACPI_SIG_WSMT "WSMT" /* Windows SMM Security Migrations Table */
-#define ACPI_SIG_XXXX "XXXX" /* Intermediate AML header for ASL/ASL+ converter */
-
-#ifdef ACPI_UNDEFINED_TABLES
-/*
- * These tables have been seen in the field, but no definition has been found
- */
-#define ACPI_SIG_ATKG "ATKG"
-#define ACPI_SIG_GSCI "GSCI" /* GMCH SCI table */
-#define ACPI_SIG_IEIT "IEIT"
-#endif
+#define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */
+
/*
* All tables must be byte-packed to match the ACPI specification, since
/*******************************************************************************
*
- * ASF - Alert Standard Format table (Signature "ASF!")
- * Revision 0x10
+ * IORT - IO Remapping Table
*
- * Conforms to the Alert Standard Format Specification V2.0, 23 April 2003
+ * Conforms to "IO Remapping Table System Software on ARM Platforms",
+ * Document number: ARM DEN 0049D, March 2018
*
******************************************************************************/
-typedef struct acpi_table_asf
+typedef struct acpi_table_iort
{
- ACPI_TABLE_HEADER Header; /* Common ACPI table header */
-
-} ACPI_TABLE_ASF;
+ ACPI_TABLE_HEADER Header;
+ UINT32 NodeCount;
+ UINT32 NodeOffset;
+ UINT32 Reserved;
+} ACPI_TABLE_IORT;
-/* ASF subtable header */
-typedef struct acpi_asf_header
+/*
+ * IORT subtables
+ */
+typedef struct acpi_iort_node
{
UINT8 Type;
- UINT8 Reserved;
UINT16 Length;
+ UINT8 Revision;
+ UINT32 Reserved;
+ UINT32 MappingCount;
+ UINT32 MappingOffset;
+ char NodeData[1];
-} ACPI_ASF_HEADER;
-
+} ACPI_IORT_NODE;
-/* Values for Type field above */
+/* Values for subtable Type above */
-enum AcpiAsfType
+enum AcpiIortNodeType
{
- ACPI_ASF_TYPE_INFO = 0,
- ACPI_ASF_TYPE_ALERT = 1,
- ACPI_ASF_TYPE_CONTROL = 2,
- ACPI_ASF_TYPE_BOOT = 3,
- ACPI_ASF_TYPE_ADDRESS = 4,
- ACPI_ASF_TYPE_RESERVED = 5
+ ACPI_IORT_NODE_ITS_GROUP = 0x00,
+ ACPI_IORT_NODE_NAMED_COMPONENT = 0x01,
+ ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02,
+ ACPI_IORT_NODE_SMMU = 0x03,
+ ACPI_IORT_NODE_SMMU_V3 = 0x04,
+ ACPI_IORT_NODE_PMCG = 0x05
};
-/*
- * ASF subtables
- */
-
-/* 0: ASF Information */
-typedef struct acpi_asf_info
+typedef struct acpi_iort_id_mapping
{
- ACPI_ASF_HEADER Header;
- UINT8 MinResetValue;
- UINT8 MinPollInterval;
- UINT16 SystemId;
- UINT32 MfgId;
- UINT8 Flags;
- UINT8 Reserved2[3];
-
-} ACPI_ASF_INFO;
-
-/* Masks for Flags field above */
-
-#define ACPI_ASF_SMBUS_PROTOCOLS (1)
+ UINT32 InputBase; /* Lowest value in input range */
+ UINT32 IdCount; /* Number of IDs */
+ UINT32 OutputBase; /* Lowest value in output range */
+ UINT32 OutputReference; /* A reference to the output node */
+ UINT32 Flags;
+} ACPI_IORT_ID_MAPPING;
-/* 1: ASF Alerts */
+/* Masks for Flags field above for IORT subtable */
-typedef struct acpi_asf_alert
-{
- ACPI_ASF_HEADER Header;
- UINT8 AssertMask;
- UINT8 DeassertMask;
- UINT8 Alerts;
- UINT8 DataLength;
+#define ACPI_IORT_ID_SINGLE_MAPPING (1)
-} ACPI_ASF_ALERT;
-typedef struct acpi_asf_alert_data
+typedef struct acpi_iort_memory_access
{
- UINT8 Address;
- UINT8 Command;
- UINT8 Mask;
- UINT8 Value;
- UINT8 SensorType;
- UINT8 Type;
- UINT8 Offset;
- UINT8 SourceType;
- UINT8 Severity;
- UINT8 SensorNumber;
- UINT8 Entity;
- UINT8 Instance;
-
-} ACPI_ASF_ALERT_DATA;
+ UINT32 CacheCoherency;
+ UINT8 Hints;
+ UINT16 Reserved;
+ UINT8 MemoryFlags;
+} ACPI_IORT_MEMORY_ACCESS;
-/* 2: ASF Remote Control */
+/* Values for CacheCoherency field above */
-typedef struct acpi_asf_remote
-{
- ACPI_ASF_HEADER Header;
- UINT8 Controls;
- UINT8 DataLength;
- UINT16 Reserved2;
+#define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */
+#define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */
-} ACPI_ASF_REMOTE;
+/* Masks for Hints field above */
-typedef struct acpi_asf_control_data
-{
- UINT8 Function;
- UINT8 Address;
- UINT8 Command;
- UINT8 Value;
+#define ACPI_IORT_HT_TRANSIENT (1)
+#define ACPI_IORT_HT_WRITE (1<<1)
+#define ACPI_IORT_HT_READ (1<<2)
+#define ACPI_IORT_HT_OVERRIDE (1<<3)
-} ACPI_ASF_CONTROL_DATA;
+/* Masks for MemoryFlags field above */
+#define ACPI_IORT_MF_COHERENCY (1)
+#define ACPI_IORT_MF_ATTRIBUTES (1<<1)
-/* 3: ASF RMCP Boot Options */
-typedef struct acpi_asf_rmcp
+/*
+ * IORT node specific subtables
+ */
+typedef struct acpi_iort_its_group
{
- ACPI_ASF_HEADER Header;
- UINT8 Capabilities[7];
- UINT8 CompletionCode;
- UINT32 EnterpriseId;
- UINT8 Command;
- UINT16 Parameter;
- UINT16 BootOptions;
- UINT16 OemParameters;
-
-} ACPI_ASF_RMCP;
+ UINT32 ItsCount;
+ UINT32 Identifiers[1]; /* GIC ITS identifier arrary */
+} ACPI_IORT_ITS_GROUP;
-/* 4: ASF Address */
-typedef struct acpi_asf_address
+typedef struct acpi_iort_named_component
{
- ACPI_ASF_HEADER Header;
- UINT8 EpromAddress;
- UINT8 Devices;
+ UINT32 NodeFlags;
+ UINT64 MemoryProperties; /* Memory access properties */
+ UINT8 MemoryAddressLimit; /* Memory address size limit */
+ char DeviceName[1]; /* Path of namespace object */
-} ACPI_ASF_ADDRESS;
+} ACPI_IORT_NAMED_COMPONENT;
+/* Masks for Flags field above */
-/*******************************************************************************
- *
- * BOOT - Simple Boot Flag Table
- * Version 1
- *
- * Conforms to the "Simple Boot Flag Specification", Version 2.1
- *
- ******************************************************************************/
+#define ACPI_IORT_NC_STALL_SUPPORTED (1)
+#define ACPI_IORT_NC_PASID_BITS (31<<1)
-typedef struct acpi_table_boot
+typedef struct acpi_iort_root_complex
{
- ACPI_TABLE_HEADER Header; /* Common ACPI table header */
- UINT8 CmosIndex; /* Index in CMOS RAM for the boot register */
- UINT8 Reserved[3];
+ UINT64 MemoryProperties; /* Memory access properties */
+ UINT32 AtsAttribute;
+ UINT32 PciSegmentNumber;
+ UINT8 MemoryAddressLimit; /* Memory address size limit */
+ UINT8 Reserved[3]; /* Reserved, must be zero */
-} ACPI_TABLE_BOOT;
+} ACPI_IORT_ROOT_COMPLEX;
+/* Values for AtsAttribute field above */
-/*******************************************************************************
- *
- * CSRT - Core System Resource Table
- * Version 0
- *
- * Conforms to the "Core System Resource Table (CSRT)", November 14, 2011
- *
- ******************************************************************************/
+#define ACPI_IORT_ATS_SUPPORTED 0x00000001 /* The root complex supports ATS */
+#define ACPI_IORT_ATS_UNSUPPORTED 0x00000000 /* The root complex doesn't support ATS */
-typedef struct acpi_table_csrt
-{
- ACPI_TABLE_HEADER Header; /* Common ACPI table header */
-} ACPI_TABLE_CSRT;
+typedef struct acpi_iort_smmu
+{
+ UINT64 BaseAddress; /* SMMU base address */
+ UINT64 Span; /* Length of memory range */
+ UINT32 Model;
+ UINT32 Flags;
+ UINT32 GlobalInterruptOffset;
+ UINT32 ContextInterruptCount;
+ UINT32 ContextInterruptOffset;
+ UINT32 PmuInterruptCount;
+ UINT32 PmuInterruptOffset;
+ UINT64 Interrupts[1]; /* Interrupt array */
+} ACPI_IORT_SMMU;
-/* Resource Group subtable */
+/* Values for Model field above */
-typedef struct acpi_csrt_group
-{
- UINT32 Length;
- UINT32 VendorId;
- UINT32 SubvendorId;
- UINT16 DeviceId;
- UINT16 SubdeviceId;
- UINT16 Revision;
- UINT16 Reserved;
- UINT32 SharedInfoLength;
+#define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */
+#define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */
+#define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */
+#define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */
+#define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */
+#define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium ThunderX SMMUv2 */
- /* Shared data immediately follows (Length = SharedInfoLength) */
+/* Masks for Flags field above */
-} ACPI_CSRT_GROUP;
+#define ACPI_IORT_SMMU_DVM_SUPPORTED (1)
+#define ACPI_IORT_SMMU_COHERENT_WALK (1<<1)
-/* Shared Info subtable */
+/* Global interrupt format */
-typedef struct acpi_csrt_shared_info
+typedef struct acpi_iort_smmu_gsi
{
- UINT16 MajorVersion;
- UINT16 MinorVersion;
- UINT32 MmioBaseLow;
- UINT32 MmioBaseHigh;
- UINT32 GsiInterrupt;
- UINT8 InterruptPolarity;
- UINT8 InterruptMode;
- UINT8 NumChannels;
- UINT8 DmaAddressWidth;
- UINT16 BaseRequestLine;
- UINT16 NumHandshakeSignals;
- UINT32 MaxBlockSize;
-
- /* Resource descriptors immediately follow (Length = Group Length - SharedInfoLength) */
+ UINT32 NSgIrpt;
+ UINT32 NSgIrptFlags;
+ UINT32 NSgCfgIrpt;
+ UINT32 NSgCfgIrptFlags;
-} ACPI_CSRT_SHARED_INFO;
+} ACPI_IORT_SMMU_GSI;
-/* Resource Descriptor subtable */
-typedef struct acpi_csrt_descriptor
+typedef struct acpi_iort_smmu_v3
{
- UINT32 Length;
- UINT16 Type;
- UINT16 Subtype;
- UINT32 Uid;
+ UINT64 BaseAddress; /* SMMUv3 base address */
+ UINT32 Flags;
+ UINT32 Reserved;
+ UINT64 VatosAddress;
+ UINT32 Model;
+ UINT32 EventGsiv;
+ UINT32 PriGsiv;
+ UINT32 GerrGsiv;
+ UINT32 SyncGsiv;
+ UINT32 Pxm;
+ UINT32 IdMappingIndex;
- /* Resource-specific information immediately follows */
+} ACPI_IORT_SMMU_V3;
-} ACPI_CSRT_DESCRIPTOR;
+/* Values for Model field above */
+#define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */
+#define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* HiSilicon Hi161x SMMUv3 */
+#define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */
-/* Resource Types */
+/* Masks for Flags field above */
-#define ACPI_CSRT_TYPE_INTERRUPT 0x0001
-#define ACPI_CSRT_TYPE_TIMER 0x0002
-#define ACPI_CSRT_TYPE_DMA 0x0003
+#define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1)
+#define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1)
+#define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3)
-/* Resource Subtypes */
+typedef struct acpi_iort_pmcg
+{
+ UINT64 Page0BaseAddress;
+ UINT32 OverflowGsiv;
+ UINT32 NodeReference;
+ UINT64 Page1BaseAddress;
-#define ACPI_CSRT_XRUPT_LINE 0x0000
-#define ACPI_CSRT_XRUPT_CONTROLLER 0x0001
-#define ACPI_CSRT_TIMER 0x0000
-#define ACPI_CSRT_DMA_CHANNEL 0x0000
-#define ACPI_CSRT_DMA_CONTROLLER 0x0001
+} ACPI_IORT_PMCG;
/*******************************************************************************
*
- * DBG2 - Debug Port Table 2
- * Version 0 (Both main table and subtables)
+ * IVRS - I/O Virtualization Reporting Structure
+ * Version 1
*
- * Conforms to "Microsoft Debug Port Table 2 (DBG2)", December 10, 2015
+ * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification",
+ * Revision 1.26, February 2009.
*
******************************************************************************/
-typedef struct acpi_table_dbg2
+typedef struct acpi_table_ivrs
{
ACPI_TABLE_HEADER Header; /* Common ACPI table header */
- UINT32 InfoOffset;
- UINT32 InfoCount;
-
-} ACPI_TABLE_DBG2;
+ UINT32 Info; /* Common virtualization info */
+ UINT64 Reserved;
+} ACPI_TABLE_IVRS;
-typedef struct acpi_dbg2_header
-{
- UINT32 InfoOffset;
- UINT32 InfoCount;
+/* Values for Info field above */
-} ACPI_DBG2_HEADER;
+#define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */
+#define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */
+#define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */
-/* Debug Device Information Subtable */
+/* IVRS subtable header */
-typedef struct acpi_dbg2_device
+typedef struct acpi_ivrs_header
{
- UINT8 Revision;
- UINT16 Length;
- UINT8 RegisterCount; /* Number of BaseAddress registers */
- UINT16 NamepathLength;
- UINT16 NamepathOffset;
- UINT16 OemDataLength;
- UINT16 OemDataOffset;
- UINT16 PortType;
- UINT16 PortSubtype;
- UINT16 Reserved;
- UINT16 BaseAddressOffset;
- UINT16 AddressSizeOffset;
- /*
- * Data that follows:
- * BaseAddress (required) - Each in 12-byte Generic Address Structure format.
- * AddressSize (required) - Array of UINT32 sizes corresponding to each BaseAddress register.
- * Namepath (required) - Null terminated string. Single dot if not supported.
- * OemData (optional) - Length is OemDataLength.
- */
-} ACPI_DBG2_DEVICE;
-
-/* Types for PortType field above */
-
-#define ACPI_DBG2_SERIAL_PORT 0x8000
-#define ACPI_DBG2_1394_PORT 0x8001
-#define ACPI_DBG2_USB_PORT 0x8002
-#define ACPI_DBG2_NET_PORT 0x8003
+ UINT8 Type; /* Subtable type */
+ UINT8 Flags;
+ UINT16 Length; /* Subtable length */
+ UINT16 DeviceId; /* ID of IOMMU */
-/* Subtypes for PortSubtype field above */
+} ACPI_IVRS_HEADER;
-#define ACPI_DBG2_16550_COMPATIBLE 0x0000
-#define ACPI_DBG2_16550_SUBSET 0x0001
-#define ACPI_DBG2_ARM_PL011 0x0003
-#define ACPI_DBG2_ARM_SBSA_32BIT 0x000D
-#define ACPI_DBG2_ARM_SBSA_GENERIC 0x000E
-#define ACPI_DBG2_ARM_DCC 0x000F
-#define ACPI_DBG2_BCM2835 0x0010
+/* Values for subtable Type above */
-#define ACPI_DBG2_1394_STANDARD 0x0000
+enum AcpiIvrsType
+{
+ ACPI_IVRS_TYPE_HARDWARE = 0x10,
+ ACPI_IVRS_TYPE_MEMORY1 = 0x20,
+ ACPI_IVRS_TYPE_MEMORY2 = 0x21,
+ ACPI_IVRS_TYPE_MEMORY3 = 0x22
+};
-#define ACPI_DBG2_USB_XHCI 0x0000
-#define ACPI_DBG2_USB_EHCI 0x0001
+/* Masks for Flags field above for IVHD subtable */
+#define ACPI_IVHD_TT_ENABLE (1)
+#define ACPI_IVHD_PASS_PW (1<<1)
+#define ACPI_IVHD_RES_PASS_PW (1<<2)
+#define ACPI_IVHD_ISOC (1<<3)
+#define ACPI_IVHD_IOTLB (1<<4)
-/*******************************************************************************
- *
- * DBGP - Debug Port table
- * Version 1
- *
- * Conforms to the "Debug Port Specification", Version 1.00, 2/9/2000
- *
- ******************************************************************************/
+/* Masks for Flags field above for IVMD subtable */
-typedef struct acpi_table_dbgp
-{
- ACPI_TABLE_HEADER Header; /* Common ACPI table header */
- UINT8 Type; /* 0=full 16550, 1=subset of 16550 */
- UINT8 Reserved[3];
- ACPI_GENERIC_ADDRESS DebugPort;
+#define ACPI_IVMD_UNITY (1)
+#define ACPI_IVMD_READ (1<<1)
+#define ACPI_IVMD_WRITE (1<<2)
+#define ACPI_IVMD_EXCLUSION_RANGE (1<<3)
-} ACPI_TABLE_DBGP;
+/*
+ * IVRS subtables, correspond to Type in ACPI_IVRS_HEADER
+ */
-/*******************************************************************************
- *
- * DMAR - DMA Remapping table
- * Version 1
- *
- * Conforms to "Intel Virtualization Technology for Directed I/O",
- * Version 2.3, October 2014
- *
- ******************************************************************************/
+/* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */
-typedef struct acpi_table_dmar
+typedef struct acpi_ivrs_hardware
{
- ACPI_TABLE_HEADER Header; /* Common ACPI table header */
- UINT8 Width; /* Host Address Width */
- UINT8 Flags;
- UINT8 Reserved[10];
-
-} ACPI_TABLE_DMAR;
+ ACPI_IVRS_HEADER Header;
+ UINT16 CapabilityOffset; /* Offset for IOMMU control fields */
+ UINT64 BaseAddress; /* IOMMU control registers */
+ UINT16 PciSegmentGroup;
+ UINT16 Info; /* MSI number and unit ID */
+ UINT32 Reserved;
-/* Masks for Flags field above */
+} ACPI_IVRS_HARDWARE;
-#define ACPI_DMAR_INTR_REMAP (1)
-#define ACPI_DMAR_X2APIC_OPT_OUT (1<<1)
-#define ACPI_DMAR_X2APIC_MODE (1<<2)
+/* Masks for Info field above */
+#define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */
+#define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, UnitID */
-/* DMAR subtable header */
-typedef struct acpi_dmar_header
-{
- UINT16 Type;
- UINT16 Length;
-
-} ACPI_DMAR_HEADER;
+/*
+ * Device Entries for IVHD subtable, appear after ACPI_IVRS_HARDWARE structure.
+ * Upper two bits of the Type field are the (encoded) length of the structure.
+ * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries
+ * are reserved for future use but not defined.
+ */
+typedef struct acpi_ivrs_de_header
+{
+ UINT8 Type;
+ UINT16 Id;
+ UINT8 DataSetting;
-/* Values for subtable type in ACPI_DMAR_HEADER */
+} ACPI_IVRS_DE_HEADER;
-enum AcpiDmarType
-{
- ACPI_DMAR_TYPE_HARDWARE_UNIT = 0,
- ACPI_DMAR_TYPE_RESERVED_MEMORY = 1,
- ACPI_DMAR_TYPE_ROOT_ATS = 2,
- ACPI_DMAR_TYPE_HARDWARE_AFFINITY = 3,
- ACPI_DMAR_TYPE_NAMESPACE = 4,
- ACPI_DMAR_TYPE_RESERVED = 5 /* 5 and greater are reserved */
-};
+/* Length of device entry is in the top two bits of Type field above */
+#define ACPI_IVHD_ENTRY_LENGTH 0xC0
-/* DMAR Device Scope structure */
+/* Values for device entry Type field above */
-typedef struct acpi_dmar_device_scope
+enum AcpiIvrsDeviceEntryType
{
- UINT8 EntryType;
- UINT8 Length;
- UINT16 Reserved;
- UINT8 EnumerationId;
- UINT8 Bus;
+ /* 4-byte device entries, all use ACPI_IVRS_DEVICE4 */
-} ACPI_DMAR_DEVICE_SCOPE;
+ ACPI_IVRS_TYPE_PAD4 = 0,
+ ACPI_IVRS_TYPE_ALL = 1,
+ ACPI_IVRS_TYPE_SELECT = 2,
+ ACPI_IVRS_TYPE_START = 3,
+ ACPI_IVRS_TYPE_END = 4,
-/* Values for EntryType in ACPI_DMAR_DEVICE_SCOPE - device types */
+ /* 8-byte device entries */
-enum AcpiDmarScopeType
-{
- ACPI_DMAR_SCOPE_TYPE_NOT_USED = 0,
- ACPI_DMAR_SCOPE_TYPE_ENDPOINT = 1,
- ACPI_DMAR_SCOPE_TYPE_BRIDGE = 2,
- ACPI_DMAR_SCOPE_TYPE_IOAPIC = 3,
- ACPI_DMAR_SCOPE_TYPE_HPET = 4,
- ACPI_DMAR_SCOPE_TYPE_NAMESPACE = 5,
- ACPI_DMAR_SCOPE_TYPE_RESERVED = 6 /* 6 and greater are reserved */
+ ACPI_IVRS_TYPE_PAD8 = 64,
+ ACPI_IVRS_TYPE_NOT_USED = 65,
+ ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses ACPI_IVRS_DEVICE8A */
+ ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses ACPI_IVRS_DEVICE8A */
+ ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses ACPI_IVRS_DEVICE8B */
+ ACPI_IVRS_TYPE_EXT_START = 71, /* Uses ACPI_IVRS_DEVICE8B */
+ ACPI_IVRS_TYPE_SPECIAL = 72 /* Uses ACPI_IVRS_DEVICE8C */
};
-typedef struct acpi_dmar_pci_path
-{
- UINT8 Device;
- UINT8 Function;
-
-} ACPI_DMAR_PCI_PATH;
+/* Values for Data field above */
+#define ACPI_IVHD_INIT_PASS (1)
+#define ACPI_IVHD_EINT_PASS (1<<1)
+#define ACPI_IVHD_NMI_PASS (1<<2)
+#define ACPI_IVHD_SYSTEM_MGMT (3<<4)
+#define ACPI_IVHD_LINT0_PASS (1<<6)
+#define ACPI_IVHD_LINT1_PASS (1<<7)
-/*
- * DMAR Subtables, correspond to Type in ACPI_DMAR_HEADER
- */
-/* 0: Hardware Unit Definition */
+/* Types 0-4: 4-byte device entry */
-typedef struct acpi_dmar_hardware_unit
+typedef struct acpi_ivrs_device4
{
- ACPI_DMAR_HEADER Header;
- UINT8 Flags;
- UINT8 Reserved;
- UINT16 Segment;
- UINT64 Address; /* Register Base Address */
+ ACPI_IVRS_DE_HEADER Header;
-} ACPI_DMAR_HARDWARE_UNIT;
+} ACPI_IVRS_DEVICE4;
-/* Masks for Flags field above */
+/* Types 66-67: 8-byte device entry */
-#define ACPI_DMAR_INCLUDE_ALL (1)
+typedef struct acpi_ivrs_device8a
+{
+ ACPI_IVRS_DE_HEADER Header;
+ UINT8 Reserved1;
+ UINT16 UsedId;
+ UINT8 Reserved2;
+} ACPI_IVRS_DEVICE8A;
-/* 1: Reserved Memory Defininition */
+/* Types 70-71: 8-byte device entry */
-typedef struct acpi_dmar_reserved_memory
+typedef struct acpi_ivrs_device8b
{
- ACPI_DMAR_HEADER Header;
- UINT16 Reserved;
- UINT16 Segment;
- UINT64 BaseAddress; /* 4K aligned base address */
- UINT64 EndAddress; /* 4K aligned limit address */
-
-} ACPI_DMAR_RESERVED_MEMORY;
+ ACPI_IVRS_DE_HEADER Header;
+ UINT32 ExtendedData;
-/* Masks for Flags field above */
+} ACPI_IVRS_DEVICE8B;
-#define ACPI_DMAR_ALLOW_ALL (1)
+/* Values for ExtendedData above */
+#define ACPI_IVHD_ATS_DISABLED (1<<31)
-/* 2: Root Port ATS Capability Reporting Structure */
+/* Type 72: 8-byte device entry */
-typedef struct acpi_dmar_atsr
+typedef struct acpi_ivrs_device8c
{
- ACPI_DMAR_HEADER Header;
- UINT8 Flags;
- UINT8 Reserved;
- UINT16 Segment;
-
-} ACPI_DMAR_ATSR;
-
-/* Masks for Flags field above */
-
-#define ACPI_DMAR_ALL_PORTS (1)
-
+ ACPI_IVRS_DE_HEADER Header;
+ UINT8 Handle;
+ UINT16 UsedId;
+ UINT8 Variety;
-/* 3: Remapping Hardware Static Affinity Structure */
+} ACPI_IVRS_DEVICE8C;
-typedef struct acpi_dmar_rhsa
-{
- ACPI_DMAR_HEADER Header;
- UINT32 Reserved;
- UINT64 BaseAddress;
- UINT32 ProximityDomain;
+/* Values for Variety field above */
-} ACPI_DMAR_RHSA;
+#define ACPI_IVHD_IOAPIC 1
+#define ACPI_IVHD_HPET 2
-/* 4: ACPI Namespace Device Declaration Structure */
+/* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */
-typedef struct acpi_dmar_andd
+typedef struct acpi_ivrs_memory
{
- ACPI_DMAR_HEADER Header;
- UINT8 Reserved[3];
- UINT8 DeviceNumber;
- char DeviceName[1];
+ ACPI_IVRS_HEADER Header;
+ UINT16 AuxData;
+ UINT64 Reserved;
+ UINT64 StartAddress;
+ UINT64 MemoryLength;
-} ACPI_DMAR_ANDD;
+} ACPI_IVRS_MEMORY;
/*******************************************************************************
*
- * HPET - High Precision Event Timer table
- * Version 1
+ * LPIT - Low Power Idle Table
*
- * Conforms to "IA-PC HPET (High Precision Event Timers) Specification",
- * Version 1.0a, October 2004
+ * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014.
*
******************************************************************************/
-typedef struct acpi_table_hpet
+typedef struct acpi_table_lpit
{
ACPI_TABLE_HEADER Header; /* Common ACPI table header */
- UINT32 Id; /* Hardware ID of event timer block */
- ACPI_GENERIC_ADDRESS Address; /* Address of event timer block */
- UINT8 Sequence; /* HPET sequence number */
- UINT16 MinimumTick; /* Main counter min tick, periodic mode */
- UINT8 Flags;
-} ACPI_TABLE_HPET;
+} ACPI_TABLE_LPIT;
-/* Masks for Flags field above */
-#define ACPI_HPET_PAGE_PROTECT_MASK (3)
+/* LPIT subtable header */
+
+typedef struct acpi_lpit_header
+{
+ UINT32 Type; /* Subtable type */
+ UINT32 Length; /* Subtable length */
+ UINT16 UniqueId;
+ UINT16 Reserved;
+ UINT32 Flags;
+
+} ACPI_LPIT_HEADER;
-/* Values for Page Protect flags */
+/* Values for subtable Type above */
-enum AcpiHpetPageProtect
+enum AcpiLpitType
{
- ACPI_HPET_NO_PAGE_PROTECT = 0,
- ACPI_HPET_PAGE_PROTECT4 = 1,
- ACPI_HPET_PAGE_PROTECT64 = 2
+ ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00,
+ ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */
};
+/* Masks for Flags field above */
+
+#define ACPI_LPIT_STATE_DISABLED (1)
+#define ACPI_LPIT_NO_COUNTER (1<<1)
+
+/*
+ * LPIT subtables, correspond to Type in ACPI_LPIT_HEADER
+ */
+
+/* 0x00: Native C-state instruction based LPI structure */
+
+typedef struct acpi_lpit_native
+{
+ ACPI_LPIT_HEADER Header;
+ ACPI_GENERIC_ADDRESS EntryTrigger;
+ UINT32 Residency;
+ UINT32 Latency;
+ ACPI_GENERIC_ADDRESS ResidencyCounter;
+ UINT64 CounterFrequency;
+
+} ACPI_LPIT_NATIVE;
+
/*******************************************************************************
*
- * IBFT - Boot Firmware Table
- * Version 1
- *
- * Conforms to "iSCSI Boot Firmware Table (iBFT) as Defined in ACPI 3.0b
- * Specification", Version 1.01, March 1, 2007
- *
- * Note: It appears that this table is not intended to appear in the RSDT/XSDT.
- * Therefore, it is not currently supported by the disassembler.
+ * MADT - Multiple APIC Description Table
+ * Version 3
*
******************************************************************************/
-typedef struct acpi_table_ibft
+typedef struct acpi_table_madt
{
ACPI_TABLE_HEADER Header; /* Common ACPI table header */
- UINT8 Reserved[12];
+ UINT32 Address; /* Physical address of local APIC */
+ UINT32 Flags;
-} ACPI_TABLE_IBFT;
+} ACPI_TABLE_MADT;
+/* Masks for Flags field above */
-/* IBFT common subtable header */
+#define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */
-typedef struct acpi_ibft_header
-{
- UINT8 Type;
- UINT8 Version;
- UINT16 Length;
- UINT8 Index;
- UINT8 Flags;
+/* Values for PCATCompat flag */
-} ACPI_IBFT_HEADER;
+#define ACPI_MADT_DUAL_PIC 1
+#define ACPI_MADT_MULTIPLE_APIC 0
-/* Values for Type field above */
-enum AcpiIbftType
+/* Values for MADT subtable type in ACPI_SUBTABLE_HEADER */
+
+enum AcpiMadtType
{
- ACPI_IBFT_TYPE_NOT_USED = 0,
- ACPI_IBFT_TYPE_CONTROL = 1,
- ACPI_IBFT_TYPE_INITIATOR = 2,
- ACPI_IBFT_TYPE_NIC = 3,
- ACPI_IBFT_TYPE_TARGET = 4,
- ACPI_IBFT_TYPE_EXTENSIONS = 5,
- ACPI_IBFT_TYPE_RESERVED = 6 /* 6 and greater are reserved */
+ ACPI_MADT_TYPE_LOCAL_APIC = 0,
+ ACPI_MADT_TYPE_IO_APIC = 1,
+ ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2,
+ ACPI_MADT_TYPE_NMI_SOURCE = 3,
+ ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4,
+ ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5,
+ ACPI_MADT_TYPE_IO_SAPIC = 6,
+ ACPI_MADT_TYPE_LOCAL_SAPIC = 7,
+ ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8,
+ ACPI_MADT_TYPE_LOCAL_X2APIC = 9,
+ ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10,
+ ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11,
+ ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12,
+ ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13,
+ ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14,
+ ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15,
+ ACPI_MADT_TYPE_RESERVED = 16 /* 16 and greater are reserved */
};
-/* IBFT subtables */
-
-typedef struct acpi_ibft_control
-{
- ACPI_IBFT_HEADER Header;
- UINT16 Extensions;
- UINT16 InitiatorOffset;
- UINT16 Nic0Offset;
- UINT16 Target0Offset;
- UINT16 Nic1Offset;
- UINT16 Target1Offset;
-
-} ACPI_IBFT_CONTROL;
-
-typedef struct acpi_ibft_initiator
-{
- ACPI_IBFT_HEADER Header;
- UINT8 SnsServer[16];
- UINT8 SlpServer[16];
- UINT8 PrimaryServer[16];
- UINT8 SecondaryServer[16];
- UINT16 NameLength;
- UINT16 NameOffset;
-
-} ACPI_IBFT_INITIATOR;
-
-typedef struct acpi_ibft_nic
-{
- ACPI_IBFT_HEADER Header;
- UINT8 IpAddress[16];
- UINT8 SubnetMaskPrefix;
- UINT8 Origin;
- UINT8 Gateway[16];
- UINT8 PrimaryDns[16];
- UINT8 SecondaryDns[16];
- UINT8 Dhcp[16];
- UINT16 Vlan;
- UINT8 MacAddress[6];
- UINT16 PciAddress;
- UINT16 NameLength;
- UINT16 NameOffset;
-
-} ACPI_IBFT_NIC;
-
-typedef struct acpi_ibft_target
-{
- ACPI_IBFT_HEADER Header;
- UINT8 TargetIpAddress[16];
- UINT16 TargetIpSocket;
- UINT8 TargetBootLun[8];
- UINT8 ChapType;
- UINT8 NicAssociation;
- UINT16 TargetNameLength;
- UINT16 TargetNameOffset;
- UINT16 ChapNameLength;
- UINT16 ChapNameOffset;
- UINT16 ChapSecretLength;
- UINT16 ChapSecretOffset;
- UINT16 ReverseChapNameLength;
- UINT16 ReverseChapNameOffset;
- UINT16 ReverseChapSecretLength;
- UINT16 ReverseChapSecretOffset;
-
-} ACPI_IBFT_TARGET;
-
+/*
+ * MADT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER
+ */
-/*******************************************************************************
- *
- * IORT - IO Remapping Table
- *
- * Conforms to "IO Remapping Table System Software on ARM Platforms",
- * Document number: ARM DEN 0049C, May 2017
- *
- ******************************************************************************/
+/* 0: Processor Local APIC */
-typedef struct acpi_table_iort
+typedef struct acpi_madt_local_apic
{
- ACPI_TABLE_HEADER Header;
- UINT32 NodeCount;
- UINT32 NodeOffset;
- UINT32 Reserved;
+ ACPI_SUBTABLE_HEADER Header;
+ UINT8 ProcessorId; /* ACPI processor id */
+ UINT8 Id; /* Processor's local APIC id */
+ UINT32 LapicFlags;
-} ACPI_TABLE_IORT;
+} ACPI_MADT_LOCAL_APIC;
-/*
- * IORT subtables
- */
-typedef struct acpi_iort_node
+/* 1: IO APIC */
+
+typedef struct acpi_madt_io_apic
{
- UINT8 Type;
- UINT16 Length;
- UINT8 Revision;
- UINT32 Reserved;
- UINT32 MappingCount;
- UINT32 MappingOffset;
- char NodeData[1];
+ ACPI_SUBTABLE_HEADER Header;
+ UINT8 Id; /* I/O APIC ID */
+ UINT8 Reserved; /* Reserved - must be zero */
+ UINT32 Address; /* APIC physical address */
+ UINT32 GlobalIrqBase; /* Global system interrupt where INTI lines start */
-} ACPI_IORT_NODE;
+} ACPI_MADT_IO_APIC;
-/* Values for subtable Type above */
-enum AcpiIortNodeType
+/* 2: Interrupt Override */
+
+typedef struct acpi_madt_interrupt_override
{
- ACPI_IORT_NODE_ITS_GROUP = 0x00,
- ACPI_IORT_NODE_NAMED_COMPONENT = 0x01,
- ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02,
- ACPI_IORT_NODE_SMMU = 0x03,
- ACPI_IORT_NODE_SMMU_V3 = 0x04
-};
+ ACPI_SUBTABLE_HEADER Header;
+ UINT8 Bus; /* 0 - ISA */
+ UINT8 SourceIrq; /* Interrupt source (IRQ) */
+ UINT32 GlobalIrq; /* Global system interrupt */
+ UINT16 IntiFlags;
+} ACPI_MADT_INTERRUPT_OVERRIDE;
-typedef struct acpi_iort_id_mapping
-{
- UINT32 InputBase; /* Lowest value in input range */
- UINT32 IdCount; /* Number of IDs */
- UINT32 OutputBase; /* Lowest value in output range */
- UINT32 OutputReference; /* A reference to the output node */
- UINT32 Flags;
-} ACPI_IORT_ID_MAPPING;
+/* 3: NMI Source */
-/* Masks for Flags field above for IORT subtable */
+typedef struct acpi_madt_nmi_source
+{
+ ACPI_SUBTABLE_HEADER Header;
+ UINT16 IntiFlags;
+ UINT32 GlobalIrq; /* Global system interrupt */
-#define ACPI_IORT_ID_SINGLE_MAPPING (1)
+} ACPI_MADT_NMI_SOURCE;
-typedef struct acpi_iort_memory_access
-{
- UINT32 CacheCoherency;
- UINT8 Hints;
- UINT16 Reserved;
- UINT8 MemoryFlags;
+/* 4: Local APIC NMI */
-} ACPI_IORT_MEMORY_ACCESS;
+typedef struct acpi_madt_local_apic_nmi
+{
+ ACPI_SUBTABLE_HEADER Header;
+ UINT8 ProcessorId; /* ACPI processor id */
+ UINT16 IntiFlags;
+ UINT8 Lint; /* LINTn to which NMI is connected */
-/* Values for CacheCoherency field above */
+} ACPI_MADT_LOCAL_APIC_NMI;
-#define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */
-#define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */
-/* Masks for Hints field above */
+/* 5: Address Override */
-#define ACPI_IORT_HT_TRANSIENT (1)
-#define ACPI_IORT_HT_WRITE (1<<1)
-#define ACPI_IORT_HT_READ (1<<2)
-#define ACPI_IORT_HT_OVERRIDE (1<<3)
+typedef struct acpi_madt_local_apic_override
+{
+ ACPI_SUBTABLE_HEADER Header;
+ UINT16 Reserved; /* Reserved, must be zero */
+ UINT64 Address; /* APIC physical address */
-/* Masks for MemoryFlags field above */
+} ACPI_MADT_LOCAL_APIC_OVERRIDE;
-#define ACPI_IORT_MF_COHERENCY (1)
-#define ACPI_IORT_MF_ATTRIBUTES (1<<1)
+/* 6: I/O Sapic */
-/*
- * IORT node specific subtables
- */
-typedef struct acpi_iort_its_group
+typedef struct acpi_madt_io_sapic
{
- UINT32 ItsCount;
- UINT32 Identifiers[1]; /* GIC ITS identifier arrary */
+ ACPI_SUBTABLE_HEADER Header;
+ UINT8 Id; /* I/O SAPIC ID */
+ UINT8 Reserved; /* Reserved, must be zero */
+ UINT32 GlobalIrqBase; /* Global interrupt for SAPIC start */
+ UINT64 Address; /* SAPIC physical address */
-} ACPI_IORT_ITS_GROUP;
+} ACPI_MADT_IO_SAPIC;
-typedef struct acpi_iort_named_component
+/* 7: Local Sapic */
+
+typedef struct acpi_madt_local_sapic
{
- UINT32 NodeFlags;
- UINT64 MemoryProperties; /* Memory access properties */
- UINT8 MemoryAddressLimit; /* Memory address size limit */
- char DeviceName[1]; /* Path of namespace object */
+ ACPI_SUBTABLE_HEADER Header;
+ UINT8 ProcessorId; /* ACPI processor id */
+ UINT8 Id; /* SAPIC ID */
+ UINT8 Eid; /* SAPIC EID */
+ UINT8 Reserved[3]; /* Reserved, must be zero */
+ UINT32 LapicFlags;
+ UINT32 Uid; /* Numeric UID - ACPI 3.0 */
+ char UidString[1]; /* String UID - ACPI 3.0 */
-} ACPI_IORT_NAMED_COMPONENT;
+} ACPI_MADT_LOCAL_SAPIC;
-typedef struct acpi_iort_root_complex
+/* 8: Platform Interrupt Source */
+
+typedef struct acpi_madt_interrupt_source
{
- UINT64 MemoryProperties; /* Memory access properties */
- UINT32 AtsAttribute;
- UINT32 PciSegmentNumber;
+ ACPI_SUBTABLE_HEADER Header;
+ UINT16 IntiFlags;
+ UINT8 Type; /* 1=PMI, 2=INIT, 3=corrected */
+ UINT8 Id; /* Processor ID */
+ UINT8 Eid; /* Processor EID */
+ UINT8 IoSapicVector; /* Vector value for PMI interrupts */
+ UINT32 GlobalIrq; /* Global system interrupt */
+ UINT32 Flags; /* Interrupt Source Flags */
-} ACPI_IORT_ROOT_COMPLEX;
+} ACPI_MADT_INTERRUPT_SOURCE;
-/* Values for AtsAttribute field above */
+/* Masks for Flags field above */
-#define ACPI_IORT_ATS_SUPPORTED 0x00000001 /* The root complex supports ATS */
-#define ACPI_IORT_ATS_UNSUPPORTED 0x00000000 /* The root complex doesn't support ATS */
+#define ACPI_MADT_CPEI_OVERRIDE (1)
-typedef struct acpi_iort_smmu
+/* 9: Processor Local X2APIC (ACPI 4.0) */
+
+typedef struct acpi_madt_local_x2apic
{
- UINT64 BaseAddress; /* SMMU base address */
- UINT64 Span; /* Length of memory range */
- UINT32 Model;
- UINT32 Flags;
- UINT32 GlobalInterruptOffset;
- UINT32 ContextInterruptCount;
- UINT32 ContextInterruptOffset;
- UINT32 PmuInterruptCount;
- UINT32 PmuInterruptOffset;
- UINT64 Interrupts[1]; /* Interrupt array */
+ ACPI_SUBTABLE_HEADER Header;
+ UINT16 Reserved; /* Reserved - must be zero */
+ UINT32 LocalApicId; /* Processor x2APIC ID */
+ UINT32 LapicFlags;
+ UINT32 Uid; /* ACPI processor UID */
-} ACPI_IORT_SMMU;
+} ACPI_MADT_LOCAL_X2APIC;
-/* Values for Model field above */
-#define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */
-#define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */
-#define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */
-#define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */
-#define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */
-#define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium ThunderX SMMUv2 */
+/* 10: Local X2APIC NMI (ACPI 4.0) */
+
+typedef struct acpi_madt_local_x2apic_nmi
+{
+ ACPI_SUBTABLE_HEADER Header;
+ UINT16 IntiFlags;
+ UINT32 Uid; /* ACPI processor UID */
+ UINT8 Lint; /* LINTn to which NMI is connected */
+ UINT8 Reserved[3]; /* Reserved - must be zero */
+
+} ACPI_MADT_LOCAL_X2APIC_NMI;
+
+
+/* 11: Generic Interrupt (ACPI 5.0 + ACPI 6.0 changes) */
+
+typedef struct acpi_madt_generic_interrupt
+{
+ ACPI_SUBTABLE_HEADER Header;
+ UINT16 Reserved; /* Reserved - must be zero */
+ UINT32 CpuInterfaceNumber;
+ UINT32 Uid;
+ UINT32 Flags;
+ UINT32 ParkingVersion;
+ UINT32 PerformanceInterrupt;
+ UINT64 ParkedAddress;
+ UINT64 BaseAddress;
+ UINT64 GicvBaseAddress;
+ UINT64 GichBaseAddress;
+ UINT32 VgicInterrupt;
+ UINT64 GicrBaseAddress;
+ UINT64 ArmMpidr;
+ UINT8 EfficiencyClass;
+ UINT8 Reserved2[3];
+
+} ACPI_MADT_GENERIC_INTERRUPT;
/* Masks for Flags field above */
-#define ACPI_IORT_SMMU_DVM_SUPPORTED (1)
-#define ACPI_IORT_SMMU_COHERENT_WALK (1<<1)
+/* ACPI_MADT_ENABLED (1) Processor is usable if set */
+#define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */
+#define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */
-/* Global interrupt format */
-typedef struct acpi_iort_smmu_gsi
+/* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */
+
+typedef struct acpi_madt_generic_distributor
{
- UINT32 NSgIrpt;
- UINT32 NSgIrptFlags;
- UINT32 NSgCfgIrpt;
- UINT32 NSgCfgIrptFlags;
+ ACPI_SUBTABLE_HEADER Header;
+ UINT16 Reserved; /* Reserved - must be zero */
+ UINT32 GicId;
+ UINT64 BaseAddress;
+ UINT32 GlobalIrqBase;
+ UINT8 Version;
+ UINT8 Reserved2[3]; /* Reserved - must be zero */
-} ACPI_IORT_SMMU_GSI;
+} ACPI_MADT_GENERIC_DISTRIBUTOR;
+/* Values for Version field above */
-typedef struct acpi_iort_smmu_v3
+enum AcpiMadtGicVersion
{
- UINT64 BaseAddress; /* SMMUv3 base address */
- UINT32 Flags;
- UINT32 Reserved;
- UINT64 VatosAddress;
- UINT32 Model;
- UINT32 EventGsiv;
- UINT32 PriGsiv;
- UINT32 GerrGsiv;
- UINT32 SyncGsiv;
- UINT8 Pxm;
- UINT8 Reserved1;
- UINT16 Reserved2;
- UINT32 IdMappingIndex;
+ ACPI_MADT_GIC_VERSION_NONE = 0,
+ ACPI_MADT_GIC_VERSION_V1 = 1,
+ ACPI_MADT_GIC_VERSION_V2 = 2,
+ ACPI_MADT_GIC_VERSION_V3 = 3,
+ ACPI_MADT_GIC_VERSION_V4 = 4,
+ ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */
+};
-} ACPI_IORT_SMMU_V3;
-/* Values for Model field above */
+/* 13: Generic MSI Frame (ACPI 5.1) */
-#define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */
-#define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* HiSilicon Hi161x SMMUv3 */
-#define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */
+typedef struct acpi_madt_generic_msi_frame
+{
+ ACPI_SUBTABLE_HEADER Header;
+ UINT16 Reserved; /* Reserved - must be zero */
+ UINT32 MsiFrameId;
+ UINT64 BaseAddress;
+ UINT32 Flags;
+ UINT16 SpiCount;
+ UINT16 SpiBase;
+
+} ACPI_MADT_GENERIC_MSI_FRAME;
/* Masks for Flags field above */
-#define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1)
-#define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (1<<1)
-#define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3)
+#define ACPI_MADT_OVERRIDE_SPI_VALUES (1)
+
+
+/* 14: Generic Redistributor (ACPI 5.1) */
+
+typedef struct acpi_madt_generic_redistributor
+{
+ ACPI_SUBTABLE_HEADER Header;
+ UINT16 Reserved; /* reserved - must be zero */
+ UINT64 BaseAddress;
+ UINT32 Length;
+
+} ACPI_MADT_GENERIC_REDISTRIBUTOR;
+
+
+/* 15: Generic Translator (ACPI 6.0) */
+
+typedef struct acpi_madt_generic_translator
+{
+ ACPI_SUBTABLE_HEADER Header;
+ UINT16 Reserved; /* reserved - must be zero */
+ UINT32 TranslationId;
+ UINT64 BaseAddress;
+ UINT32 Reserved2;
+
+} ACPI_MADT_GENERIC_TRANSLATOR;
+
+
+/*
+ * Common flags fields for MADT subtables
+ */
+
+/* MADT Local APIC flags */
+
+#define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */
+
+/* MADT MPS INTI flags (IntiFlags) */
+
+#define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */
+#define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */
+
+/* Values for MPS INTI flags */
+
+#define ACPI_MADT_POLARITY_CONFORMS 0
+#define ACPI_MADT_POLARITY_ACTIVE_HIGH 1
+#define ACPI_MADT_POLARITY_RESERVED 2
+#define ACPI_MADT_POLARITY_ACTIVE_LOW 3
+
+#define ACPI_MADT_TRIGGER_CONFORMS (0)
+#define ACPI_MADT_TRIGGER_EDGE (1<<2)
+#define ACPI_MADT_TRIGGER_RESERVED (2<<2)
+#define ACPI_MADT_TRIGGER_LEVEL (3<<2)
/*******************************************************************************
*
- * IVRS - I/O Virtualization Reporting Structure
+ * MCFG - PCI Memory Mapped Configuration table and subtable
* Version 1
*
- * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification",
- * Revision 1.26, February 2009.
+ * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005
*
******************************************************************************/
-typedef struct acpi_table_ivrs
+typedef struct acpi_table_mcfg
{
ACPI_TABLE_HEADER Header; /* Common ACPI table header */
- UINT32 Info; /* Common virtualization info */
- UINT64 Reserved;
+ UINT8 Reserved[8];
-} ACPI_TABLE_IVRS;
+} ACPI_TABLE_MCFG;
-/* Values for Info field above */
-#define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */
-#define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */
-#define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */
+/* Subtable */
+typedef struct acpi_mcfg_allocation
+{
+ UINT64 Address; /* Base address, processor-relative */
+ UINT16 PciSegment; /* PCI segment group number */
+ UINT8 StartBusNumber; /* Starting PCI Bus number */
+ UINT8 EndBusNumber; /* Final PCI Bus number */
+ UINT32 Reserved;
-/* IVRS subtable header */
+} ACPI_MCFG_ALLOCATION;
-typedef struct acpi_ivrs_header
+
+/*******************************************************************************
+ *
+ * MCHI - Management Controller Host Interface Table
+ * Version 1
+ *
+ * Conforms to "Management Component Transport Protocol (MCTP) Host
+ * Interface Specification", Revision 1.0.0a, October 13, 2009
+ *
+ ******************************************************************************/
+
+typedef struct acpi_table_mchi
{
- UINT8 Type; /* Subtable type */
- UINT8 Flags;
- UINT16 Length; /* Subtable length */
- UINT16 DeviceId; /* ID of IOMMU */
+ ACPI_TABLE_HEADER Header; /* Common ACPI table header */
+ UINT8 InterfaceType;
+ UINT8 Protocol;
+ UINT64 ProtocolData;
+ UINT8 InterruptType;
+ UINT8 Gpe;
+ UINT8 PciDeviceFlag;
+ UINT32 GlobalInterrupt;
+ ACPI_GENERIC_ADDRESS ControlRegister;
+ UINT8 PciSegment;
+ UINT8 PciBus;
+ UINT8 PciDevice;
+ UINT8 PciFunction;
-} ACPI_IVRS_HEADER;
+} ACPI_TABLE_MCHI;
-/* Values for subtable Type above */
-enum AcpiIvrsType
+/*******************************************************************************
+ *
+ * MPST - Memory Power State Table (ACPI 5.0)
+ * Version 1
+ *
+ ******************************************************************************/
+
+#define ACPI_MPST_CHANNEL_INFO \
+ UINT8 ChannelId; \
+ UINT8 Reserved1[3]; \
+ UINT16 PowerNodeCount; \
+ UINT16 Reserved2;
+
+/* Main table */
+
+typedef struct acpi_table_mpst
{
- ACPI_IVRS_TYPE_HARDWARE = 0x10,
- ACPI_IVRS_TYPE_MEMORY1 = 0x20,
- ACPI_IVRS_TYPE_MEMORY2 = 0x21,
- ACPI_IVRS_TYPE_MEMORY3 = 0x22
-};
+ ACPI_TABLE_HEADER Header; /* Common ACPI table header */
+ ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
-/* Masks for Flags field above for IVHD subtable */
+} ACPI_TABLE_MPST;
-#define ACPI_IVHD_TT_ENABLE (1)
-#define ACPI_IVHD_PASS_PW (1<<1)
-#define ACPI_IVHD_RES_PASS_PW (1<<2)
-#define ACPI_IVHD_ISOC (1<<3)
-#define ACPI_IVHD_IOTLB (1<<4)
-/* Masks for Flags field above for IVMD subtable */
+/* Memory Platform Communication Channel Info */
-#define ACPI_IVMD_UNITY (1)
-#define ACPI_IVMD_READ (1<<1)
-#define ACPI_IVMD_WRITE (1<<2)
-#define ACPI_IVMD_EXCLUSION_RANGE (1<<3)
+typedef struct acpi_mpst_channel
+{
+ ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */
+} ACPI_MPST_CHANNEL;
-/*
- * IVRS subtables, correspond to Type in ACPI_IVRS_HEADER
- */
-/* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */
+/* Memory Power Node Structure */
-typedef struct acpi_ivrs_hardware
+typedef struct acpi_mpst_power_node
{
- ACPI_IVRS_HEADER Header;
- UINT16 CapabilityOffset; /* Offset for IOMMU control fields */
- UINT64 BaseAddress; /* IOMMU control registers */
- UINT16 PciSegmentGroup;
- UINT16 Info; /* MSI number and unit ID */
- UINT32 Reserved;
+ UINT8 Flags;
+ UINT8 Reserved1;
+ UINT16 NodeId;
+ UINT32 Length;
+ UINT64 RangeAddress;
+ UINT64 RangeLength;
+ UINT32 NumPowerStates;
+ UINT32 NumPhysicalComponents;
-} ACPI_IVRS_HARDWARE;
+} ACPI_MPST_POWER_NODE;
-/* Masks for Info field above */
+/* Values for Flags field above */
-#define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */
-#define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, UnitID */
+#define ACPI_MPST_ENABLED 1
+#define ACPI_MPST_POWER_MANAGED 2
+#define ACPI_MPST_HOT_PLUG_CAPABLE 4
-/*
- * Device Entries for IVHD subtable, appear after ACPI_IVRS_HARDWARE structure.
- * Upper two bits of the Type field are the (encoded) length of the structure.
- * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries
- * are reserved for future use but not defined.
- */
-typedef struct acpi_ivrs_de_header
+/* Memory Power State Structure (follows POWER_NODE above) */
+
+typedef struct acpi_mpst_power_state
{
- UINT8 Type;
- UINT16 Id;
- UINT8 DataSetting;
+ UINT8 PowerState;
+ UINT8 InfoIndex;
-} ACPI_IVRS_DE_HEADER;
+} ACPI_MPST_POWER_STATE;
-/* Length of device entry is in the top two bits of Type field above */
-#define ACPI_IVHD_ENTRY_LENGTH 0xC0
+/* Physical Component ID Structure (follows POWER_STATE above) */
-/* Values for device entry Type field above */
+typedef struct acpi_mpst_component
+{
+ UINT16 ComponentId;
-enum AcpiIvrsDeviceEntryType
+} ACPI_MPST_COMPONENT;
+
+
+/* Memory Power State Characteristics Structure (follows all POWER_NODEs) */
+
+typedef struct acpi_mpst_data_hdr
{
- /* 4-byte device entries, all use ACPI_IVRS_DEVICE4 */
+ UINT16 CharacteristicsCount;
+ UINT16 Reserved;
- ACPI_IVRS_TYPE_PAD4 = 0,
- ACPI_IVRS_TYPE_ALL = 1,
- ACPI_IVRS_TYPE_SELECT = 2,
- ACPI_IVRS_TYPE_START = 3,
- ACPI_IVRS_TYPE_END = 4,
+} ACPI_MPST_DATA_HDR;
- /* 8-byte device entries */
+typedef struct acpi_mpst_power_data
+{
+ UINT8 StructureId;
+ UINT8 Flags;
+ UINT16 Reserved1;
+ UINT32 AveragePower;
+ UINT32 PowerSaving;
+ UINT64 ExitLatency;
+ UINT64 Reserved2;
- ACPI_IVRS_TYPE_PAD8 = 64,
- ACPI_IVRS_TYPE_NOT_USED = 65,
- ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses ACPI_IVRS_DEVICE8A */
- ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses ACPI_IVRS_DEVICE8A */
- ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses ACPI_IVRS_DEVICE8B */
- ACPI_IVRS_TYPE_EXT_START = 71, /* Uses ACPI_IVRS_DEVICE8B */
- ACPI_IVRS_TYPE_SPECIAL = 72 /* Uses ACPI_IVRS_DEVICE8C */
-};
+} ACPI_MPST_POWER_DATA;
-/* Values for Data field above */
+/* Values for Flags field above */
-#define ACPI_IVHD_INIT_PASS (1)
-#define ACPI_IVHD_EINT_PASS (1<<1)
-#define ACPI_IVHD_NMI_PASS (1<<2)
-#define ACPI_IVHD_SYSTEM_MGMT (3<<4)
-#define ACPI_IVHD_LINT0_PASS (1<<6)
-#define ACPI_IVHD_LINT1_PASS (1<<7)
+#define ACPI_MPST_PRESERVE 1
+#define ACPI_MPST_AUTOENTRY 2
+#define ACPI_MPST_AUTOEXIT 4
-/* Types 0-4: 4-byte device entry */
+/* Shared Memory Region (not part of an ACPI table) */
-typedef struct acpi_ivrs_device4
+typedef struct acpi_mpst_shared
{
- ACPI_IVRS_DE_HEADER Header;
+ UINT32 Signature;
+ UINT16 PccCommand;
+ UINT16 PccStatus;
+ UINT32 CommandRegister;
+ UINT32 StatusRegister;
+ UINT32 PowerStateId;
+ UINT32 PowerNodeId;
+ UINT64 EnergyConsumed;
+ UINT64 AveragePower;
-} ACPI_IVRS_DEVICE4;
+} ACPI_MPST_SHARED;
-/* Types 66-67: 8-byte device entry */
-typedef struct acpi_ivrs_device8a
+/*******************************************************************************
+ *
+ * MSCT - Maximum System Characteristics Table (ACPI 4.0)
+ * Version 1
+ *
+ ******************************************************************************/
+
+typedef struct acpi_table_msct
{
- ACPI_IVRS_DE_HEADER Header;
- UINT8 Reserved1;
- UINT16 UsedId;
- UINT8 Reserved2;
+ ACPI_TABLE_HEADER Header; /* Common ACPI table header */
+ UINT32 ProximityOffset; /* Location of proximity info struct(s) */
+ UINT32 MaxProximityDomains;/* Max number of proximity domains */
+ UINT32 MaxClockDomains; /* Max number of clock domains */
+ UINT64 MaxAddress; /* Max physical address in system */
-} ACPI_IVRS_DEVICE8A;
+} ACPI_TABLE_MSCT;
-/* Types 70-71: 8-byte device entry */
-typedef struct acpi_ivrs_device8b
+/* Subtable - Maximum Proximity Domain Information. Version 1 */
+
+typedef struct acpi_msct_proximity
{
- ACPI_IVRS_DE_HEADER Header;
- UINT32 ExtendedData;
+ UINT8 Revision;
+ UINT8 Length;
+ UINT32 RangeStart; /* Start of domain range */
+ UINT32 RangeEnd; /* End of domain range */
+ UINT32 ProcessorCapacity;
+ UINT64 MemoryCapacity; /* In bytes */
-} ACPI_IVRS_DEVICE8B;
+} ACPI_MSCT_PROXIMITY;
-/* Values for ExtendedData above */
-#define ACPI_IVHD_ATS_DISABLED (1<<31)
+/*******************************************************************************
+ *
+ * MSDM - Microsoft Data Management table
+ *
+ * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)",
+ * November 29, 2011. Copyright 2011 Microsoft
+ *
+ ******************************************************************************/
-/* Type 72: 8-byte device entry */
+/* Basic MSDM table is only the common ACPI header */
-typedef struct acpi_ivrs_device8c
+typedef struct acpi_table_msdm
{
- ACPI_IVRS_DE_HEADER Header;
- UINT8 Handle;
- UINT16 UsedId;
- UINT8 Variety;
+ ACPI_TABLE_HEADER Header; /* Common ACPI table header */
-} ACPI_IVRS_DEVICE8C;
+} ACPI_TABLE_MSDM;
-/* Values for Variety field above */
-#define ACPI_IVHD_IOAPIC 1
-#define ACPI_IVHD_HPET 2
+/*******************************************************************************
+ *
+ * MTMR - MID Timer Table
+ * Version 1
+ *
+ * Conforms to "Simple Firmware Interface Specification",
+ * Draft 0.8.2, Oct 19, 2010
+ * NOTE: The ACPI MTMR is equivalent to the SFI MTMR table.
+ *
+ ******************************************************************************/
+typedef struct acpi_table_mtmr
+{
+ ACPI_TABLE_HEADER Header; /* Common ACPI table header */
-/* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */
+} ACPI_TABLE_MTMR;
-typedef struct acpi_ivrs_memory
+/* MTMR entry */
+
+typedef struct acpi_mtmr_entry
{
- ACPI_IVRS_HEADER Header;
- UINT16 AuxData;
- UINT64 Reserved;
- UINT64 StartAddress;
- UINT64 MemoryLength;
+ ACPI_GENERIC_ADDRESS PhysicalAddress;
+ UINT32 Frequency;
+ UINT32 Irq;
-} ACPI_IVRS_MEMORY;
+} ACPI_MTMR_ENTRY;
/*******************************************************************************
*
- * LPIT - Low Power Idle Table
- *
- * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014.
+ * NFIT - NVDIMM Interface Table (ACPI 6.0+)
+ * Version 1
*
******************************************************************************/
-typedef struct acpi_table_lpit
+typedef struct acpi_table_nfit
{
ACPI_TABLE_HEADER Header; /* Common ACPI table header */
+ UINT32 Reserved; /* Reserved, must be zero */
-} ACPI_TABLE_LPIT;
-
+} ACPI_TABLE_NFIT;
-/* LPIT subtable header */
+/* Subtable header for NFIT */
-typedef struct acpi_lpit_header
+typedef struct acpi_nfit_header
{
- UINT32 Type; /* Subtable type */
- UINT32 Length; /* Subtable length */
- UINT16 UniqueId;
- UINT16 Reserved;
- UINT32 Flags;
+ UINT16 Type;
+ UINT16 Length;
-} ACPI_LPIT_HEADER;
+} ACPI_NFIT_HEADER;
-/* Values for subtable Type above */
-enum AcpiLpitType
+/* Values for subtable type in ACPI_NFIT_HEADER */
+
+enum AcpiNfitType
{
- ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00,
- ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */
+ ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0,
+ ACPI_NFIT_TYPE_MEMORY_MAP = 1,
+ ACPI_NFIT_TYPE_INTERLEAVE = 2,
+ ACPI_NFIT_TYPE_SMBIOS = 3,
+ ACPI_NFIT_TYPE_CONTROL_REGION = 4,
+ ACPI_NFIT_TYPE_DATA_REGION = 5,
+ ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6,
+ ACPI_NFIT_TYPE_CAPABILITIES = 7,
+ ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */
};
-/* Masks for Flags field above */
-
-#define ACPI_LPIT_STATE_DISABLED (1)
-#define ACPI_LPIT_NO_COUNTER (1<<1)
-
/*
- * LPIT subtables, correspond to Type in ACPI_LPIT_HEADER
+ * NFIT Subtables
*/
-/* 0x00: Native C-state instruction based LPI structure */
+/* 0: System Physical Address Range Structure */
-typedef struct acpi_lpit_native
+typedef struct acpi_nfit_system_address
{
- ACPI_LPIT_HEADER Header;
- ACPI_GENERIC_ADDRESS EntryTrigger;
- UINT32 Residency;
- UINT32 Latency;
- ACPI_GENERIC_ADDRESS ResidencyCounter;
- UINT64 CounterFrequency;
+ ACPI_NFIT_HEADER Header;
+ UINT16 RangeIndex;
+ UINT16 Flags;
+ UINT32 Reserved; /* Reserved, must be zero */
+ UINT32 ProximityDomain;
+ UINT8 RangeGuid[16];
+ UINT64 Address;
+ UINT64 Length;
+ UINT64 MemoryMapping;
-} ACPI_LPIT_NATIVE;
+} ACPI_NFIT_SYSTEM_ADDRESS;
+/* Flags */
-/*******************************************************************************
- *
- * MCFG - PCI Memory Mapped Configuration table and subtable
- * Version 1
- *
- * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005
- *
- ******************************************************************************/
+#define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */
+#define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */
-typedef struct acpi_table_mcfg
+/* Range Type GUIDs appear in the include/acuuid.h file */
+
+
+/* 1: Memory Device to System Address Range Map Structure */
+
+typedef struct acpi_nfit_memory_map
{
- ACPI_TABLE_HEADER Header; /* Common ACPI table header */
- UINT8 Reserved[8];
+ ACPI_NFIT_HEADER Header;
+ UINT32 DeviceHandle;
+ UINT16 PhysicalId;
+ UINT16 RegionId;
+ UINT16 RangeIndex;
+ UINT16 RegionIndex;
+ UINT64 RegionSize;
+ UINT64 RegionOffset;
+ UINT64 Address;
+ UINT16 InterleaveIndex;
+ UINT16 InterleaveWays;
+ UINT16 Flags;
+ UINT16 Reserved; /* Reserved, must be zero */
-} ACPI_TABLE_MCFG;
+} ACPI_NFIT_MEMORY_MAP;
+/* Flags */
-/* Subtable */
+#define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */
+#define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */
+#define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */
+#define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */
+#define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */
+#define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */
+#define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */
-typedef struct acpi_mcfg_allocation
+
+/* 2: Interleave Structure */
+
+typedef struct acpi_nfit_interleave
{
- UINT64 Address; /* Base address, processor-relative */
- UINT16 PciSegment; /* PCI segment group number */
- UINT8 StartBusNumber; /* Starting PCI Bus number */
- UINT8 EndBusNumber; /* Final PCI Bus number */
- UINT32 Reserved;
+ ACPI_NFIT_HEADER Header;
+ UINT16 InterleaveIndex;
+ UINT16 Reserved; /* Reserved, must be zero */
+ UINT32 LineCount;
+ UINT32 LineSize;
+ UINT32 LineOffset[1]; /* Variable length */
-} ACPI_MCFG_ALLOCATION;
+} ACPI_NFIT_INTERLEAVE;
+
+
+/* 3: SMBIOS Management Information Structure */
+
+typedef struct acpi_nfit_smbios
+{
+ ACPI_NFIT_HEADER Header;
+ UINT32 Reserved; /* Reserved, must be zero */
+ UINT8 Data[1]; /* Variable length */
+
+} ACPI_NFIT_SMBIOS;
+
+
+/* 4: NVDIMM Control Region Structure */
+
+typedef struct acpi_nfit_control_region
+{
+ ACPI_NFIT_HEADER Header;
+ UINT16 RegionIndex;
+ UINT16 VendorId;
+ UINT16 DeviceId;
+ UINT16 RevisionId;
+ UINT16 SubsystemVendorId;
+ UINT16 SubsystemDeviceId;
+ UINT16 SubsystemRevisionId;
+ UINT8 ValidFields;
+ UINT8 ManufacturingLocation;
+ UINT16 ManufacturingDate;
+ UINT8 Reserved[2]; /* Reserved, must be zero */
+ UINT32 SerialNumber;
+ UINT16 Code;
+ UINT16 Windows;
+ UINT64 WindowSize;
+ UINT64 CommandOffset;
+ UINT64 CommandSize;
+ UINT64 StatusOffset;
+ UINT64 StatusSize;
+ UINT16 Flags;
+ UINT8 Reserved1[6]; /* Reserved, must be zero */
+
+} ACPI_NFIT_CONTROL_REGION;
+
+/* Flags */
+
+#define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */
+
+/* ValidFields bits */
+
+#define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */
+
+
+/* 5: NVDIMM Block Data Window Region Structure */
+
+typedef struct acpi_nfit_data_region
+{
+ ACPI_NFIT_HEADER Header;
+ UINT16 RegionIndex;
+ UINT16 Windows;
+ UINT64 Offset;
+ UINT64 Size;
+ UINT64 Capacity;
+ UINT64 StartAddress;
+
+} ACPI_NFIT_DATA_REGION;
+
+
+/* 6: Flush Hint Address Structure */
+
+typedef struct acpi_nfit_flush_address
+{
+ ACPI_NFIT_HEADER Header;
+ UINT32 DeviceHandle;
+ UINT16 HintCount;
+ UINT8 Reserved[6]; /* Reserved, must be zero */
+ UINT64 HintAddress[1]; /* Variable length */
+
+} ACPI_NFIT_FLUSH_ADDRESS;
+
+
+/* 7: Platform Capabilities Structure */
+
+typedef struct acpi_nfit_capabilities
+{
+ ACPI_NFIT_HEADER Header;
+ UINT8 HighestCapability;
+ UINT8 Reserved[3]; /* Reserved, must be zero */
+ UINT32 Capabilities;
+ UINT32 Reserved2;
+
+} ACPI_NFIT_CAPABILITIES;
+
+/* Capabilities Flags */
+
+#define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */
+#define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */
+#define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */
+
+
+/*
+ * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM
+ */
+typedef struct nfit_device_handle
+{
+ UINT32 Handle;
+
+} NFIT_DEVICE_HANDLE;
+
+/* Device handle construction and extraction macros */
+
+#define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F
+#define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0
+#define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00
+#define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000
+#define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000
+
+#define ACPI_NFIT_DIMM_NUMBER_OFFSET 0
+#define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4
+#define ACPI_NFIT_MEMORY_ID_OFFSET 8
+#define ACPI_NFIT_SOCKET_ID_OFFSET 12
+#define ACPI_NFIT_NODE_ID_OFFSET 16
+
+/* Macro to construct a NFIT/NVDIMM device handle */
+
+#define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \
+ ((dimm) | \
+ ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \
+ ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \
+ ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \
+ ((node) << ACPI_NFIT_NODE_ID_OFFSET))
+
+/* Macros to extract individual fields from a NFIT/NVDIMM device handle */
+
+#define ACPI_NFIT_GET_DIMM_NUMBER(handle) \
+ ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK)
+
+#define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \
+ (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET)
+
+#define ACPI_NFIT_GET_MEMORY_ID(handle) \
+ (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET)
+
+#define ACPI_NFIT_GET_SOCKET_ID(handle) \
+ (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET)
+
+#define ACPI_NFIT_GET_NODE_ID(handle) \
+ (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET)
/*******************************************************************************
*
- * MCHI - Management Controller Host Interface Table
- * Version 1
- *
- * Conforms to "Management Component Transport Protocol (MCTP) Host
- * Interface Specification", Revision 1.0.0a, October 13, 2009
+ * PCCT - Platform Communications Channel Table (ACPI 5.0)
+ * Version 2 (ACPI 6.2)
*
******************************************************************************/
-typedef struct acpi_table_mchi
+typedef struct acpi_table_pcct
{
ACPI_TABLE_HEADER Header; /* Common ACPI table header */
- UINT8 InterfaceType;
- UINT8 Protocol;
- UINT64 ProtocolData;
- UINT8 InterruptType;
- UINT8 Gpe;
- UINT8 PciDeviceFlag;
- UINT32 GlobalInterrupt;
- ACPI_GENERIC_ADDRESS ControlRegister;
- UINT8 PciSegment;
- UINT8 PciBus;
- UINT8 PciDevice;
- UINT8 PciFunction;
+ UINT32 Flags;
+ UINT64 Reserved;
-} ACPI_TABLE_MCHI;
+} ACPI_TABLE_PCCT;
+
+/* Values for Flags field above */
+
+#define ACPI_PCCT_DOORBELL 1
+
+/* Values for subtable type in ACPI_SUBTABLE_HEADER */
+
+enum AcpiPcctType
+{
+ ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0,
+ ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1,
+ ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */
+ ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */
+ ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */
+ ACPI_PCCT_TYPE_RESERVED = 5 /* 5 and greater are reserved */
+};
+
+/*
+ * PCCT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER
+ */
+
+/* 0: Generic Communications Subspace */
+
+typedef struct acpi_pcct_subspace
+{
+ ACPI_SUBTABLE_HEADER Header;
+ UINT8 Reserved[6];
+ UINT64 BaseAddress;
+ UINT64 Length;
+ ACPI_GENERIC_ADDRESS DoorbellRegister;
+ UINT64 PreserveMask;
+ UINT64 WriteMask;
+ UINT32 Latency;
+ UINT32 MaxAccessRate;
+ UINT16 MinTurnaroundTime;
+} ACPI_PCCT_SUBSPACE;
-/*******************************************************************************
- *
- * MSDM - Microsoft Data Management table
- *
- * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)",
- * November 29, 2011. Copyright 2011 Microsoft
- *
- ******************************************************************************/
-/* Basic MSDM table is only the common ACPI header */
+/* 1: HW-reduced Communications Subspace (ACPI 5.1) */
-typedef struct acpi_table_msdm
+typedef struct acpi_pcct_hw_reduced
{
- ACPI_TABLE_HEADER Header; /* Common ACPI table header */
+ ACPI_SUBTABLE_HEADER Header;
+ UINT32 PlatformInterrupt;
+ UINT8 Flags;
+ UINT8 Reserved;
+ UINT64 BaseAddress;
+ UINT64 Length;
+ ACPI_GENERIC_ADDRESS DoorbellRegister;
+ UINT64 PreserveMask;
+ UINT64 WriteMask;
+ UINT32 Latency;
+ UINT32 MaxAccessRate;
+ UINT16 MinTurnaroundTime;
-} ACPI_TABLE_MSDM;
+} ACPI_PCCT_HW_REDUCED;
-/*******************************************************************************
- *
- * MTMR - MID Timer Table
- * Version 1
- *
- * Conforms to "Simple Firmware Interface Specification",
- * Draft 0.8.2, Oct 19, 2010
- * NOTE: The ACPI MTMR is equivalent to the SFI MTMR table.
- *
- ******************************************************************************/
+/* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */
-typedef struct acpi_table_mtmr
+typedef struct acpi_pcct_hw_reduced_type2
{
- ACPI_TABLE_HEADER Header; /* Common ACPI table header */
+ ACPI_SUBTABLE_HEADER Header;
+ UINT32 PlatformInterrupt;
+ UINT8 Flags;
+ UINT8 Reserved;
+ UINT64 BaseAddress;
+ UINT64 Length;
+ ACPI_GENERIC_ADDRESS DoorbellRegister;
+ UINT64 PreserveMask;
+ UINT64 WriteMask;
+ UINT32 Latency;
+ UINT32 MaxAccessRate;
+ UINT16 MinTurnaroundTime;
+ ACPI_GENERIC_ADDRESS PlatformAckRegister;
+ UINT64 AckPreserveMask;
+ UINT64 AckWriteMask;
-} ACPI_TABLE_MTMR;
+} ACPI_PCCT_HW_REDUCED_TYPE2;
-/* MTMR entry */
-typedef struct acpi_mtmr_entry
+/* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */
+
+typedef struct acpi_pcct_ext_pcc_master
{
- ACPI_GENERIC_ADDRESS PhysicalAddress;
- UINT32 Frequency;
- UINT32 Irq;
+ ACPI_SUBTABLE_HEADER Header;
+ UINT32 PlatformInterrupt;
+ UINT8 Flags;
+ UINT8 Reserved1;
+ UINT64 BaseAddress;
+ UINT32 Length;
+ ACPI_GENERIC_ADDRESS DoorbellRegister;
+ UINT64 PreserveMask;
+ UINT64 WriteMask;
+ UINT32 Latency;
+ UINT32 MaxAccessRate;
+ UINT32 MinTurnaroundTime;
+ ACPI_GENERIC_ADDRESS PlatformAckRegister;
+ UINT64 AckPreserveMask;
+ UINT64 AckSetMask;
+ UINT64 Reserved2;
+ ACPI_GENERIC_ADDRESS CmdCompleteRegister;
+ UINT64 CmdCompleteMask;
+ ACPI_GENERIC_ADDRESS CmdUpdateRegister;
+ UINT64 CmdUpdatePreserveMask;
+ UINT64 CmdUpdateSetMask;
+ ACPI_GENERIC_ADDRESS ErrorStatusRegister;
+ UINT64 ErrorStatusMask;
-} ACPI_MTMR_ENTRY;
+} ACPI_PCCT_EXT_PCC_MASTER;
-/*******************************************************************************
- *
- * SDEI - Software Delegated Exception Interface Descriptor Table
- *
- * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A,
- * May 8th, 2017. Copyright 2017 ARM Ltd.
- *
- ******************************************************************************/
-typedef struct acpi_table_sdei
+/* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */
+
+typedef struct acpi_pcct_ext_pcc_slave
{
- ACPI_TABLE_HEADER Header; /* Common ACPI table header */
+ ACPI_SUBTABLE_HEADER Header;
+ UINT32 PlatformInterrupt;
+ UINT8 Flags;
+ UINT8 Reserved1;
+ UINT64 BaseAddress;
+ UINT32 Length;
+ ACPI_GENERIC_ADDRESS DoorbellRegister;
+ UINT64 PreserveMask;
+ UINT64 WriteMask;
+ UINT32 Latency;
+ UINT32 MaxAccessRate;
+ UINT32 MinTurnaroundTime;
+ ACPI_GENERIC_ADDRESS PlatformAckRegister;
+ UINT64 AckPreserveMask;
+ UINT64 AckSetMask;
+ UINT64 Reserved2;
+ ACPI_GENERIC_ADDRESS CmdCompleteRegister;
+ UINT64 CmdCompleteMask;
+ ACPI_GENERIC_ADDRESS CmdUpdateRegister;
+ UINT64 CmdUpdatePreserveMask;
+ UINT64 CmdUpdateSetMask;
+ ACPI_GENERIC_ADDRESS ErrorStatusRegister;
+ UINT64 ErrorStatusMask;
-} ACPI_TABLE_SDEI;
+} ACPI_PCCT_EXT_PCC_SLAVE;
-/*******************************************************************************
- *
- * SLIC - Software Licensing Description Table
- *
- * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)",
- * November 29, 2011. Copyright 2011 Microsoft
- *
- ******************************************************************************/
+/* Values for doorbell flags above */
-/* Basic SLIC table is only the common ACPI header */
+#define ACPI_PCCT_INTERRUPT_POLARITY (1)
+#define ACPI_PCCT_INTERRUPT_MODE (1<<1)
-typedef struct acpi_table_slic
+
+/*
+ * PCC memory structures (not part of the ACPI table)
+ */
+
+/* Shared Memory Region */
+
+typedef struct acpi_pcct_shared_memory
{
- ACPI_TABLE_HEADER Header; /* Common ACPI table header */
+ UINT32 Signature;
+ UINT16 Command;
+ UINT16 Status;
+
+} ACPI_PCCT_SHARED_MEMORY;
-} ACPI_TABLE_SLIC;
+
+/* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */
+
+typedef struct acpi_pcct_ext_pcc_shared_memory
+{
+ UINT32 Signature;
+ UINT32 Flags;
+ UINT32 Length;
+ UINT32 Command;
+
+} ACPI_PCCT_EXT_PCC_SHARED_MEMORY;
/*******************************************************************************
*
- * SPCR - Serial Port Console Redirection table
- * Version 2
- *
- * Conforms to "Serial Port Console Redirection Table",
- * Version 1.03, August 10, 2015
+ * PDTT - Platform Debug Trigger Table (ACPI 6.2)
+ * Version 0
*
******************************************************************************/
-typedef struct acpi_table_spcr
+typedef struct acpi_table_pdtt
{
ACPI_TABLE_HEADER Header; /* Common ACPI table header */
- UINT8 InterfaceType; /* 0=full 16550, 1=subset of 16550 */
+ UINT8 TriggerCount;
UINT8 Reserved[3];
- ACPI_GENERIC_ADDRESS SerialPort;
- UINT8 InterruptType;
- UINT8 PcInterrupt;
- UINT32 Interrupt;
- UINT8 BaudRate;
- UINT8 Parity;
- UINT8 StopBits;
- UINT8 FlowControl;
- UINT8 TerminalType;
- UINT8 Reserved1;
- UINT16 PciDeviceId;
- UINT16 PciVendorId;
- UINT8 PciBus;
- UINT8 PciDevice;
- UINT8 PciFunction;
- UINT32 PciFlags;
- UINT8 PciSegment;
- UINT32 Reserved2;
+ UINT32 ArrayOffset;
+
+} ACPI_TABLE_PDTT;
-} ACPI_TABLE_SPCR;
-/* Masks for PciFlags field above */
+/*
+ * PDTT Communication Channel Identifier Structure.
+ * The number of these structures is defined by TriggerCount above,
+ * starting at ArrayOffset.
+ */
+typedef struct acpi_pdtt_channel
+{
+ UINT8 SubchannelId;
+ UINT8 Flags;
-#define ACPI_SPCR_DO_NOT_DISABLE (1)
+} ACPI_PDTT_CHANNEL;
-/* Values for Interface Type: See the definition of the DBG2 table */
+/* Flags for above */
+
+#define ACPI_PDTT_RUNTIME_TRIGGER (1)
+#define ACPI_PDTT_WAIT_COMPLETION (1<<1)
/*******************************************************************************
*
- * SPMI - Server Platform Management Interface table
- * Version 5
- *
- * Conforms to "Intelligent Platform Management Interface Specification
- * Second Generation v2.0", Document Revision 1.0, February 12, 2004 with
- * June 12, 2009 markup.
+ * PMTT - Platform Memory Topology Table (ACPI 5.0)
+ * Version 1
*
******************************************************************************/
-typedef struct acpi_table_spmi
+typedef struct acpi_table_pmtt
{
ACPI_TABLE_HEADER Header; /* Common ACPI table header */
- UINT8 InterfaceType;
- UINT8 Reserved; /* Must be 1 */
- UINT16 SpecRevision; /* Version of IPMI */
- UINT8 InterruptType;
- UINT8 GpeNumber; /* GPE assigned */
- UINT8 Reserved1;
- UINT8 PciDeviceFlag;
- UINT32 Interrupt;
- ACPI_GENERIC_ADDRESS IpmiRegister;
- UINT8 PciSegment;
- UINT8 PciBus;
- UINT8 PciDevice;
- UINT8 PciFunction;
- UINT8 Reserved2;
+ UINT32 Reserved;
+
+} ACPI_TABLE_PMTT;
-} ACPI_TABLE_SPMI;
-/* Values for InterfaceType above */
+/* Common header for PMTT subtables that follow main table */
-enum AcpiSpmiInterfaceTypes
+typedef struct acpi_pmtt_header
{
- ACPI_SPMI_NOT_USED = 0,
- ACPI_SPMI_KEYBOARD = 1,
- ACPI_SPMI_SMI = 2,
- ACPI_SPMI_BLOCK_TRANSFER = 3,
- ACPI_SPMI_SMBUS = 4,
- ACPI_SPMI_RESERVED = 5 /* 5 and above are reserved */
-};
+ UINT8 Type;
+ UINT8 Reserved1;
+ UINT16 Length;
+ UINT16 Flags;
+ UINT16 Reserved2;
+} ACPI_PMTT_HEADER;
-/*******************************************************************************
- *
- * TCPA - Trusted Computing Platform Alliance table
- * Version 2
- *
- * TCG Hardware Interface Table for TPM 1.2 Clients and Servers
- *
- * Conforms to "TCG ACPI Specification, Family 1.2 and 2.0",
- * Version 1.2, Revision 8
- * February 27, 2017
- *
- * NOTE: There are two versions of the table with the same signature --
- * the client version and the server version. The common PlatformClass
- * field is used to differentiate the two types of tables.
- *
- ******************************************************************************/
+/* Values for Type field above */
-typedef struct acpi_table_tcpa_hdr
-{
- ACPI_TABLE_HEADER Header; /* Common ACPI table header */
- UINT16 PlatformClass;
+#define ACPI_PMTT_TYPE_SOCKET 0
+#define ACPI_PMTT_TYPE_CONTROLLER 1
+#define ACPI_PMTT_TYPE_DIMM 2
+#define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFF are reserved */
+
+/* Values for Flags field above */
+
+#define ACPI_PMTT_TOP_LEVEL 0x0001
+#define ACPI_PMTT_PHYSICAL 0x0002
+#define ACPI_PMTT_MEMORY_TYPE 0x000C
-} ACPI_TABLE_TCPA_HDR;
/*
- * Values for PlatformClass above.
- * This is how the client and server subtables are differentiated
+ * PMTT subtables, correspond to Type in acpi_pmtt_header
*/
-#define ACPI_TCPA_CLIENT_TABLE 0
-#define ACPI_TCPA_SERVER_TABLE 1
-typedef struct acpi_table_tcpa_client
+/* 0: Socket Structure */
+
+typedef struct acpi_pmtt_socket
{
- UINT32 MinimumLogLength; /* Minimum length for the event log area */
- UINT64 LogAddress; /* Address of the event log area */
+ ACPI_PMTT_HEADER Header;
+ UINT16 SocketId;
+ UINT16 Reserved;
+
+} ACPI_PMTT_SOCKET;
-} ACPI_TABLE_TCPA_CLIENT;
-typedef struct acpi_table_tcpa_server
+/* 1: Memory Controller subtable */
+
+typedef struct acpi_pmtt_controller
{
+ ACPI_PMTT_HEADER Header;
+ UINT32 ReadLatency;
+ UINT32 WriteLatency;
+ UINT32 ReadBandwidth;
+ UINT32 WriteBandwidth;
+ UINT16 AccessWidth;
+ UINT16 Alignment;
UINT16 Reserved;
- UINT64 MinimumLogLength; /* Minimum length for the event log area */
- UINT64 LogAddress; /* Address of the event log area */
- UINT16 SpecRevision;
- UINT8 DeviceFlags;
- UINT8 InterruptFlags;
- UINT8 GpeNumber;
- UINT8 Reserved2[3];
- UINT32 GlobalInterrupt;
- ACPI_GENERIC_ADDRESS Address;
- UINT32 Reserved3;
- ACPI_GENERIC_ADDRESS ConfigAddress;
- UINT8 Group;
- UINT8 Bus; /* PCI Bus/Segment/Function numbers */
- UINT8 Device;
- UINT8 Function;
+ UINT16 DomainCount;
+
+} ACPI_PMTT_CONTROLLER;
+
+/* 1a: Proximity Domain substructure */
+
+typedef struct acpi_pmtt_domain
+{
+ UINT32 ProximityDomain;
-} ACPI_TABLE_TCPA_SERVER;
+} ACPI_PMTT_DOMAIN;
-/* Values for DeviceFlags above */
-#define ACPI_TCPA_PCI_DEVICE (1)
-#define ACPI_TCPA_BUS_PNP (1<<1)
-#define ACPI_TCPA_ADDRESS_VALID (1<<2)
+/* 2: Physical Component Identifier (DIMM) */
-/* Values for InterruptFlags above */
+typedef struct acpi_pmtt_physical_component
+{
+ ACPI_PMTT_HEADER Header;
+ UINT16 ComponentId;
+ UINT16 Reserved;
+ UINT32 MemorySize;
+ UINT32 BiosHandle;
-#define ACPI_TCPA_INTERRUPT_MODE (1)
-#define ACPI_TCPA_INTERRUPT_POLARITY (1<<1)
-#define ACPI_TCPA_SCI_VIA_GPE (1<<2)
-#define ACPI_TCPA_GLOBAL_INTERRUPT (1<<3)
+} ACPI_PMTT_PHYSICAL_COMPONENT;
/*******************************************************************************
*
- * TPM2 - Trusted Platform Module (TPM) 2.0 Hardware Interface Table
- * Version 4
- *
- * TCG Hardware Interface Table for TPM 2.0 Clients and Servers
- *
- * Conforms to "TCG ACPI Specification, Family 1.2 and 2.0",
- * Version 1.2, Revision 8
- * February 27, 2017
+ * PPTT - Processor Properties Topology Table (ACPI 6.2)
+ * Version 1
*
******************************************************************************/
-typedef struct acpi_table_tpm2
+typedef struct acpi_table_pptt
{
ACPI_TABLE_HEADER Header; /* Common ACPI table header */
- UINT16 PlatformClass;
- UINT16 Reserved;
- UINT64 ControlAddress;
- UINT32 StartMethod;
- /* Platform-specific data follows */
+} ACPI_TABLE_PPTT;
-} ACPI_TABLE_TPM2;
-
-/* Values for StartMethod above */
+/* Values for Type field above */
-#define ACPI_TPM2_NOT_ALLOWED 0
-#define ACPI_TPM2_RESERVED1 1
-#define ACPI_TPM2_START_METHOD 2
-#define ACPI_TPM2_RESERVED3 3
-#define ACPI_TPM2_RESERVED4 4
-#define ACPI_TPM2_RESERVED5 5
-#define ACPI_TPM2_MEMORY_MAPPED 6
-#define ACPI_TPM2_COMMAND_BUFFER 7
-#define ACPI_TPM2_COMMAND_BUFFER_WITH_START_METHOD 8
-#define ACPI_TPM2_RESERVED9 9
-#define ACPI_TPM2_RESERVED10 10
-#define ACPI_TPM2_COMMAND_BUFFER_WITH_ARM_SMC 11 /* V1.2 Rev 8 */
-#define ACPI_TPM2_RESERVED 12
+enum AcpiPpttType
+{
+ ACPI_PPTT_TYPE_PROCESSOR = 0,
+ ACPI_PPTT_TYPE_CACHE = 1,
+ ACPI_PPTT_TYPE_ID = 2,
+ ACPI_PPTT_TYPE_RESERVED = 3
+};
-/* Optional trailer appears after any StartMethod subtables */
+/* 0: Processor Hierarchy Node Structure */
-typedef struct acpi_tpm2_trailer
+typedef struct acpi_pptt_processor
{
- UINT8 MethodParameters[12];
- UINT32 MinimumLogLength; /* Minimum length for the event log area */
- UINT64 LogAddress; /* Address of the event log area */
+ ACPI_SUBTABLE_HEADER Header;
+ UINT16 Reserved;
+ UINT32 Flags;
+ UINT32 Parent;
+ UINT32 AcpiProcessorId;
+ UINT32 NumberOfPrivResources;
-} ACPI_TPM2_TRAILER;
+} ACPI_PPTT_PROCESSOR;
+/* Flags */
-/*
- * Subtables (StartMethod-specific)
- */
+#define ACPI_PPTT_PHYSICAL_PACKAGE (1) /* Physical package */
+#define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (2) /* ACPI Processor ID valid */
-/* 11: Start Method for ARM SMC (V1.2 Rev 8) */
-typedef struct acpi_tpm2_arm_smc
+/* 1: Cache Type Structure */
+
+typedef struct acpi_pptt_cache
{
- UINT32 GlobalInterrupt;
- UINT8 InterruptFlags;
- UINT8 OperationFlags;
+ ACPI_SUBTABLE_HEADER Header;
UINT16 Reserved;
- UINT32 FunctionId;
+ UINT32 Flags;
+ UINT32 NextLevelOfCache;
+ UINT32 Size;
+ UINT32 NumberOfSets;
+ UINT8 Associativity;
+ UINT8 Attributes;
+ UINT16 LineSize;
-} ACPI_TPM2_ARM_SMC;
+} ACPI_PPTT_CACHE;
-/* Values for InterruptFlags above */
+/* Flags */
-#define ACPI_TPM2_INTERRUPT_SUPPORT (1)
+#define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */
+#define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */
+#define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */
+#define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */
+#define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */
+#define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */
+#define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */
-/* Values for OperationFlags above */
+/* Masks for Attributes */
-#define ACPI_TPM2_IDLE_SUPPORT (1)
+#define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */
+#define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */
+#define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */
+/* Attributes describing cache */
+#define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */
+#define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */
+#define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */
+#define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */
-/*******************************************************************************
- *
- * UEFI - UEFI Boot optimization Table
- * Version 1
- *
- * Conforms to "Unified Extensible Firmware Interface Specification",
- * Version 2.3, May 8, 2009
- *
- ******************************************************************************/
+#define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */
+#define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */
+#define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */
+#define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */
+
+#define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */
+#define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */
-typedef struct acpi_table_uefi
+/* 2: ID Structure */
+
+typedef struct acpi_pptt_id
{
- ACPI_TABLE_HEADER Header; /* Common ACPI table header */
- UINT8 Identifier[16]; /* UUID identifier */
- UINT16 DataOffset; /* Offset of remaining data in table */
+ ACPI_SUBTABLE_HEADER Header;
+ UINT16 Reserved;
+ UINT32 VendorId;
+ UINT64 Level1Id;
+ UINT64 Level2Id;
+ UINT16 MajorRev;
+ UINT16 MinorRev;
+ UINT16 SpinRev;
-} ACPI_TABLE_UEFI;
+} ACPI_PPTT_ID;
/*******************************************************************************
*
- * VRTC - Virtual Real Time Clock Table
+ * RASF - RAS Feature Table (ACPI 5.0)
* Version 1
*
- * Conforms to "Simple Firmware Interface Specification",
- * Draft 0.8.2, Oct 19, 2010
- * NOTE: The ACPI VRTC is equivalent to The SFI MRTC table.
- *
******************************************************************************/
-typedef struct acpi_table_vrtc
+typedef struct acpi_table_rasf
{
ACPI_TABLE_HEADER Header; /* Common ACPI table header */
+ UINT8 ChannelId[12];
-} ACPI_TABLE_VRTC;
+} ACPI_TABLE_RASF;
-/* VRTC entry */
+/* RASF Platform Communication Channel Shared Memory Region */
-typedef struct acpi_vrtc_entry
+typedef struct acpi_rasf_shared_memory
{
- ACPI_GENERIC_ADDRESS PhysicalAddress;
- UINT32 Irq;
-
-} ACPI_VRTC_ENTRY;
+ UINT32 Signature;
+ UINT16 Command;
+ UINT16 Status;
+ UINT16 Version;
+ UINT8 Capabilities[16];
+ UINT8 SetCapabilities[16];
+ UINT16 NumParameterBlocks;
+ UINT32 SetCapabilitiesStatus;
+} ACPI_RASF_SHARED_MEMORY;
-/*******************************************************************************
- *
- * WAET - Windows ACPI Emulated devices Table
- * Version 1
- *
- * Conforms to "Windows ACPI Emulated Devices Table", version 1.0, April 6, 2009
- *
- ******************************************************************************/
+/* RASF Parameter Block Structure Header */
-typedef struct acpi_table_waet
+typedef struct acpi_rasf_parameter_block
{
- ACPI_TABLE_HEADER Header; /* Common ACPI table header */
- UINT32 Flags;
+ UINT16 Type;
+ UINT16 Version;
+ UINT16 Length;
-} ACPI_TABLE_WAET;
+} ACPI_RASF_PARAMETER_BLOCK;
-/* Masks for Flags field above */
+/* RASF Parameter Block Structure for PATROL_SCRUB */
-#define ACPI_WAET_RTC_NO_ACK (1) /* RTC requires no int acknowledge */
-#define ACPI_WAET_TIMER_ONE_READ (1<<1) /* PM timer requires only one read */
+typedef struct acpi_rasf_patrol_scrub_parameter
+{
+ ACPI_RASF_PARAMETER_BLOCK Header;
+ UINT16 PatrolScrubCommand;
+ UINT64 RequestedAddressRange[2];
+ UINT64 ActualAddressRange[2];
+ UINT16 Flags;
+ UINT8 RequestedSpeed;
+} ACPI_RASF_PATROL_SCRUB_PARAMETER;
-/*******************************************************************************
- *
- * WDAT - Watchdog Action Table
- * Version 1
- *
- * Conforms to "Hardware Watchdog Timers Design Specification",
- * Copyright 2006 Microsoft Corporation.
- *
- ******************************************************************************/
+/* Masks for Flags and Speed fields above */
-typedef struct acpi_table_wdat
-{
- ACPI_TABLE_HEADER Header; /* Common ACPI table header */
- UINT32 HeaderLength; /* Watchdog Header Length */
- UINT16 PciSegment; /* PCI Segment number */
- UINT8 PciBus; /* PCI Bus number */
- UINT8 PciDevice; /* PCI Device number */
- UINT8 PciFunction; /* PCI Function number */
- UINT8 Reserved[3];
- UINT32 TimerPeriod; /* Period of one timer count (msec) */
- UINT32 MaxCount; /* Maximum counter value supported */
- UINT32 MinCount; /* Minimum counter value */
- UINT8 Flags;
- UINT8 Reserved2[3];
- UINT32 Entries; /* Number of watchdog entries that follow */
+#define ACPI_RASF_SCRUBBER_RUNNING 1
+#define ACPI_RASF_SPEED (7<<1)
+#define ACPI_RASF_SPEED_SLOW (0<<1)
+#define ACPI_RASF_SPEED_MEDIUM (4<<1)
+#define ACPI_RASF_SPEED_FAST (7<<1)
-} ACPI_TABLE_WDAT;
+/* Channel Commands */
-/* Masks for Flags field above */
+enum AcpiRasfCommands
+{
+ ACPI_RASF_EXECUTE_RASF_COMMAND = 1
+};
-#define ACPI_WDAT_ENABLED (1)
-#define ACPI_WDAT_STOPPED 0x80
+/* Platform RAS Capabilities */
+enum AcpiRasfCapabiliities
+{
+ ACPI_HW_PATROL_SCRUB_SUPPORTED = 0,
+ ACPI_SW_PATROL_SCRUB_EXPOSED = 1
+};
-/* WDAT Instruction Entries (actions) */
+/* Patrol Scrub Commands */
-typedef struct acpi_wdat_entry
+enum AcpiRasfPatrolScrubCommands
{
- UINT8 Action;
- UINT8 Instruction;
- UINT16 Reserved;
- ACPI_GENERIC_ADDRESS RegisterRegion;
- UINT32 Value; /* Value used with Read/Write register */
- UINT32 Mask; /* Bitmask required for this register instruction */
-
-} ACPI_WDAT_ENTRY;
-
-/* Values for Action field above */
-
-enum AcpiWdatActions
-{
- ACPI_WDAT_RESET = 1,
- ACPI_WDAT_GET_CURRENT_COUNTDOWN = 4,
- ACPI_WDAT_GET_COUNTDOWN = 5,
- ACPI_WDAT_SET_COUNTDOWN = 6,
- ACPI_WDAT_GET_RUNNING_STATE = 8,
- ACPI_WDAT_SET_RUNNING_STATE = 9,
- ACPI_WDAT_GET_STOPPED_STATE = 10,
- ACPI_WDAT_SET_STOPPED_STATE = 11,
- ACPI_WDAT_GET_REBOOT = 16,
- ACPI_WDAT_SET_REBOOT = 17,
- ACPI_WDAT_GET_SHUTDOWN = 18,
- ACPI_WDAT_SET_SHUTDOWN = 19,
- ACPI_WDAT_GET_STATUS = 32,
- ACPI_WDAT_SET_STATUS = 33,
- ACPI_WDAT_ACTION_RESERVED = 34 /* 34 and greater are reserved */
+ ACPI_RASF_GET_PATROL_PARAMETERS = 1,
+ ACPI_RASF_START_PATROL_SCRUBBER = 2,
+ ACPI_RASF_STOP_PATROL_SCRUBBER = 3
};
-/* Values for Instruction field above */
+/* Channel Command flags */
-enum AcpiWdatInstructions
+#define ACPI_RASF_GENERATE_SCI (1<<15)
+
+/* Status values */
+
+enum AcpiRasfStatus
{
- ACPI_WDAT_READ_VALUE = 0,
- ACPI_WDAT_READ_COUNTDOWN = 1,
- ACPI_WDAT_WRITE_VALUE = 2,
- ACPI_WDAT_WRITE_COUNTDOWN = 3,
- ACPI_WDAT_INSTRUCTION_RESERVED = 4, /* 4 and greater are reserved */
- ACPI_WDAT_PRESERVE_REGISTER = 0x80 /* Except for this value */
+ ACPI_RASF_SUCCESS = 0,
+ ACPI_RASF_NOT_VALID = 1,
+ ACPI_RASF_NOT_SUPPORTED = 2,
+ ACPI_RASF_BUSY = 3,
+ ACPI_RASF_FAILED = 4,
+ ACPI_RASF_ABORTED = 5,
+ ACPI_RASF_INVALID_DATA = 6
};
+/* Status flags */
+
+#define ACPI_RASF_COMMAND_COMPLETE (1)
+#define ACPI_RASF_SCI_DOORBELL (1<<1)
+#define ACPI_RASF_ERROR (1<<2)
+#define ACPI_RASF_STATUS (0x1F<<3)
+
/*******************************************************************************
*
- * WDDT - Watchdog Descriptor Table
+ * SBST - Smart Battery Specification Table
* Version 1
*
- * Conforms to "Using the Intel ICH Family Watchdog Timer (WDT)",
- * Version 001, September 2002
- *
******************************************************************************/
-typedef struct acpi_table_wddt
+typedef struct acpi_table_sbst
{
ACPI_TABLE_HEADER Header; /* Common ACPI table header */
- UINT16 SpecVersion;
- UINT16 TableVersion;
- UINT16 PciVendorId;
- ACPI_GENERIC_ADDRESS Address;
- UINT16 MaxCount; /* Maximum counter value supported */
- UINT16 MinCount; /* Minimum counter value supported */
- UINT16 Period;
- UINT16 Status;
- UINT16 Capability;
-
-} ACPI_TABLE_WDDT;
-
-/* Flags for Status field above */
+ UINT32 WarningLevel;
+ UINT32 LowLevel;
+ UINT32 CriticalLevel;
-#define ACPI_WDDT_AVAILABLE (1)
-#define ACPI_WDDT_ACTIVE (1<<1)
-#define ACPI_WDDT_TCO_OS_OWNED (1<<2)
-#define ACPI_WDDT_USER_RESET (1<<11)
-#define ACPI_WDDT_WDT_RESET (1<<12)
-#define ACPI_WDDT_POWER_FAIL (1<<13)
-#define ACPI_WDDT_UNKNOWN_RESET (1<<14)
-
-/* Flags for Capability field above */
-
-#define ACPI_WDDT_AUTO_RESET (1)
-#define ACPI_WDDT_ALERT_SUPPORT (1<<1)
+} ACPI_TABLE_SBST;
/*******************************************************************************
*
- * WDRT - Watchdog Resource Table
- * Version 1
+ * SDEI - Software Delegated Exception Interface Descriptor Table
*
- * Conforms to "Watchdog Timer Hardware Requirements for Windows Server 2003",
- * Version 1.01, August 28, 2006
+ * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A,
+ * May 8th, 2017. Copyright 2017 ARM Ltd.
*
******************************************************************************/
-typedef struct acpi_table_wdrt
+typedef struct acpi_table_sdei
{
ACPI_TABLE_HEADER Header; /* Common ACPI table header */
- ACPI_GENERIC_ADDRESS ControlRegister;
- ACPI_GENERIC_ADDRESS CountRegister;
- UINT16 PciDeviceId;
- UINT16 PciVendorId;
- UINT8 PciBus; /* PCI Bus number */
- UINT8 PciDevice; /* PCI Device number */
- UINT8 PciFunction; /* PCI Function number */
- UINT8 PciSegment; /* PCI Segment number */
- UINT16 MaxCount; /* Maximum counter value supported */
- UINT8 Units;
-} ACPI_TABLE_WDRT;
+} ACPI_TABLE_SDEI;
/*******************************************************************************
*
- * WSMT - Windows SMM Security Migrations Table
+ * SDEV - Secure Devices Table (ACPI 6.2)
* Version 1
*
- * Conforms to "Windows SMM Security Migrations Table",
- * Version 1.0, April 18, 2016
- *
******************************************************************************/
-typedef struct acpi_table_wsmt
+typedef struct acpi_table_sdev
{
ACPI_TABLE_HEADER Header; /* Common ACPI table header */
- UINT32 ProtectionFlags;
-} ACPI_TABLE_WSMT;
+} ACPI_TABLE_SDEV;
+
+
+typedef struct acpi_sdev_header
+{
+ UINT8 Type;
+ UINT8 Flags;
+ UINT16 Length;
+
+} ACPI_SDEV_HEADER;
+
+
+/* Values for subtable type above */
+
+enum AcpiSdevType
+{
+ ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0,
+ ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1,
+ ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */
+};
+
+/* Values for flags above */
+
+#define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1)
-/* Flags for ProtectionFlags field above */
+/*
+ * SDEV subtables
+ */
+
+/* 0: Namespace Device Based Secure Device Structure */
+
+typedef struct acpi_sdev_namespace
+{
+ ACPI_SDEV_HEADER Header;
+ UINT16 DeviceIdOffset;
+ UINT16 DeviceIdLength;
+ UINT16 VendorDataOffset;
+ UINT16 VendorDataLength;
+
+} ACPI_SDEV_NAMESPACE;
+
+/* 1: PCIe Endpoint Device Based Device Structure */
+
+typedef struct acpi_sdev_pcie
+{
+ ACPI_SDEV_HEADER Header;
+ UINT16 Segment;
+ UINT16 StartBus;
+ UINT16 PathOffset;
+ UINT16 PathLength;
+ UINT16 VendorDataOffset;
+ UINT16 VendorDataLength;
+
+} ACPI_SDEV_PCIE;
+
+/* 1a: PCIe Endpoint path entry */
+
+typedef struct acpi_sdev_pcie_path
+{
+ UINT8 Device;
+ UINT8 Function;
-#define ACPI_WSMT_FIXED_COMM_BUFFERS (1)
-#define ACPI_WSMT_COMM_BUFFER_NESTED_PTR_PROTECTION (2)
-#define ACPI_WSMT_SYSTEM_RESOURCE_PROTECTION (4)
+} ACPI_SDEV_PCIE_PATH;
/* Reset to default packing */
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