[UNIATA] Update to version 0.47. CORE-15870

[reactos.git] / drivers / storage / ide / uniata / bm_devs_decl.h

diff --git a/drivers/storage/ide/uniata/bm_devs_decl.h b/drivers/storage/ide/uniata/bm_devs_decl.h
index 16070cd..15c6a72 100644 (file)
--- a/drivers/storage/ide/uniata/bm_devs_decl.h
+++ b/drivers/storage/ide/uniata/bm_devs_decl.h
@@ -630,6 +630,8 @@ typedef struct _BUSMASTER_CONTROLLER_INFORMATION {
 #define UNIATA_AHCI             0x02000000
 #define UNIATA_NO80CHK          0x01000000
 #define UNIATA_CHAN_TIMINGS     0x00800000 /* controller has common timing settings for master/slave */
+#define UNIATA_AHCI_ALT_SIG     0x00400000 /* Some weird controllers do not return signature in
+                                             FIS receive area. Read it from PxSIG register */
 
 #define ATPOLD         0x0100