/*
- * Lowlevel memory managment definitions
+ * kernel internal memory management definitions for x86
*/
-
#pragma once
-struct _EPROCESS;
-PULONG MmGetPageDirectory(VOID);
-
#ifdef _PAE_
#define _MI_PAGING_LEVELS 3
#else
#define _MI_PAGING_LEVELS 2
#endif
-#define PAGE_MASK(x) ((x)&(~0xfff))
-#define PAE_PAGE_MASK(x) ((x)&(~0xfffLL))
-
-/* MMPTE related defines */
-#define MM_EMPTY_PTE_LIST ((ULONG)0xFFFFF)
-#define MM_EMPTY_LIST ((ULONG_PTR)-1)
-
-/* Base addresses of PTE and PDE */
-#define PAGETABLE_MAP (0xc0000000)
-#define PAGEDIRECTORY_MAP (0xc0000000 + (PAGETABLE_MAP / (1024)))
+/* Memory layout base addresses */
+#define MI_USER_PROBE_ADDRESS (PVOID)0x7FFF0000
+#define MI_DEFAULT_SYSTEM_RANGE_START (PVOID)0x80000000
+#ifndef PAE
+#define HYPER_SPACE 0xC0400000
+#define HYPER_SPACE_END 0xC07FFFFF
+#else
+#define HYPER_SPACE 0xC0800000
+#define HYPER_SPACE_END 0xC0BFFFFF
+#endif
+#define MI_SYSTEM_CACHE_WS_START (PVOID)0xC0C00000
+#define MI_PAGED_POOL_START (PVOID)0xE1000000
+#define MI_NONPAGED_POOL_END (PVOID)0xFFBE0000
+#define MI_DEBUG_MAPPING (PVOID)0xFFBFF000
+#define MI_HIGHEST_SYSTEM_ADDRESS (PVOID)0xFFFFFFFF
/* FIXME: These are different for PAE */
#define PTE_BASE 0xC0000000
#define PDE_BASE 0xC0300000
#define PDE_TOP 0xC0300FFF
#define PTE_TOP 0xC03FFFFF
-#define HYPER_SPACE 0xC0400000
-#define HYPER_SPACE_END 0xC07FFFFF
#define PTE_PER_PAGE 0x400
+#define PDE_PER_PAGE 0x400
+#define PPE_PER_PAGE 1
-/* Converting address to a corresponding PDE or PTE entry */
-#define MiAddressToPde(x) \
- ((PMMPDE)(((((ULONG)(x)) >> 22) << 2) + PAGEDIRECTORY_MAP))
-#define MiAddressToPte(x) \
- ((PMMPTE)(((((ULONG)(x)) >> 12) << 2) + PAGETABLE_MAP))
-#define MiAddressToPteOffset(x) \
- ((((ULONG)(x)) << 10) >> 22)
-
-//
-// Convert a PTE into a corresponding address
-//
-#define MiPteToAddress(PTE) ((PVOID)((ULONG)(PTE) << 10))
-#define MiPdeToAddress(PDE) ((PVOID)((ULONG)(PDE) << 20))
-#define MiPdeToPte(PDE) ((PMMPTE)MiPteToAddress(PDE))
-#define MiPteToPde(PTE) ((PMMPDE)MiAddressToPte(PTE))
+/* Misc address definitions */
+#define MI_SYSTEM_PTE_BASE (PVOID)MiAddressToPte(NULL)
+#define MM_HIGHEST_VAD_ADDRESS \
+ (PVOID)((ULONG_PTR)MM_HIGHEST_USER_ADDRESS - (16 * PAGE_SIZE))
+#define MI_MAPPING_RANGE_START (ULONG)HYPER_SPACE
+#define MI_MAPPING_RANGE_END (MI_MAPPING_RANGE_START + \
+ MI_HYPERSPACE_PTES * PAGE_SIZE)
+#define MI_DUMMY_PTE (PMMPTE)((ULONG_PTR)MI_MAPPING_RANGE_END + \
+ PAGE_SIZE)
+#define MI_VAD_BITMAP (PMMPTE)((ULONG_PTR)MI_DUMMY_PTE + \
+ PAGE_SIZE)
+#define MI_WORKING_SET_LIST (PMMPTE)((ULONG_PTR)MI_VAD_BITMAP + \
+ PAGE_SIZE)
+
+/* Memory sizes */
+#define MI_MIN_PAGES_FOR_NONPAGED_POOL_TUNING ((255 * _1MB) >> PAGE_SHIFT)
+#define MI_MIN_PAGES_FOR_SYSPTE_TUNING ((19 * _1MB) >> PAGE_SHIFT)
+#define MI_MIN_PAGES_FOR_SYSPTE_BOOST ((32 * _1MB) >> PAGE_SHIFT)
+#define MI_MIN_PAGES_FOR_SYSPTE_BOOST_BOOST ((256 * _1MB) >> PAGE_SHIFT)
+#define MI_MIN_INIT_PAGED_POOLSIZE (32 * _1MB)
+#define MI_MAX_INIT_NONPAGED_POOL_SIZE (128 * _1MB)
+#define MI_MAX_NONPAGED_POOL_SIZE (128 * _1MB)
+#define MI_SYSTEM_VIEW_SIZE (32 * _1MB)
+#define MI_SESSION_VIEW_SIZE (48 * _1MB)
+#define MI_SESSION_POOL_SIZE (16 * _1MB)
+#define MI_SESSION_IMAGE_SIZE (8 * _1MB)
+#define MI_SESSION_WORKING_SET_SIZE (4 * _1MB)
+#define MI_SESSION_SIZE (MI_SESSION_VIEW_SIZE + \
+ MI_SESSION_POOL_SIZE + \
+ MI_SESSION_IMAGE_SIZE + \
+ MI_SESSION_WORKING_SET_SIZE)
+#define MI_MIN_ALLOCATION_FRAGMENT (4 * _1KB)
+#define MI_ALLOCATION_FRAGMENT (64 * _1KB)
+#define MI_MAX_ALLOCATION_FRAGMENT (2 * _1MB)
+
+/* Misc constants */
+#define MM_PTE_SOFTWARE_PROTECTION_BITS 5
+#define MI_MIN_SECONDARY_COLORS 8
+#define MI_SECONDARY_COLORS 64
+#define MI_MAX_SECONDARY_COLORS 1024
+#define MI_MAX_FREE_PAGE_LISTS 4
+#define MI_HYPERSPACE_PTES (256 - 1)
+#define MI_ZERO_PTES (32)
+#define MI_MAX_ZERO_BITS 21
+#define SESSION_POOL_LOOKASIDES 26
-#define ADDR_TO_PAGE_TABLE(v) (((ULONG)(v)) / (1024 * PAGE_SIZE))
-#define ADDR_TO_PDE_OFFSET(v) (((ULONG)(v)) / (1024 * PAGE_SIZE))
-#define ADDR_TO_PTE_OFFSET(v) ((((ULONG)(v)) % (1024 * PAGE_SIZE)) / PAGE_SIZE)
+/* MMPTE related defines */
+#define MM_EMPTY_PTE_LIST ((ULONG)0xFFFFF)
+#define MM_EMPTY_LIST ((ULONG_PTR)-1)
-#define MiGetPdeOffset ADDR_TO_PDE_OFFSET
/* Easy accessing PFN in PTE */
#define PFN_FROM_PTE(v) ((v)->u.Hard.PageFrameNumber)
-#define MI_MAKE_LOCAL_PAGE(x) ((x)->u.Hard.Global = 0)
+/* Macros for portable PTE modification */
#define MI_MAKE_DIRTY_PAGE(x) ((x)->u.Hard.Dirty = 1)
+#define MI_MAKE_CLEAN_PAGE(x) ((x)->u.Hard.Dirty = 0)
#define MI_MAKE_ACCESSED_PAGE(x) ((x)->u.Hard.Accessed = 1)
#define MI_PAGE_DISABLE_CACHE(x) ((x)->u.Hard.CacheDisable = 1)
#define MI_PAGE_WRITE_THROUGH(x) ((x)->u.Hard.WriteThrough = 1)
#define MI_MAKE_WRITE_PAGE(x) ((x)->u.Hard.Writable = 1)
#endif
-#define PAGE_TO_SECTION_PAGE_DIRECTORY_OFFSET(x) \
- ((x) / (4*1024*1024))
+/* On x86, these two are the same */
+#define MI_WRITE_VALID_PPE MI_WRITE_VALID_PTE
-#define PAGE_TO_SECTION_PAGE_TABLE_OFFSET(x) \
- ((((x)) % (4*1024*1024)) / (4*1024))
+/* Convert an address to a corresponding PTE */
+#define MiAddressToPte(x) \
+ ((PMMPTE)(((((ULONG)(x)) >> 12) << 2) + PTE_BASE))
-#define NR_SECTION_PAGE_TABLES 1024
-#define NR_SECTION_PAGE_ENTRIES 1024
+/* Convert an address to a corresponding PDE */
+#define MiAddressToPde(x) \
+ ((PMMPDE)(((((ULONG)(x)) >> 22) << 2) + PDE_BASE))
-#define TEB_BASE 0x7FFDE000
+/* Convert an address to a corresponding PTE offset/index */
+#define MiAddressToPteOffset(x) \
+ ((((ULONG)(x)) << 10) >> 22)
-#define MI_HYPERSPACE_PTES (256 - 1)
-#define MI_ZERO_PTES (32)
-#define MI_MAPPING_RANGE_START (ULONG)HYPER_SPACE
-#define MI_MAPPING_RANGE_END (MI_MAPPING_RANGE_START + \
- MI_HYPERSPACE_PTES * PAGE_SIZE)
-#define MI_DUMMY_PTE (PMMPTE)((ULONG_PTR)MI_MAPPING_RANGE_END + \
- PAGE_SIZE)
-#define MI_VAD_BITMAP (PMMPTE)((ULONG_PTR)MI_DUMMY_PTE + \
- PAGE_SIZE)
-#define MI_WORKING_SET_LIST (PMMPTE)((ULONG_PTR)MI_VAD_BITMAP + \
- PAGE_SIZE)
+/* Convert an address to a corresponding PDE offset/index */
+#define MiAddressToPdeOffset(x) \
+ (((ULONG)(x)) / (1024 * PAGE_SIZE))
+#define MiGetPdeOffset MiAddressToPdeOffset
-/* On x86, these two are the same */
-#define MMPDE MMPTE
-#define PMMPDE PMMPTE
+/* Convert a PTE/PDE into a corresponding address */
+#define MiPteToAddress(_Pte) ((PVOID)((ULONG)(_Pte) << 10))
+#define MiPdeToAddress(_Pde) ((PVOID)((ULONG)(_Pde) << 20))
-/*
-* FIXME - different architectures have different cache line sizes...
-*/
-#define MM_CACHE_LINE_SIZE 32
+/* Translate between P*Es */
+#define MiPdeToPte(_Pde) ((PMMPTE)MiPteToAddress(_Pde))
+#define MiPteToPde(_Pte) ((PMMPDE)MiAddressToPte(_Pte))
+
+/* Check P*E boundaries */
+#define MiIsPteOnPdeBoundary(PointerPte) \
+ ((((ULONG_PTR)PointerPte) & (PAGE_SIZE - 1)) == 0)
+
+//
+// Decodes a Prototype PTE into the underlying PTE
+//
+#define MiProtoPteToPte(x) \
+ (PMMPTE)((ULONG_PTR)MmPagedPoolStart + \
+ (((x)->u.Proto.ProtoAddressHigh << 9) | (x)->u.Proto.ProtoAddressLow << 2))
+
+//
+// Decodes a Prototype PTE into the underlying PTE
+//
+#define MiSubsectionPteToSubsection(x) \
+ ((x)->u.Subsect.WhichPool == PagedPool) ? \
+ (PMMPTE)((ULONG_PTR)MmSubsectionBase + \
+ (((x)->u.Subsect.SubsectionAddressHigh << 7) | \
+ (x)->u.Subsect.SubsectionAddressLow << 3)) : \
+ (PMMPTE)((ULONG_PTR)MmNonPagedPoolEnd - \
+ (((x)->u.Subsect.SubsectionAddressHigh << 7) | \
+ (x)->u.Subsect.SubsectionAddressLow << 3))
projects / reactos.git / blobdiff