ULONG KeIcacheFlushCount = 0;
ULONG KiDmaIoCoherency = 0;
ULONG KePrefetchNTAGranularity = 32;
-CHAR KeNumberProcessors;
+CHAR KeNumberProcessors = 0;
KAFFINITY KeActiveProcessors = 1;
BOOLEAN KiI386PentiumLockErrataPresent;
BOOLEAN KiSMTProcessorsPresent;
}
}
+#define print_supported(kf_value) ((FeatureBits & kf_value) ? #kf_value : "")
+ DPRINT1("Supported CPU features : %s %s %s %s %s %s %s %s %s %s %s %s %s %s %s %s %s %s %s %s %s\n",
+ print_supported(KF_V86_VIS),
+ print_supported(KF_RDTSC),
+ print_supported(KF_CR4),
+ print_supported(KF_CMOV),
+ print_supported(KF_GLOBAL_PAGE),
+ print_supported(KF_LARGE_PAGE),
+ print_supported(KF_MTRR),
+ print_supported(KF_CMPXCHG8B),
+ print_supported(KF_MMX),
+ print_supported(KF_WORKING_PTE),
+ print_supported(KF_PAT),
+ print_supported(KF_FXSR),
+ print_supported(KF_FAST_SYSCALL),
+ print_supported(KF_XMMI),
+ print_supported(KF_3DNOW),
+ print_supported(KF_AMDK6MTRR),
+ print_supported(KF_XMMI64),
+ print_supported(KF_DTS),
+ print_supported(KF_NX_BIT),
+ print_supported(KF_NX_DISABLED),
+ print_supported(KF_NX_ENABLED));
+#undef print_supported
+
/* Return the Feature Bits */
return FeatureBits;
}
/* Check if we support CPUID 0x80000006 */
CPUID(0x80000000, &Data[0], &Data[1], &Data[2], &Data[3]);
if (Data[0] >= 0x80000006)
- {
+ {
/* Get 2nd level cache and tlb size */
CPUID(0x80000006, &Data[0], &Data[1], &Data[2], &Data[3]);
/* Now load NPX state from the NPX area */
FxSaveArea = KiGetThreadNpxArea(Thread);
- Ke386FxStore(FxSaveArea);
+ Ke386FxStore(FxSaveArea);
}
else
{