ULONG MmProductType;
MM_SYSTEMSIZE MmSystemSize;
-/*
- * These values store the cache working set minimums and maximums, in pages
- *
- * The minimum value is boosted on systems with more than 24MB of RAM, and cut
- * down to only 32 pages on embedded (<24MB RAM) systems.
- *
- * An extra boost of 2MB is given on systems with more than 33MB of RAM.
- */
-PFN_NUMBER MmSystemCacheWsMinimum = 288;
-PFN_NUMBER MmSystemCacheWsMaximum = 350;
-
-/* FIXME: Move to cache/working set code later */
-BOOLEAN MmLargeSystemCache;
-
/* PRIVATE FUNCTIONS **********************************************************/
//
else
{
/* Next PDE mapped address */
- BaseAddress += PDE_MAPPED_VA;
+ BaseAddress += PTE_COUNT * PAGE_SIZE;
}
/* Next PTE */
return TRUE;
}
-VOID
-NTAPI
-MiAddHalIoMappings(VOID)
-{
- PVOID BaseAddress;
- PMMPTE PointerPde;
- PMMPTE PointerPte;
- ULONG i, j, PdeCount;
- PFN_NUMBER PageFrameIndex;
-
- /* HAL Heap address -- should be on a PDE boundary */
- BaseAddress = (PVOID)0xFFC00000;
- ASSERT(MiAddressToPteOffset(BaseAddress) == 0);
-
- /* Check how many PDEs the heap has */
- PointerPde = MiAddressToPde(BaseAddress);
- PdeCount = PDE_COUNT - ADDR_TO_PDE_OFFSET(BaseAddress);
- for (i = 0; i < PdeCount; i++)
- {
- /* Does the HAL own this mapping? */
- if ((PointerPde->u.Hard.Valid == 1) &&
- (PointerPde->u.Hard.LargePage == 0))
- {
- /* Get the PTE for it and scan each page */
- PointerPte = MiAddressToPte(BaseAddress);
- for (j = 0 ; j < PTE_COUNT; j++)
- {
- /* Does the HAL own this page? */
- if (PointerPte->u.Hard.Valid == 1)
- {
- /* Is the HAL using it for device or I/O mapped memory? */
- PageFrameIndex = PFN_FROM_PTE(PointerPte);
- if (!MiGetPfnEntry(PageFrameIndex))
- {
- /* FIXME: For PAT, we need to track I/O cache attributes for coherency */
- DPRINT1("HAL I/O Mapping at %p is unsafe\n", BaseAddress);
- }
- }
-
- /* Move to the next page */
- BaseAddress = (PVOID)((ULONG_PTR)BaseAddress + PAGE_SIZE);
- PointerPte++;
- }
- }
- else
- {
- /* Move to the next address */
- BaseAddress = (PVOID)((ULONG_PTR)BaseAddress + PDE_MAPPED_VA);
- }
-
- /* Move to the next PDE */
- PointerPde++;
- }
-}
-
VOID
NTAPI
MmDumpArmPfnDatabase(VOID)
}
}
- /* Look for large page cache entries that need caching */
- MiSyncCachedRanges();
-
- /* Loop for HAL Heap I/O device mappings that need coherency tracking */
- MiAddHalIoMappings();
-
- /* Set the initial resident page count */
- MmResidentAvailablePages = MmAvailablePages - 32;
-
- /* Initialize large page structures on PAE/x64, and MmProcessList on x86 */
- MiInitializeLargePageSupport();
-
- /* Check if the registry says any drivers should be loaded with large pages */
- MiInitializeDriverLargePageList();
-
- /* Relocate the boot drivers into system PTE space and fixup their PFNs */
- MiReloadBootLoadedDrivers(LoaderBlock);
-
- /* FIXME: Call out into Driver Verifier for initialization */
-
+ //
+ // Size up paged pool and build the shadow system page directory
+ //
+ MiBuildPagedPool();
+
/* Check how many pages the system has */
if (MmNumberOfPhysicalPages <= (13 * _1MB))
{
}
else if (MmNumberOfPhysicalPages <= (19 * _1MB))
{
- /* Set small system and add 100 pages for the cache */
+ /* Set small system */
MmSystemSize = MmSmallSystem;
- MmSystemCacheWsMinimum += 100;
}
else
{
- /* Set medium system and add 400 pages for the cache */
+ /* Set medium system */
MmSystemSize = MmMediumSystem;
- MmSystemCacheWsMinimum += 400;
- }
-
- /* Check for less than 24MB */
- if (MmNumberOfPhysicalPages < ((24 * _1MB) / PAGE_SIZE))
- {
- /* No more than 32 pages */
- MmSystemCacheWsMinimum = 32;
}
/* Check for more than 32MB */
}
}
}
-
- /* Check for more than 33 MB */
- if (MmNumberOfPhysicalPages > ((33 * _1MB) / PAGE_SIZE))
- {
- /* Add another 500 pages to the cache */
- MmSystemCacheWsMinimum += 500;
- }
-
+
/* Now setup the shared user data fields */
ASSERT(SharedUserData->NumberOfPhysicalPages == 0);
SharedUserData->NumberOfPhysicalPages = MmNumberOfPhysicalPages;
/* Update working set tuning parameters */
MiAdjustWorkingSetManagerParameters(!MmProductType);
-
- /* Finetune the page count by removing working set and NP expansion */
- MmResidentAvailablePages -= MiExpansionPoolPagesInitialCharge;
- MmResidentAvailablePages -= MmSystemCacheWsMinimum;
- MmResidentAvailableAtInit = MmResidentAvailablePages;
- if (MmResidentAvailablePages <= 0)
- {
- /* This should not happen */
- DPRINT1("System cache working set too big\n");
- return FALSE;
- }
-
- /* Size up paged pool and build the shadow system page directory */
- MiBuildPagedPool();
}
//