[REACTOS] Fix 64 bit build (#465)

[reactos.git] / ntoskrnl / mm / ARM3 / mminit.c

diff --git a/ntoskrnl/mm/ARM3/mminit.c b/ntoskrnl/mm/ARM3/mminit.c
index 76d4a4b..e8cf1dc 100644 (file)
--- a/ntoskrnl/mm/ARM3/mminit.c
+++ b/ntoskrnl/mm/ARM3/mminit.c
@@ -240,8 +240,9 @@ PMMPTE MiHighestUserPxe;
 #endif
 
 /* These variables define the system cache address space */
-PVOID MmSystemCacheStart;
+PVOID MmSystemCacheStart = (PVOID)MI_SYSTEM_CACHE_START;
 PVOID MmSystemCacheEnd;
+ULONG MmSizeOfSystemCacheInPages;
 MMSUPPORT MmSystemCacheWs;
 
 //
@@ -386,6 +387,15 @@ PFN_NUMBER MiNumberOfFreePages = 0;
 ULONG MmCritsectTimeoutSeconds = 150; // NT value: 720 * 60 * 60; (30 days)
 LARGE_INTEGER MmCriticalSectionTimeout;
 
+//
+// Throttling limits for Cc (in pages)
+// Above top, we don't throttle
+// Above bottom, we throttle depending on the amount of modified pages
+// Otherwise, we throttle!
+//
+ULONG MmThrottleTop;
+ULONG MmThrottleBottom;
+
 /* PRIVATE FUNCTIONS **********************************************************/
 
 VOID
@@ -2073,6 +2083,13 @@ MmArmInitSystem(IN ULONG Phase,
         MiLowNonPagedPoolEvent = &MiTempEvent;
         MiHighNonPagedPoolEvent = &MiTempEvent;
 
+        //
+        // Default throttling limits for Cc
+        // May be ajusted later on depending on system type
+        //
+        MmThrottleTop = 450;
+        MmThrottleBottom = 127;
+
         //
         // Define the basic user vs. kernel address space separation
         //
@@ -2460,6 +2477,10 @@ MmArmInitSystem(IN ULONG Phase,
             /* Set Windows NT Workstation product type */
             SharedUserData->NtProductType = NtProductWinNt;
             MmProductType = 0;
+
+            /* For this product, we wait till the last moment to throttle */
+            MmThrottleTop = 250;
+            MmThrottleBottom = 30;
         }
         else
         {
@@ -2478,6 +2499,10 @@ MmArmInitSystem(IN ULONG Phase,
             /* Set the product type, and make the system more aggressive with low memory */
             MmProductType = 1;
             MmMinimumFreePages = 81;
+
+            /* We will throttle earlier to preserve memory */
+            MmThrottleTop = 450;
+            MmThrottleBottom = 80;
         }
 
         /* Update working set tuning parameters */
@@ -2494,6 +2519,14 @@ MmArmInitSystem(IN ULONG Phase,
             return FALSE;
         }
 
+        /* Define limits for system cache */
+#ifdef _M_AMD64
+        MmSizeOfSystemCacheInPages = (MI_SYSTEM_CACHE_END - MI_SYSTEM_CACHE_START) / PAGE_SIZE;
+#else
+        MmSizeOfSystemCacheInPages = ((ULONG_PTR)MI_PAGED_POOL_START - (ULONG_PTR)MI_SYSTEM_CACHE_START) / PAGE_SIZE;
+#endif
+        MmSystemCacheEnd = (PVOID)((ULONG_PTR)MmSystemCacheStart + (MmSizeOfSystemCacheInPages * PAGE_SIZE) - 1);
+
         /* Initialize the system cache */
         //MiInitializeSystemCache(MmSystemCacheWsMinimum, MmAvailablePages);