Remove the need to relocate freeldr. We now use it in-place as stored in
[reactos.git] / reactos / boot / freeldr / bootsect / ofw_util.s
index 1da50c9..2d2b5ef 100644 (file)
@@ -1,4 +1,105 @@
        .section .text
+
+       .globl ofw_functions_addr
+ofw_functions_addr:
+       .long   ofw_functions
+
+       .align  4
+call_freeldr:
+       /* Get the address of the functions list --
+        * Note:
+        * Because of little endian switch we must use an even number of
+        * instructions here..  Pad with a nop if needed. */
+       mfmsr   %r10
+       ori     %r10,%r10,1
+       nop
+       mtmsr   %r10
+       
+       /* Note that this is little-endian from here on */
+       blr
+       nop
+
+       .align  4
+call_ofw:
+       /* R3 has the function offset to call (n * 4) 
+        * Other arg registers are unchanged.
+        * Note that these 4 instructions are in reverse order due to
+        * little-endian convention */
+       stw     %r8,24(%r1)
+       subi    %r1,%r1,0x100
+       stw     %r8,0(%r1)
+       mflr    %r8
+       /* - */
+       stw     %r3,4(%r1)
+       stw     %r4,8(%r1)
+       stw     %r5,12(%r1)
+       stw     %r6,16(%r1)
+       /* - */
+       stw     %r7,20(%r1)
+       stw     %r9,28(%r1)
+       stw     %r10,32(%r1)
+       stw     %r20,36(%r1)
+       
+       /* - */ 
+       subi    %r20,%r20,1
+       mfmsr   %r20
+       mtmsr   %r20
+       nop
+
+       sync
+       isync
+
+       /* BE MODE */
+       mflr    %r8
+       stw     %r8,16(%r1)
+
+       lis     %r10,0xe00000@ha
+       addi    %r8,%r10,ofw_functions_addr@l
+       /* - */
+       lwz     %r9,0(%r8)
+       add     %r8,%r3,%r9
+       lwz     %r9,0(%r8)
+       mtctr   %r9
+       
+       /* - */
+       mr      %r3,%r4
+       mr      %r4,%r5
+       mr      %r5,%r6
+       mr      %r6,%r7
+       /* - */
+       mr      %r7,%r8
+       mr      %r8,%r9
+       
+       /* Call ofw proxy function */
+       bctrl
+       nop
+
+       /* Ok, go back to little endian */
+       mfmsr   %r10
+       ori     %r10,%r10,1
+       nop
+       mtmsr   %r10
+
+       sync
+       isync
+
+       /* LE MODE */
+       mtlr    %r8
+       lwz     %r8,0(%r1)
+       lwz     %r4,8(%r1)
+       lwz     %r5,12(%r1)
+       /* - */
+       lwz     %r6,16(%r1)
+       lwz     %r7,20(%r1)
+       lwz     %r8,24(%r1)
+       lwz     %r9,28(%r1)
+       /* - */
+       lwz     %r10,32(%r1)
+       lwz     %r20,36(%r1)
+       /* - */
+       blr
+       addi    %r1,%r1,0x100
+
 prim_strlen:
        mr      %r5,%r3
 prim_strlen_loop:      
@@ -14,8 +115,12 @@ prim_strlen_done:
        
 copy_bits:
        cmp     0,0,%r3,%r4
-       beqlr
+       bgelr
 
+       andi.   %r6,%r3,0xfff
+       beql    ofw_dumpregs
+       mtdec   %r3
+       
        lwz     %r6,0(%r3)
        stw     %r6,0(%r5)
        addi    %r3,%r3,4
@@ -366,3 +471,29 @@ ofw_register_special:
                
        blr
        
+ofw_chosen_name:
+       .ascii  "/chosen\0"
+
+ofw_stdout_name:
+       .ascii  "stdout\0"
+
+ofw_memory_name:
+       .ascii  "/memory@0\0"
+
+ofw_reg_name:
+       .ascii  "reg\0"
+       
+freeldr_reg_init:
+       .ascii  "r\0"
+
+freeldr_reg_lr:        
+       .ascii  "lr \0"
+
+freeldr_reg_cr:        
+       .ascii  "cr \0"
+       
+freeldr_reg_ctr:       
+       .ascii  "ctr\0"
+
+freeldr_reg_msr:       
+       .ascii  "msr\0"