[PCI]: Add PCI IRQ Routing Table structure to Shared, Internal PCI Header (based...
[reactos.git] / reactos / boot / freeldr / freeldr / arch / i386 / hwpci.c
index cd774b8..20960cf 100644 (file)
@@ -13,9 +13,9 @@
  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  *  GNU General Public License for more details.
  *
- *  You should have received a copy of the GNU General Public License
- *  along with this program; if not, write to the Free Software
- *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  */
 
 #include <freeldr.h>
 #define NDEBUG
 #include <debug.h>
 
-#include <pshpack1.h>
-
-typedef struct _ROUTING_SLOT
-{
-  UCHAR  BusNumber;
-  UCHAR  DeviceNumber;
-  UCHAR  LinkA;
-  USHORT BitmapA;
-  UCHAR  LinkB;
-  USHORT BitmapB;
-  UCHAR  LinkC;
-  USHORT BitmapC;
-  UCHAR  LinkD;
-  USHORT BitmapD;
-  UCHAR  SlotNumber;
-  UCHAR  Reserved;
-} ROUTING_SLOT, *PROUTING_SLOT;
-
-typedef struct _PCI_IRQ_ROUTING_TABLE
-{
-  ULONG Signature;
-  USHORT Version;
-  USHORT Size;
-  UCHAR  RouterBus;
-  UCHAR  RouterSlot;
-  USHORT ExclusiveIRQs;
-  ULONG CompatibleRouter;
-  ULONG MiniportData;
-  UCHAR  Reserved[11];
-  UCHAR  Checksum;
-  ROUTING_SLOT Slot[1];
-} PCI_IRQ_ROUTING_TABLE, *PPCI_IRQ_ROUTING_TABLE;
-
-#include <poppack.h>
-
-typedef struct _PCI_REGISTRY_INFO
-{
-    UCHAR MajorRevision;
-    UCHAR MinorRevision;
-    UCHAR NoBuses;
-    UCHAR HardwareMechanism;
-} PCI_REGISTRY_INFO, *PPCI_REGISTRY_INFO;
-
 static PPCI_IRQ_ROUTING_TABLE
 GetPciIrqRoutingTable(VOID)
 {
@@ -77,14 +34,14 @@ GetPciIrqRoutingTable(VOID)
   Table = (PPCI_IRQ_ROUTING_TABLE)0xF0000;
   while ((ULONG_PTR)Table < 0x100000)
     {
-      if (Table->Signature == 0x52495024)
+      if (Table->Signature == 'RIP$')
        {
          DPRINTM(DPRINT_HWDETECT,
                    "Found signature\n");
 
          Ptr = (PUCHAR)Table;
          Sum = 0;
-         for (i = 0; i < Table->Size; i++)
+         for (i = 0; i < Table->TableSize; i++)
            {
              Sum += Ptr[i];
            }
@@ -132,7 +89,7 @@ FindPciBios(PPCI_REGISTRY_INFO BusData)
       BusData->NoBuses = RegsOut.b.cl + 1;
       BusData->MajorRevision = RegsOut.b.bh;
       BusData->MinorRevision = RegsOut.b.bl;
-      BusData->HardwareMechanism = RegsOut.b.cl;
+      BusData->HardwareMechanism = RegsOut.b.al;
 
       return TRUE;
     }
@@ -156,11 +113,11 @@ DetectPciIrqRoutingTable(PCONFIGURATION_COMPONENT_DATA BusKey)
   Table = GetPciIrqRoutingTable();
   if (Table != NULL)
     {
-      DPRINTM(DPRINT_HWDETECT, "Table size: %u\n", Table->Size);
+      DPRINTM(DPRINT_HWDETECT, "Table size: %u\n", Table->TableSize);
 
       /* Set 'Configuration Data' value */
       Size = FIELD_OFFSET(CM_PARTIAL_RESOURCE_LIST, PartialDescriptors) +
-         2 * sizeof(CM_PARTIAL_RESOURCE_DESCRIPTOR) + Table->Size;
+         2 * sizeof(CM_PARTIAL_RESOURCE_DESCRIPTOR) + Table->TableSize;
       PartialResourceList = MmHeapAlloc(Size);
       if (PartialResourceList == NULL)
       {
@@ -184,10 +141,10 @@ DetectPciIrqRoutingTable(PCONFIGURATION_COMPONENT_DATA BusKey)
       PartialDescriptor = &PartialResourceList->PartialDescriptors[1];
       PartialDescriptor->Type = CmResourceTypeDeviceSpecific;
       PartialDescriptor->ShareDisposition = CmResourceShareUndetermined;
-      PartialDescriptor->u.DeviceSpecificData.DataSize = Table->Size;
+      PartialDescriptor->u.DeviceSpecificData.DataSize = Table->TableSize;
 
       memcpy(&PartialResourceList->PartialDescriptors[2],
-          Table, Table->Size);
+          Table, Table->TableSize);
 
       FldrCreateComponentKey(BusKey,
                              PeripheralClass,