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[PCI]: Add PCI IRQ Routing Table structure to Shared, Internal PCI Header (based...
[reactos.git] / reactos / hal / halx86 / include / bus.h
diff --git a/reactos/hal/halx86/include/bus.h b/reactos/hal/halx86/include/bus.h
index 295bc5d..67a57cf 100644 (file)
--- a/reactos/hal/halx86/include/bus.h
+++ b/reactos/hal/halx86/include/bus.h
@@ -1,5 +1,6 @@
-#ifndef __INTERNAL_HAL_BUS_H
-#define __INTERNAL_HAL_BUS_H
+#pragma once
+
+#define PCI_ADDRESS_MEMORY_SPACE            0x00000000
 
 //
 // Helper Macros
@@ -157,6 +158,109 @@ typedef struct _PCI_REGISTRY_INFO_INTERNAL
     PCI_CARD_DESCRIPTOR CardList[ANYSIZE_ARRAY];
 } PCI_REGISTRY_INFO_INTERNAL, *PPCI_REGISTRY_INFO_INTERNAL;
 
+//
+// PCI Type 1 Ports
+//
+#define PCI_TYPE1_ADDRESS_PORT      (PULONG)0xCF8
+#define PCI_TYPE1_DATA_PORT         0xCFC
+
+//
+// PCI Type 2 Ports
+//
+#define PCI_TYPE2_CSE_PORT          (PUCHAR)0xCF8
+#define PCI_TYPE2_FORWARD_PORT      (PUCHAR)0xCFA
+#define PCI_TYPE2_ADDRESS_BASE      0xC
+
+//
+// PCI Type 1 Configuration Register
+//
+typedef struct _PCI_TYPE1_CFG_BITS
+{
+    union
+    {
+        struct
+        {
+            ULONG Reserved1:2;
+            ULONG RegisterNumber:6;
+            ULONG FunctionNumber:3;
+            ULONG DeviceNumber:5;
+            ULONG BusNumber:8;
+            ULONG Reserved2:7;
+            ULONG Enable:1;
+        } bits;
+
+        ULONG AsULONG;
+    } u;
+} PCI_TYPE1_CFG_BITS, *PPCI_TYPE1_CFG_BITS;
+
+//
+// PCI Type 2 CSE Register
+//
+typedef struct _PCI_TYPE2_CSE_BITS
+{
+    union
+    {
+        struct
+        {
+            UCHAR Enable:1;
+            UCHAR FunctionNumber:3;
+            UCHAR Key:4;
+        } bits;
+
+        UCHAR AsUCHAR;
+    } u;
+} PCI_TYPE2_CSE_BITS, PPCI_TYPE2_CSE_BITS;
+
+//
+// PCI Type 2 Address Register
+//
+typedef struct _PCI_TYPE2_ADDRESS_BITS
+{
+    union
+    {
+        struct
+        {
+            USHORT RegisterNumber:8;
+            USHORT Agent:4;
+            USHORT AddressBase:4;
+        } bits;
+
+        USHORT AsUSHORT;
+    } u;
+} PCI_TYPE2_ADDRESS_BITS, *PPCI_TYPE2_ADDRESS_BITS;
+
+typedef struct _PCI_TYPE0_CFG_CYCLE_BITS
+{
+    union
+    {
+        struct
+        {
+            ULONG Reserved1:2;
+            ULONG RegisterNumber:6;
+            ULONG FunctionNumber:3;
+            ULONG Reserved2:21;
+        } bits;
+        ULONG AsULONG;
+    } u;
+} PCI_TYPE0_CFG_CYCLE_BITS, *PPCI_TYPE0_CFG_CYCLE_BITS;
+
+typedef struct _PCI_TYPE1_CFG_CYCLE_BITS
+{
+    union
+    {
+        struct
+        {
+            ULONG Reserved1:2;
+            ULONG RegisterNumber:6;
+            ULONG FunctionNumber:3;
+            ULONG DeviceNumber:5;
+            ULONG BusNumber:8;
+            ULONG Reserved2:8;
+        } bits;
+        ULONG AsULONG;
+    } u;
+} PCI_TYPE1_CFG_CYCLE_BITS, *PPCI_TYPE1_CFG_CYCLE_BITS;
+
 typedef struct _ARRAY
 {
     ULONG ArraySize;
@@ -172,6 +276,18 @@ typedef struct _HAL_BUS_HANDLER
 
 /* FUNCTIONS *****************************************************************/
 
+/* SHARED (Fake PCI-BUS HANDLER) */
+
+extern PCI_CONFIG_HANDLER PCIConfigHandler;
+extern PCI_CONFIG_HANDLER PCIConfigHandlerType1;
+extern PCI_CONFIG_HANDLER PCIConfigHandlerType2;
+
+PPCI_REGISTRY_INFO_INTERNAL
+NTAPI
+HalpQueryPciRegistryInfo(
+    VOID
+);
+
 VOID
 NTAPI
 HalpPCISynchronizeType1(
@@ -244,34 +360,6 @@ HalpWritePCIConfig(
     IN ULONG Length
 );
 
-ULONG
-NTAPI
-HalpGetSystemInterruptVector(
-    ULONG BusNumber,
-    ULONG BusInterruptLevel,
-    ULONG BusInterruptVector,
-    PKIRQL Irql,
-    PKAFFINITY Affinity
-);
-
-ULONG
-NTAPI
-HalpGetCmosData(
-    IN ULONG BusNumber,
-    IN ULONG SlotNumber,
-    IN PVOID Buffer,
-    IN ULONG Length
-);
-
-ULONG
-NTAPI
-HalpSetCmosData(
-    IN ULONG BusNumber,
-    IN ULONG SlotNumber,
-    IN PVOID Buffer,
-    IN ULONG Length
-);
-
 ULONG
 NTAPI
 HalpGetPCIData(
@@ -307,21 +395,45 @@ HalpAssignPCISlotResources(
     IN OUT PCM_RESOURCE_LIST *pAllocatedResources
 );
 
-VOID
+/* NON-LEGACY */
+
+ULONG
 NTAPI
-HalpInitializePciBus(
-    VOID
+HalpGetSystemInterruptVector_Acpi(
+    ULONG BusNumber,
+    ULONG BusInterruptLevel,
+    ULONG BusInterruptVector,
+    PKIRQL Irql,
+    PKAFFINITY Affinity
+);
+
+ULONG
+NTAPI
+HalpGetCmosData(
+    IN ULONG BusNumber,
+    IN ULONG SlotNumber,
+    IN PVOID Buffer,
+    IN ULONG Length
+);
+
+ULONG
+NTAPI
+HalpSetCmosData(
+    IN ULONG BusNumber,
+    IN ULONG SlotNumber,
+    IN PVOID Buffer,
+    IN ULONG Length
 );
 
 VOID
 NTAPI
-HalpInitializePciStubs(
+HalpInitializePciBus(
     VOID
 );
 
 VOID
 NTAPI
-HalpInitBusHandler(
+HalpInitializePciStubs(
     VOID
 );
 
@@ -358,13 +470,157 @@ HalpFindBusAddressTranslation(
     IN BOOLEAN NextBus
 );
 
+VOID
+NTAPI
+HalpRegisterPciDebuggingDeviceInfo(
+    VOID
+);
+
+/* LEGACY */
+
+BOOLEAN
+NTAPI
+HaliTranslateBusAddress(
+    IN INTERFACE_TYPE InterfaceType,
+    IN ULONG BusNumber,
+    IN PHYSICAL_ADDRESS BusAddress,
+    IN OUT PULONG AddressSpace,
+    OUT PPHYSICAL_ADDRESS TranslatedAddress
+);
+
+BOOLEAN
+NTAPI
+HaliFindBusAddressTranslation(
+    IN PHYSICAL_ADDRESS BusAddress,
+    IN OUT PULONG AddressSpace,
+    OUT PPHYSICAL_ADDRESS TranslatedAddress,
+    IN OUT PULONG_PTR Context,
+    IN BOOLEAN NextBus
+);
+
+NTSTATUS
+NTAPI
+HalpAdjustPCIResourceList(IN PBUS_HANDLER BusHandler,
+                          IN PBUS_HANDLER RootHandler,
+                          IN OUT PIO_RESOURCE_REQUIREMENTS_LIST *pResourceList);
+                          
+ULONG
+NTAPI
+HalpGetPCIIntOnISABus(IN PBUS_HANDLER BusHandler,
+                      IN PBUS_HANDLER RootHandler,
+                      IN ULONG BusInterruptLevel,
+                      IN ULONG BusInterruptVector,
+                      OUT PKIRQL Irql,
+                      OUT PKAFFINITY Affinity);
+VOID
+NTAPI
+HalpPCIPin2ISALine(IN PBUS_HANDLER BusHandler,
+                   IN PBUS_HANDLER RootHandler,
+                   IN PCI_SLOT_NUMBER SlotNumber,
+                   IN PPCI_COMMON_CONFIG PciData);
+        
+VOID
+NTAPI
+HalpPCIISALine2Pin(IN PBUS_HANDLER BusHandler,
+                   IN PBUS_HANDLER RootHandler,
+                   IN PCI_SLOT_NUMBER SlotNumber,
+                   IN PPCI_COMMON_CONFIG PciNewData,
+                   IN PPCI_COMMON_CONFIG PciOldData);
+
+NTSTATUS
+NTAPI
+HalpGetISAFixedPCIIrq(IN PBUS_HANDLER BusHandler,
+                      IN PBUS_HANDLER RootHandler,
+                      IN PCI_SLOT_NUMBER PciSlot,
+                      OUT PSUPPORTED_RANGE *Range);
+                      
+VOID
+NTAPI
+HalpInitBusHandler(
+    VOID
+);
+
+PBUS_HANDLER
+NTAPI
+HalpContextToBusHandler(
+    IN ULONG_PTR ContextValue
+);
+
+PBUS_HANDLER
+FASTCALL
+HaliReferenceHandlerForConfigSpace(
+    IN BUS_DATA_TYPE ConfigType,
+    IN ULONG BusNumber
+);
+
+ULONG
+NTAPI
+HalpNoBusData(
+    IN PBUS_HANDLER BusHandler,
+    IN PBUS_HANDLER RootHandler,
+    IN ULONG SlotNumber,
+    IN PVOID Buffer,
+    IN ULONG Offset,
+    IN ULONG Length
+);
+
+ULONG
+NTAPI
+HalpcGetCmosData(
+    IN PBUS_HANDLER BusHandler,
+    IN PBUS_HANDLER RootHandler,
+    IN ULONG SlotNumber,
+    IN PVOID Buffer,
+    IN ULONG Offset,
+    IN ULONG Length
+);
+
+ULONG
+NTAPI
+HalpcSetCmosData(
+    IN PBUS_HANDLER BusHandler,
+    IN PBUS_HANDLER RootHandler,
+    IN ULONG SlotNumber,
+    IN PVOID Buffer,
+    IN ULONG Offset,
+    IN ULONG Length
+);
+
+BOOLEAN
+NTAPI
+HalpTranslateSystemBusAddress(
+    IN PBUS_HANDLER BusHandler,
+    IN PBUS_HANDLER RootHandler, 
+    IN PHYSICAL_ADDRESS BusAddress,
+    IN OUT PULONG AddressSpace,
+    OUT PPHYSICAL_ADDRESS TranslatedAddress
+);
+
+BOOLEAN
+NTAPI
+HalpTranslateIsaBusAddress(
+    IN PBUS_HANDLER BusHandler,
+    IN PBUS_HANDLER RootHandler, 
+    IN PHYSICAL_ADDRESS BusAddress,
+    IN OUT PULONG AddressSpace,
+    OUT PPHYSICAL_ADDRESS TranslatedAddress
+);
+
+ULONG
+NTAPI
+HalpGetSystemInterruptVector(
+    IN PBUS_HANDLER BusHandler,
+    IN PBUS_HANDLER RootHandler,
+    IN ULONG BusInterruptLevel,
+    IN ULONG BusInterruptVector,
+    OUT PKIRQL Irql,
+    OUT PKAFFINITY Affinity
+);
+                     
 extern ULONG HalpBusType;
 extern BOOLEAN HalpPCIConfigInitialized;
 extern BUS_HANDLER HalpFakePciBusHandler;
 extern ULONG HalpMinPciBus, HalpMaxPciBus;
-
-#endif /* __INTERNAL_HAL_BUS_H */
+extern LIST_ENTRY HalpAllBusHandlers;
 
 /* EOF */
-
-
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