BOOLEAN VerifyLocalAPIC(VOID)
{
SIZE_T reg0, reg1;
- ULONG l, h;
+ ULONG l = 0, h = 0;
/* The version register is read-only in a real APIC */
reg0 = APICRead(APIC_VER);
DPRINT1("Getting VERSION: %x\n", reg0);
#ifdef CONFIG_SMP
VOID APICSendIPI(ULONG Target, ULONG Mode)
{
- ULONG tmp, i, flags;
+ ULONG tmp, i, flags = 0;
/* save flags and disable interrupts */
Ke386SaveFlags(flags);
MpsIRQTrapFrameToTrapFrame(PKIRQ_TRAPFRAME IrqTrapFrame,
PKTRAP_FRAME TrapFrame)
{
+#ifdef _M_AMD64
+ UNIMPLEMENTED;
+#else
TrapFrame->SegGs = (USHORT)IrqTrapFrame->Gs;
TrapFrame->SegFs = (USHORT)IrqTrapFrame->Fs;
TrapFrame->SegEs = (USHORT)IrqTrapFrame->Es;
TrapFrame->Eip = IrqTrapFrame->Eip;
TrapFrame->SegCs = IrqTrapFrame->Cs;
TrapFrame->EFlags = IrqTrapFrame->Eflags;
+#endif
}
VOID
APICSetupLVTT(1000000000);
- TSCPresent = ((PKIPCR)KeGetPcr())->PrcbData.FeatureBits & KF_RDTSC ? TRUE : FALSE;
+ TSCPresent = KeGetCurrentPrcb()->FeatureBits & KF_RDTSC ? TRUE : FALSE;
/*
* The timer chip counts down to zero. Let's wait
DPRINT("CPU clock speed is %ld.%04ld MHz.\n",
CPUMap[CPU].CoreSpeed/1000000,
CPUMap[CPU].CoreSpeed%1000000);
- ((PKIPCR)KeGetPcr())->PrcbData.MHz = CPUMap[CPU].CoreSpeed/1000000;
+ KeGetCurrentPrcb()->MHz = CPUMap[CPU].CoreSpeed/1000000;
}
CPUMap[CPU].BusSpeed = (HZ * (long)(tt1 - tt2) * APIC_DIVISOR);
}
VOID
-SetInterruptGate(ULONG index, ULONG address)
+SetInterruptGate(ULONG index, ULONG_PTR address)
{
+#ifdef _M_AMD64
+ KIDTENTRY64 *idt;
+
+ idt = &KeGetPcr()->IdtBase[index];
+
+ idt->OffsetLow = address & 0xffff;
+ idt->Selector = KGDT_64_R0_CODE;
+ idt->IstIndex = 0;
+ idt->Reserved0 = 0;
+ idt->Type = 0x0e;
+ idt->Dpl = 0;
+ idt->Present = 1;
+ idt->OffsetMiddle = (address >> 16) & 0xffff;
+ idt->OffsetHigh = address >> 32;
+ idt->Reserved1 = 0;
+ idt->Alignment = 0;
+#else
KIDTENTRY *idt;
KIDT_ACCESS Access;
idt->Selector = KGDT_R0_CODE;
idt->Access = Access.Value;
idt->ExtendedOffset = address >> 16;
+#endif
}
VOID HaliInitBSP(VOID)
BSPInitialized = TRUE;
/* Setup interrupt handlers */
- SetInterruptGate(LOCAL_TIMER_VECTOR, (ULONG)MpsTimerInterrupt);
- SetInterruptGate(ERROR_VECTOR, (ULONG)MpsErrorInterrupt);
- SetInterruptGate(SPURIOUS_VECTOR, (ULONG)MpsSpuriousInterrupt);
+ SetInterruptGate(LOCAL_TIMER_VECTOR, (ULONG_PTR)MpsTimerInterrupt);
+ SetInterruptGate(ERROR_VECTOR, (ULONG_PTR)MpsErrorInterrupt);
+ SetInterruptGate(SPURIOUS_VECTOR, (ULONG_PTR)MpsSpuriousInterrupt);
#ifdef CONFIG_SMP
- SetInterruptGate(IPI_VECTOR, (ULONG)MpsIpiInterrupt);
+ SetInterruptGate(IPI_VECTOR, (ULONG_PTR)MpsIpiInterrupt);
#endif
- DPRINT("APIC is mapped at 0x%X\n", APICBase);
+ DPRINT1("APIC is mapped at 0x%p\n", (PVOID)APICBase);
if (VerifyLocalAPIC())
{
}
else
{
- DPRINT("No APIC found\n");
+ DPRINT1("No APIC found\n");
ASSERT(FALSE);
}
CommonBase = (PULONG)COMMON_AREA;
/* Copy bootstrap code to common area */
- memcpy((PVOID)((ULONG)CommonBase + PAGE_SIZE),
+ memcpy((PVOID)((ULONG_PTR)CommonBase + PAGE_SIZE),
&APstart,
- (ULONG)&APend - (ULONG)&APstart + 1);
+ (ULONG_PTR)&APend - (ULONG_PTR)&APstart + 1);
/* Set shutdown code */
CMOS_WRITE(0xF, 0xA);
/* Set warm reset vector */
- ps = (PUSHORT)((ULONG)BIOSBase + 0x467);
+ ps = (PUSHORT)((ULONG_PTR)BIOSBase + 0x467);
*ps = (COMMON_AREA + PAGE_SIZE) & 0xF;
- ps = (PUSHORT)((ULONG)BIOSBase + 0x469);
+ ps = (PUSHORT)((ULONG_PTR)BIOSBase + 0x469);
*ps = (COMMON_AREA + PAGE_SIZE) >> 4;
#endif