ULONG lastvalw[MAX_CPU];
#ifdef CONFIG_SMP
-typedef struct __attribute__((packed)) _COMMON_AREA_INFO
+#include <pshpack1.h>
+typedef struct _COMMON_AREA_INFO
{
ULONG Stack; /* Location of AP stack */
ULONG PageDirectory; /* Page directory for an AP */
ULONG PaeModeEnabled; /* PAE mode is enabled */
ULONG Debug[16]; /* For debugging */
} COMMON_AREA_INFO, *PCOMMON_AREA_INFO;
+#include <poppack.h>
#endif
CHAR *APstart, *APend;
#define HZ (100)
#define APIC_DIVISOR (16)
-#define CMOS_READ(address) ({ \
+#define CMOS_READ(address) { \
WRITE_PORT_UCHAR((PUCHAR)0x70, address)); \
READ_PORT_UCHAR((PUCHAR)0x71)); \
-})
+}
-#define CMOS_WRITE(address, value) ({ \
+#define CMOS_WRITE(address, value) { \
WRITE_PORT_UCHAR((PUCHAR)0x70, address); \
WRITE_PORT_UCHAR((PUCHAR)0x71, value); \
-})
+}
+
+extern ULONG_PTR KernelBase;
/* FUNCTIONS *********************************************************************/
}
/* Disable symetric I/O mode ie. go to PIC mode */
-inline VOID DisableSMPMode(VOID)
+__inline VOID DisableSMPMode(VOID)
{
/*
* Put the board back into PIC mode (has an effect
}
-inline ULONG _APICRead(ULONG Offset)
+__inline ULONG _APICRead(ULONG Offset)
{
PULONG p;
}
#if 0
-inline VOID APICWrite(ULONG Offset,
+__inline VOID APICWrite(ULONG Offset,
ULONG Value)
{
PULONG p;
*p = Value;
}
#else
-inline VOID APICWrite(ULONG Offset,
+__inline VOID APICWrite(ULONG Offset,
ULONG Value)
{
PULONG p;
#if 0
-inline ULONG APICRead(ULONG Offset)
+__inline ULONG APICRead(ULONG Offset)
{
PULONG p;
return *p;
}
#else
-inline ULONG APICRead(ULONG Offset)
+__inline ULONG APICRead(ULONG Offset)
{
PULONG p;
ULONG CPU = (_APICRead(APIC_ID) & APIC_ID_MASK) >> 24;
}
#endif
-inline VOID APICSendEOI(VOID)
+__inline VOID APICSendEOI(VOID)
{
// Send the EOI
APICWrite(APIC_EOI, 0);
BOOLEAN VerifyLocalAPIC(VOID)
{
- UINT reg0, reg1;
+ SIZE_T reg0, reg1;
+ ULONG l, h;
/* The version register is read-only in a real APIC */
reg0 = APICRead(APIC_VER);
DPRINT1("Getting VERSION: %x\n", reg0);
return FALSE;
}
- ULONG l, h;
Ki386Rdmsr(0x1b /*MSR_IA32_APICBASE*/, l, h);
if (!(l & /*MSR_IA32_APICBASE_ENABLE*/(1<<11)))
MpsIRQTrapFrameToTrapFrame(PKIRQ_TRAPFRAME IrqTrapFrame,
PKTRAP_FRAME TrapFrame)
{
- TrapFrame->Gs = (USHORT)IrqTrapFrame->Gs;
- TrapFrame->Fs = (USHORT)IrqTrapFrame->Fs;
- TrapFrame->Es = (USHORT)IrqTrapFrame->Es;
- TrapFrame->Ds = (USHORT)IrqTrapFrame->Ds;
+ TrapFrame->SegGs = (USHORT)IrqTrapFrame->Gs;
+ TrapFrame->SegFs = (USHORT)IrqTrapFrame->Fs;
+ TrapFrame->SegEs = (USHORT)IrqTrapFrame->Es;
+ TrapFrame->SegDs = (USHORT)IrqTrapFrame->Ds;
TrapFrame->Eax = IrqTrapFrame->Eax;
TrapFrame->Ecx = IrqTrapFrame->Ecx;
TrapFrame->Edx = IrqTrapFrame->Edx;
TrapFrame->Ebx = IrqTrapFrame->Ebx;
- TrapFrame->Esp = IrqTrapFrame->Esp;
+ TrapFrame->HardwareEsp = IrqTrapFrame->Esp;
TrapFrame->Ebp = IrqTrapFrame->Ebp;
TrapFrame->Esi = IrqTrapFrame->Esi;
TrapFrame->Edi = IrqTrapFrame->Edi;
TrapFrame->Eip = IrqTrapFrame->Eip;
- TrapFrame->Cs = IrqTrapFrame->Cs;
- TrapFrame->Eflags = IrqTrapFrame->Eflags;
+ TrapFrame->SegCs = IrqTrapFrame->Cs;
+ TrapFrame->EFlags = IrqTrapFrame->Eflags;
}
VOID
SetInterruptGate(ULONG index, ULONG address)
{
KIDTENTRY *idt;
-
+ KIDT_ACCESS Access;
+
+ /* Set the IDT Access Bits */
+ Access.Reserved = 0;
+ Access.Present = 1;
+ Access.Dpl = 0; /* Kernel-Mode */
+ Access.SystemSegmentFlag = 0;
+ Access.SegmentType = I386_INTERRUPT_GATE;
+
idt = (KIDTENTRY*)((ULONG)KeGetCurrentKPCR()->IDT + index * sizeof(KIDTENTRY));
idt->Offset = address & 0xffff;
- idt->Selector = KERNEL_CS;
- idt->Access = 0x8e00;
+ idt->Selector = KGDT_R0_CODE;
+ idt->Access = Access.Value;
idt->ExtendedOffset = address >> 16;
}
/* Write the page directory page */
Ke386GetPageTableDirectory(Common->PageDirectory);
/* Write the kernel entry point */
- Common->NtProcessStartup = (ULONG_PTR)RtlImageNtHeader(MmSystemRangeStart)->OptionalHeader.AddressOfEntryPoint + (ULONG_PTR)MmSystemRangeStart;
+ Common->NtProcessStartup = (ULONG_PTR)RtlImageNtHeader((PVOID)KernelBase)->OptionalHeader.AddressOfEntryPoint + KernelBase;
/* Write the state of the mae mode */
Common->PaeModeEnabled = Ke386GetCr4() & X86_CR4_PAE ? 1 : 0;