Add some more intrinsics, and change _enable and _disable to use the new ARMv6 instru...

[reactos.git] / reactos / include / crt / mingw32 / intrin_arm.h

diff --git a/reactos/include/crt/mingw32/intrin_arm.h b/reactos/include/crt/mingw32/intrin_arm.h
index 5ed7936..3e78892 100644 (file)
--- a/reactos/include/crt/mingw32/intrin_arm.h
+++ b/reactos/include/crt/mingw32/intrin_arm.h
@@ -121,6 +121,14 @@ __INTRIN_INLINE void * _InterlockedExchangePointer(void * volatile * const Targe
     return (void *)_InterlockedExchange((volatile long * const)Target, (const long)Value);
 }
 
+
+
+__INTRIN_INLINE unsigned char _BitScanReverse(unsigned long * const Index, const unsigned long Mask)
+{
+    *Index = 31 - __builtin_clz(Mask);
+       return Mask ? 1 : 0;
+}
+
 __INTRIN_INLINE char _InterlockedAnd8(volatile char * const value, const char mask)
 {
        char x;
@@ -294,13 +302,17 @@ __INTRIN_INLINE long _InterlockedIncrement16(volatile short * const lpAddend)
        return _InterlockedExchangeAdd16(lpAddend, 1) + 1;
 }
 
+__INTRIN_INLINE long _InterlockedAddLargeStatistic(volatile long long * const Addend, const long Value)
+{
+    *Addend += Value;
+    return Value;
+}
+
 __INTRIN_INLINE void _disable(void)
 {
     __asm__ __volatile__
     (
-     "mrs r1, cpsr;"
-     "orr r1, r1, #0x80;"
-     "msr cpsr, r1;"
+     "cpsid i    @ __cli" : : : "memory", "cc"
     );
 }
 
@@ -308,12 +320,20 @@ __INTRIN_INLINE void _enable(void)
 {
     __asm__ __volatile__
     (
-     "mrs r1, cpsr;"
-     "bic r1, r1, #0x80;"
-     "msr cpsr, r1;"
+     "cpsie i    @ __sti" : : : "memory", "cc"
     );
 }
 
+__INTRIN_INLINE unsigned char _interlockedbittestandset(volatile long * a, const long b)
+{
+       return (_InterlockedOr(a, 1 << b) >> b) & 1;
+}
+
+__INTRIN_INLINE unsigned char _interlockedbittestandreset(volatile long * a, const long b)
+{
+       return (_InterlockedAnd(a, ~(1 << b)) >> b) & 1;
+}
+
 #ifndef __MSVCRT__
 __INTRIN_INLINE unsigned int _rotl(const unsigned int value, int shift)
 {