[PCI]: Add the PCI_ENABLE_BRIDGE definitions that can be present in PCI_COMMON_CONFIG...

[reactos.git] / reactos / ntoskrnl / include / internal / pci.h

diff --git a/reactos/ntoskrnl/include/internal/pci.h b/reactos/ntoskrnl/include/internal/pci.h
index e7c0ecf..cba5dc5 100644 (file)
--- a/reactos/ntoskrnl/include/internal/pci.h
+++ b/reactos/ntoskrnl/include/internal/pci.h
@@ -1,107 +1,105 @@
-/*\r
- * PROJECT:         ReactOS Kernel\r
- * LICENSE:         GPL - See COPYING in the top level directory\r
- * FILE:            ntoskrnl/include/hal.h\r
- * PURPOSE:         Internal header for PCI Support\r
- * PROGRAMMERS:     Alex Ionescu (alex.ionescu@reactos.org)\r
- */\r
-#ifndef _PCI_\r
-#define _PCI_\r
-\r
-//\r
-// PCI Type 1 Ports\r
-//\r
-#define PCI_TYPE1_ADDRESS_PORT      (PULONG)0xCF8\r
-#define PCI_TYPE1_DATA_PORT         0xCFC\r
-\r
-//\r
-// PCI Type 2 Ports\r
-//\r
-#define PCI_TYPE2_CSE_PORT          (PUCHAR)0xCF8\r
-#define PCI_TYPE2_FORWARD_PORT      (PUCHAR)0xCFA\r
-#define PCI_TYPE2_ADDRESS_BASE      0xC\r
-\r
-//\r
-// PCI Type 1 Configuration Register\r
-//\r
-typedef struct _PCI_TYPE1_CFG_BITS\r
-{\r
-    union\r
-    {\r
-        struct\r
-        {\r
-            ULONG Reserved1:2;\r
-            ULONG RegisterNumber:6;\r
-            ULONG FunctionNumber:3;\r
-            ULONG DeviceNumber:5;\r
-            ULONG BusNumber:8;\r
-            ULONG Reserved2:7;\r
-            ULONG Enable:1;\r
-        } bits;\r
-\r
-        ULONG AsULONG;\r
-    } u;\r
-} PCI_TYPE1_CFG_BITS, *PPCI_TYPE1_CFG_BITS;\r
-\r
-//\r
-// PCI Type 2 CSE Register\r
-//\r
-typedef struct _PCI_TYPE2_CSE_BITS\r
-{\r
-    union\r
-    {\r
-        struct\r
-        {\r
-            UCHAR Enable:1;\r
-            UCHAR FunctionNumber:3;\r
-            UCHAR Key:4;\r
-        } bits;\r
-\r
-        UCHAR AsUCHAR;\r
-    } u;\r
-} PCI_TYPE2_CSE_BITS, PPCI_TYPE2_CSE_BITS;\r
-\r
-//\r
-// PCI Type 2 Address Register\r
-//\r
-typedef struct _PCI_TYPE2_ADDRESS_BITS\r
-{\r
-    union\r
-    {\r
-        struct\r
-        {\r
-            USHORT RegisterNumber:8;\r
-            USHORT Agent:4;\r
-            USHORT AddressBase:4;\r
-        } bits;\r
-\r
-        USHORT AsUSHORT;\r
-    } u;\r
-} PCI_TYPE2_ADDRESS_BITS, *PPCI_TYPE2_ADDRESS_BITS;\r
-\r
-//\r
-// PCI Registry Information\r
-//\r
-typedef struct _PCI_REGISTRY_INFO\r
-{\r
-    UCHAR MajorRevision;\r
-    UCHAR MinorRevision;\r
-    UCHAR NoBuses;\r
-    UCHAR HardwareMechanism;\r
-} PCI_REGISTRY_INFO, *PPCI_REGISTRY_INFO;\r
-\r
-//\r
-// PCI Card Descriptor in Registry\r
-//\r
-typedef struct _PCI_CARD_DESCRIPTOR\r
-{\r
-    ULONG Flags;\r
-    USHORT VendorID;\r
-    USHORT DeviceID;\r
-    USHORT RevisionID;\r
-    USHORT SubsystemVendorID;\r
-    USHORT SubsystemID;\r
-    USHORT Reserved;\r
-} PCI_CARD_DESCRIPTOR, *PPCI_CARD_DESCRIPTOR;\r
-\r
-#endif\r
+/*
+ * PROJECT:         ReactOS Kernel
+ * LICENSE:         GPL - See COPYING in the top level directory
+ * FILE:            ntoskrnl/include/hal.h
+ * PURPOSE:         Internal header for PCI Support
+ * PROGRAMMERS:     Alex Ionescu (alex.ionescu@reactos.org)
+ */
+
+#pragma once
+
+//
+// PCI Type 1 Ports
+//
+#define PCI_TYPE1_ADDRESS_PORT      (PULONG)0xCF8
+#define PCI_TYPE1_DATA_PORT         0xCFC
+
+//
+// PCI Type 2 Ports
+//
+#define PCI_TYPE2_CSE_PORT          (PUCHAR)0xCF8
+#define PCI_TYPE2_FORWARD_PORT      (PUCHAR)0xCFA
+#define PCI_TYPE2_ADDRESS_BASE      0xC
+
+//
+// PCI Type 1 Configuration Register
+//
+typedef struct _PCI_TYPE1_CFG_BITS
+{
+    union
+    {
+        struct
+        {
+            ULONG Reserved1:2;
+            ULONG RegisterNumber:6;
+            ULONG FunctionNumber:3;
+            ULONG DeviceNumber:5;
+            ULONG BusNumber:8;
+            ULONG Reserved2:7;
+            ULONG Enable:1;
+        } bits;
+
+        ULONG AsULONG;
+    } u;
+} PCI_TYPE1_CFG_BITS, *PPCI_TYPE1_CFG_BITS;
+
+//
+// PCI Type 2 CSE Register
+//
+typedef struct _PCI_TYPE2_CSE_BITS
+{
+    union
+    {
+        struct
+        {
+            UCHAR Enable:1;
+            UCHAR FunctionNumber:3;
+            UCHAR Key:4;
+        } bits;
+
+        UCHAR AsUCHAR;
+    } u;
+} PCI_TYPE2_CSE_BITS, PPCI_TYPE2_CSE_BITS;
+
+//
+// PCI Type 2 Address Register
+//
+typedef struct _PCI_TYPE2_ADDRESS_BITS
+{
+    union
+    {
+        struct
+        {
+            USHORT RegisterNumber:8;
+            USHORT Agent:4;
+            USHORT AddressBase:4;
+        } bits;
+
+        USHORT AsUSHORT;
+    } u;
+} PCI_TYPE2_ADDRESS_BITS, *PPCI_TYPE2_ADDRESS_BITS;
+
+//
+// PCI Registry Information
+//
+typedef struct _PCI_REGISTRY_INFO
+{
+    UCHAR MajorRevision;
+    UCHAR MinorRevision;
+    UCHAR NoBuses; // Number Of Buses
+    UCHAR HardwareMechanism;
+} PCI_REGISTRY_INFO, *PPCI_REGISTRY_INFO;
+
+//
+// PCI Card Descriptor in Registry
+//
+typedef struct _PCI_CARD_DESCRIPTOR
+{
+    ULONG Flags;
+    USHORT VendorID;
+    USHORT DeviceID;
+    USHORT RevisionID;
+    USHORT SubsystemVendorID;
+    USHORT SubsystemID;
+    USHORT Reserved;
+} PCI_CARD_DESCRIPTOR, *PPCI_CARD_DESCRIPTOR;