#define CX86_CCR1 0xc1
/* NSC/Cyrix CPU indexed register access macros */
-#define getCx86(reg) ({ WRITE_PORT_UCHAR((PUCHAR)(ULONG_PTR)0x22,(reg)); READ_PORT_UCHAR((PUCHAR)(ULONG_PTR)0x23); })
+static __inline
+ULONG
+getCx86(UCHAR reg)
+{
+ WRITE_PORT_UCHAR((PUCHAR)(ULONG_PTR)0x22, reg);
+ return READ_PORT_UCHAR((PUCHAR)(ULONG_PTR)0x23);
+}
#define setCx86(reg, data) do { \
WRITE_PORT_UCHAR((PUCHAR)(ULONG_PTR)0x22,(reg)); \
/* Remove support for correct PTE support. */
FeatureBits &= ~KF_WORKING_PTE;
}
+
+ /* Virtualbox claims to have no SYSENTER support,
+ * which is false for processors >= Pentium Pro */
+ if(Prcb->CpuType >= 6)
+ {
+ Reg[3] |= 0x800;
+ }
- /* Check if the CPU is too old to support SYSENTER */
- if ((Prcb->CpuType < 6) ||
- ((Prcb->CpuType == 6) && (Prcb->CpuStep < 0x0303)))
+ /* Check if the CPU is too old to support SYSENTER,
+ * See Intel CPUID instruction manual for details*/
+ if ((Reg[0] & 0x0FFF3FFF) < 0x00000633)
{
/* Disable it */
Reg[3] &= ~0x800;
}
}
}
+
+ DPRINT1("Supported CPU features : %s %s %s %s %s %s %s %s %s %s %s %s %s %s %s %s %s %s %s %s %s\n",
+#define print_supported(kf_value) \
+ FeatureBits & kf_value ? #kf_value : ""
+ print_supported(KF_V86_VIS),
+ print_supported(KF_RDTSC),
+ print_supported(KF_CR4),
+ print_supported(KF_CMOV),
+ print_supported(KF_GLOBAL_PAGE),
+ print_supported(KF_LARGE_PAGE),
+ print_supported(KF_MTRR),
+ print_supported(KF_CMPXCHG8B),
+ print_supported(KF_MMX),
+ print_supported(KF_WORKING_PTE),
+ print_supported(KF_PAT),
+ print_supported(KF_FXSR),
+ print_supported(KF_FAST_SYSCALL),
+ print_supported(KF_XMMI),
+ print_supported(KF_3DNOW),
+ print_supported(KF_AMDK6MTRR),
+ print_supported(KF_XMMI64),
+ print_supported(KF_DTS),
+ print_supported(KF_NX_BIT),
+ print_supported(KF_NX_DISABLED),
+ print_supported(KF_NX_ENABLED));
+#undef print_supported
/* Return the Feature Bits */
return FeatureBits;