- KdDebuggerNotPresent should be FALSE by default.

[reactos.git] / reactos / ntoskrnl / ke / i386 / cpu.c

diff --git a/reactos/ntoskrnl/ke/i386/cpu.c b/reactos/ntoskrnl/ke/i386/cpu.c
index c69fd44..b07ed5f 100644 (file)
--- a/reactos/ntoskrnl/ke/i386/cpu.c
+++ b/reactos/ntoskrnl/ke/i386/cpu.c
@@ -74,6 +74,10 @@ KAFFINITY KeActiveProcessors = 1;
 BOOLEAN KiI386PentiumLockErrataPresent;
 BOOLEAN KiSMTProcessorsPresent;
 
+/* Freeze data */
+KIRQL KiOldIrql;
+ULONG KiFreezeFlag;
+
 /* CPU Signatures */
 static const CHAR CmpIntelID[]       = "GenuineIntel";
 static const CHAR CmpAmdID[]         = "AuthenticAMD";
@@ -544,7 +548,7 @@ KiInitializeTSS2(IN PKTSS Tss,
     {
         /* Set the Limit */
         TssEntry->LimitLow = sizeof(KTSS) - 1;
-        TssEntry->HighWord.Bits.LimitHi &= 0xF0;
+        TssEntry->HighWord.Bits.LimitHi = 0;
     }
 
     /* Now clear the I/O Map */
@@ -667,18 +671,49 @@ NTAPI
 KeFlushCurrentTb(VOID)
 {
     /* Flush the TLB by resetting CR3 */
-    __writecr3((ULONGLONG)__readcr3);
+    __writecr3((ULONGLONG)__readcr3());
+}
+
+VOID
+NTAPI
+KiRestoreProcessorControlState(PKPROCESSOR_STATE ProcessorState)
+{
+    return;
+    /* Restore the CR registers */
+    __writecr0(ProcessorState->SpecialRegisters.Cr0);
+    Ke386SetCr2(ProcessorState->SpecialRegisters.Cr2);
+    __writecr3(ProcessorState->SpecialRegisters.Cr3);
+    if (KeFeatureBits & KF_CR4) __writecr4(ProcessorState->SpecialRegisters.Cr4);
+
+    //
+    // Restore the DR registers
+    //
+    Ke386SetDr0(ProcessorState->SpecialRegisters.KernelDr0);
+    Ke386SetDr1(ProcessorState->SpecialRegisters.KernelDr1);
+    Ke386SetDr2(ProcessorState->SpecialRegisters.KernelDr2);
+    Ke386SetDr3(ProcessorState->SpecialRegisters.KernelDr3);
+    Ke386SetDr6(ProcessorState->SpecialRegisters.KernelDr6);
+    Ke386SetDr7(ProcessorState->SpecialRegisters.KernelDr7);
+
+    //
+    // Restore GDT, IDT, LDT and TSS
+    //
+    Ke386SetGlobalDescriptorTable(ProcessorState->SpecialRegisters.Gdtr);
+    Ke386SetInterruptDescriptorTable(ProcessorState->SpecialRegisters.Idtr);
+    Ke386SetTr(ProcessorState->SpecialRegisters.Tr);
+    Ke386SetLocalDescriptorTable(ProcessorState->SpecialRegisters.Ldtr);
 }
 
 VOID
 NTAPI
-KiSaveProcessorControlState(IN PKPROCESSOR_STATE ProcessorState)
+KiSaveProcessorControlState(OUT PKPROCESSOR_STATE ProcessorState)
 {
     /* Save the CR registers */
     ProcessorState->SpecialRegisters.Cr0 = __readcr0();
     ProcessorState->SpecialRegisters.Cr2 = __readcr2();
     ProcessorState->SpecialRegisters.Cr3 = __readcr3();
-    ProcessorState->SpecialRegisters.Cr4 = __readcr4();
+    ProcessorState->SpecialRegisters.Cr4 = (KeFeatureBits & KF_CR4) ?
+                                           __readcr4() : 0;
 
     /* Save the DR registers */
     ProcessorState->SpecialRegisters.KernelDr0 = Ke386GetDr0();
@@ -807,6 +842,39 @@ KiI386PentiumLockErrataFixup(VOID)
     MmSetPageProtect(NULL, NewIdt, PAGE_READONLY);
 }
 
+BOOLEAN
+NTAPI
+KeFreezeExecution(IN PKTRAP_FRAME TrapFrame,
+                  IN PKEXCEPTION_FRAME ExceptionFrame)
+{
+    ULONG Flags;
+
+    /* Disable interrupts and get previous state */
+    Ke386SaveFlags(Flags);
+    //Flags = __getcallerseflags();
+    _disable();
+
+    /* Save freeze flag */
+    KiFreezeFlag = 4;
+
+    /* Save the old IRQL */
+    KiOldIrql = KeGetCurrentIrql();
+
+    /* Return whether interrupts were enabled */
+    return (Flags & EFLAGS_INTERRUPT_MASK) ? TRUE: FALSE;
+}
+
+VOID
+NTAPI
+KeThawExecution(IN BOOLEAN Enable)
+{
+    /* Cleanup CPU caches */
+    KeFlushCurrentTb();
+
+    /* Re-enable interrupts */
+    if (Enable) _enable();
+}
+
 /* PUBLIC FUNCTIONS **********************************************************/
 
 /*