[NTOS]: Enable usage of ARM3 paged pool, up until Mm Phase 2.
[reactos.git] / reactos / ntoskrnl / mm / mminit.c
index 6c230cf..83c45f1 100644 (file)
@@ -1,4 +1,4 @@
-/*
+/*
  * PROJECT:         ReactOS Kernel
  * LICENSE:         GPL - See COPYING in the top level directory
  * FILE:            ntoskrnl/mm/mminit.c
@@ -76,21 +76,6 @@ MiInitSystemMemoryAreas()
     NTSTATUS Status;
     BoundaryAddressMultiple.QuadPart = 0;
     
-    //
-    // Create the memory area to define the loader mappings
-    //
-    BaseAddress = (PVOID)KSEG0_BASE;
-    Status = MmCreateMemoryArea(MmGetKernelAddressSpace(),
-                                MEMORY_AREA_OWNED_BY_ARM3 | MEMORY_AREA_STATIC,
-                                &BaseAddress,
-                                MmBootImageSize,
-                                PAGE_EXECUTE_READWRITE,
-                                &MArea,
-                                TRUE,
-                                0,
-                                BoundaryAddressMultiple);
-    ASSERT(Status == STATUS_SUCCESS);
-
     //
     // Create the memory area to define the PTE base
     //
@@ -98,7 +83,7 @@ MiInitSystemMemoryAreas()
     Status = MmCreateMemoryArea(MmGetKernelAddressSpace(),
                                 MEMORY_AREA_OWNED_BY_ARM3 | MEMORY_AREA_STATIC,
                                 &BaseAddress,
-                                PTE_TOP - PTE_BASE + 1,
+                                4 * 1024 * 1024,
                                 PAGE_READWRITE,
                                 &MArea,
                                 TRUE,
@@ -113,7 +98,7 @@ MiInitSystemMemoryAreas()
     Status = MmCreateMemoryArea(MmGetKernelAddressSpace(),
                                 MEMORY_AREA_OWNED_BY_ARM3 | MEMORY_AREA_STATIC,
                                 &BaseAddress,
-                                HYPER_SPACE_END - HYPER_SPACE + 1,
+                                4 * 1024 * 1024,
                                 PAGE_READWRITE,
                                 &MArea,
                                 TRUE,
@@ -158,7 +143,8 @@ MiInitSystemMemoryAreas()
     Status = MmCreateMemoryArea(MmGetKernelAddressSpace(),
                                 MEMORY_AREA_OWNED_BY_ARM3 | MEMORY_AREA_STATIC,
                                 &BaseAddress,
-                                (MmNumberOfSystemPtes + 1) * PAGE_SIZE,
+                                (ULONG_PTR)MmNonPagedPoolEnd -
+                                (ULONG_PTR)MmNonPagedSystemStart,
                                 PAGE_READWRITE,
                                 &MArea,
                                 TRUE,
@@ -227,7 +213,6 @@ MiInitSystemMemoryAreas()
                                 BoundaryAddressMultiple);
     ASSERT(Status == STATUS_SUCCESS);
     
-#ifndef _M_AMD64
     //
     // Next, the KPCR
     //
@@ -242,7 +227,6 @@ MiInitSystemMemoryAreas()
                                 0,
                                 BoundaryAddressMultiple);
     ASSERT(Status == STATUS_SUCCESS);
-#endif
     
     //
     // Now the KUSER_SHARED_DATA
@@ -300,8 +284,8 @@ MiDbgDumpAddressSpace(VOID)
     // Print the memory layout
     //
     DPRINT1("          0x%p - 0x%p\t%s\n",
-            KSEG0_BASE,
-            (ULONG_PTR)KSEG0_BASE + MmBootImageSize,
+            MmSystemRangeStart,
+            (ULONG_PTR)MmSystemRangeStart + MmBootImageSize,
             "Boot Loaded Image");
     DPRINT1("          0x%p - 0x%p\t%s\n",
             MmPagedPoolBase,
@@ -324,13 +308,13 @@ MiDbgDumpAddressSpace(VOID)
             MiSessionSpaceEnd,
             "Session Space");
     DPRINT1("          0x%p - 0x%p\t%s\n",
-            PTE_BASE, PTE_TOP,
+            PTE_BASE, PDE_BASE,
             "Page Tables");
     DPRINT1("          0x%p - 0x%p\t%s\n",
-            PDE_BASE, PDE_TOP,
+            PDE_BASE, HYPER_SPACE,
             "Page Directories");
     DPRINT1("          0x%p - 0x%p\t%s\n",
-            HYPER_SPACE, HYPER_SPACE_END,
+            HYPER_SPACE, HYPER_SPACE + (4 * 1024 * 1024),
             "Hyperspace");
     DPRINT1("          0x%p - 0x%p\t%s\n",
             MmPagedPoolStart,
@@ -365,14 +349,16 @@ MiDbgDumpMemoryDescriptors(VOID)
     DPRINT1("Total: %08lX (%d MB)\n", TotalPages, (TotalPages * PAGE_SIZE) / 1024 / 1024);
 }
 
+VOID NTAPI MiInitializeUserPfnBitmap(VOID);
+
 BOOLEAN
 NTAPI
 MmInitSystem(IN ULONG Phase,
              IN PLOADER_PARAMETER_BLOCK LoaderBlock)
 {
-    extern MMPTE HyperTemplatePte;
+    extern MMPTE ValidKernelPte;
     PMMPTE PointerPte;
-    MMPTE TempPte = HyperTemplatePte;
+    MMPTE TempPte = ValidKernelPte;
     PFN_NUMBER PageFrameNumber;
     
     if (Phase == 0)
@@ -385,27 +371,9 @@ MmInitSystem(IN ULONG Phase,
         /* Dump memory descriptors */
         if (MiDbgEnableMdDump) MiDbgDumpMemoryDescriptors();
         
-        //
-        // Initialize ARM³ in phase 0
-        //
+        /* Initialize ARM³ in phase 0 */
         MmArmInitSystem(0, KeLoaderBlock);    
         
-        /* Initialize the page list */
-        MmInitializePageList();
-        
-        //
-        // Initialize ARM³ in phase 1
-        //
-        MmArmInitSystem(1, KeLoaderBlock);
-
-#if defined(_WINKD_)
-        //
-        // Everything required for the debugger to read and write
-        // physical memory is now set up
-        //
-        MmDebugPte = MiAddressToPte(MiDebugMapping);
-#endif
-        
         /* Put the paged pool after the loaded modules */
         MmPagedPoolBase = (PVOID)PAGE_ROUND_UP((ULONG_PTR)MmSystemRangeStart +
                                                MmBootImageSize);
@@ -413,99 +381,15 @@ MmInitSystem(IN ULONG Phase,
         
         /* Intialize system memory areas */
         MiInitSystemMemoryAreas();
-        
-        //
-        // STEP 1: Allocate and free a single page, repeatedly
-        // We should always get the same address back
-        //
-        if (1)
-        {
-            PULONG Test, OldTest;
-            ULONG i;
-        
-            OldTest = Test = MiAllocatePoolPages(PagedPool, PAGE_SIZE);
-            ASSERT(Test);
-            for (i = 0; i < 16; i++)
-            {
-                MiFreePoolPages(Test);
-                Test = MiAllocatePoolPages(PagedPool, PAGE_SIZE);
-                ASSERT(OldTest == Test);
-            }
-            MiFreePoolPages(Test);
-        }
-        
-        //
-        // STEP 2: Allocate 2048 pages without freeing them
-        // We should run out of space at 1024 pages, since we don't support
-        // expansion yet.
-        //
-        if (1)
-        {
-            PULONG Test[2048];
-            ULONG i;
-            
-            for (i = 0; i < 2048; i++)
-            {
-                Test[i] = MiAllocatePoolPages(PagedPool, PAGE_SIZE);
-                if (!Test[i]) 
-                {
-                    ASSERT(i == PTE_PER_PAGE);
-                    break;
-                }
-            }
-            
-            //
-            // Cleanup
-            //
-            while (--i) if (Test[i]) MiFreePoolPages(Test[i]);
-        }
-        
-        //
-        // STEP 3: Allocate a page and touch it.
-        // We should get an ARM3 page fault and it should handle the fault
-        //
-        if (1)
-        {
-            PULONG Test;
-            
-            Test = MiAllocatePoolPages(PagedPool, PAGE_SIZE);
-            ASSERT(*Test == 0);
-            MiFreePoolPages(Test);
-        }
-        
+
         /* Dump the address space */
         MiDbgDumpAddressSpace();
-        
-#ifndef _M_AMD64 // skip old paged pool
-        /* Initialize paged pool */
-        MmInitializePagedPool();
-#endif
-        
-        /* Initialize working sets */
-        MmInitializeMemoryConsumer(MC_USER, MmTrimUserMemory);
-
-        /* Initialize the user mode image list */
-        InitializeListHead(&MmLoadedUserImageList);
-
-        /* Initialize the Loader Lock */
-        KeInitializeMutant(&MmSystemLoadLock, FALSE);
-
-        /* Reload boot drivers */
-        MiReloadBootLoadedDrivers(LoaderBlock);
-
-        /* Initialize the loaded module list */
-        MiInitializeLoadedModuleList(LoaderBlock);
-
-        /* Setup shared user data settings that NT does as well */
-        ASSERT(SharedUserData->NumberOfPhysicalPages == 0);
-        SharedUserData->NumberOfPhysicalPages = MmNumberOfPhysicalPages;
-        SharedUserData->LargePageMinimum = 0;
-        
-        /* For now, we assume that we're always Server */
-        SharedUserData->NtProductType = NtProductServer;
     }
     else if (Phase == 1)
     {
+        MmInitializePagedPool();
+        MiInitializeUserPfnBitmap();
+        MmInitializeMemoryConsumer(MC_USER, MmTrimUserMemory);
         MmInitializeRmapList();
         MmInitializePageOp();
         MmInitSectionImplementation();
@@ -525,7 +409,7 @@ MmInitSystem(IN ULONG Phase,
         //
         // Now get the PTE for shared data, and read the PFN that holds it
         //
-        PointerPte = MiAddressToPte((PVOID)KI_USER_SHARED_DATA);
+        PointerPte = MiAddressToPte(KI_USER_SHARED_DATA);
         ASSERT(PointerPte->u.Hard.Valid == 1);
         PageFrameNumber = PFN_FROM_PTE(PointerPte);
         
@@ -536,6 +420,9 @@ MmInitSystem(IN ULONG Phase,
         TempPte.u.Hard.PageFrameNumber = PageFrameNumber;
         *MmSharedUserDataPte = TempPte;
         
+        /* Setup the memory threshold events */
+        if (!MiInitializeMemoryEvents()) return FALSE;
+        
         /*
          * Unmap low memory
          */
@@ -551,7 +438,9 @@ MmInitSystem(IN ULONG Phase,
     }
     else if (Phase == 2)
     {
-
+        /* Enough fun for now */
+        extern BOOLEAN AllowPagedPool;
+        AllowPagedPool = FALSE;
     }
 
     return TRUE;