Sync to trunk (r44371)

[reactos.git] / reactos / ntoskrnl / mm / mminit.c

diff --git a/reactos/ntoskrnl/mm/mminit.c b/reactos/ntoskrnl/mm/mminit.c
index c9a837d..b1d392d 100644 (file)
--- a/reactos/ntoskrnl/mm/mminit.c
+++ b/reactos/ntoskrnl/mm/mminit.c
@@ -1,4 +1,4 @@
-/*
+/*
  * PROJECT:         ReactOS Kernel
  * LICENSE:         GPL - See COPYING in the top level directory
  * FILE:            ntoskrnl/mm/mminit.c
@@ -48,7 +48,7 @@ MemType[] =
     "LoaderXIPRom      "
 };
 
-PBOOLEAN Mm64BitPhysicalAddress = FALSE;
+BOOLEAN Mm64BitPhysicalAddress = FALSE;
 ULONG MmReadClusterSize;
 //
 // 0 | 1 is on/off paging, 2 is undocumented
@@ -76,6 +76,21 @@ MiInitSystemMemoryAreas()
     NTSTATUS Status;
     BoundaryAddressMultiple.QuadPart = 0;
     
+    //
+    // Create the memory area to define the loader mappings
+    //
+    BaseAddress = (PVOID)KSEG0_BASE;
+    Status = MmCreateMemoryArea(MmGetKernelAddressSpace(),
+                                MEMORY_AREA_OWNED_BY_ARM3 | MEMORY_AREA_STATIC,
+                                &BaseAddress,
+                                MmBootImageSize,
+                                PAGE_EXECUTE_READWRITE,
+                                &MArea,
+                                TRUE,
+                                0,
+                                BoundaryAddressMultiple);
+    ASSERT(Status == STATUS_SUCCESS);
+
     //
     // Create the memory area to define the PTE base
     //
@@ -83,7 +98,7 @@ MiInitSystemMemoryAreas()
     Status = MmCreateMemoryArea(MmGetKernelAddressSpace(),
                                 MEMORY_AREA_OWNED_BY_ARM3 | MEMORY_AREA_STATIC,
                                 &BaseAddress,
-                                4 * 1024 * 1024,
+                                PTE_TOP - PTE_BASE + 1,
                                 PAGE_READWRITE,
                                 &MArea,
                                 TRUE,
@@ -98,7 +113,7 @@ MiInitSystemMemoryAreas()
     Status = MmCreateMemoryArea(MmGetKernelAddressSpace(),
                                 MEMORY_AREA_OWNED_BY_ARM3 | MEMORY_AREA_STATIC,
                                 &BaseAddress,
-                                4 * 1024 * 1024,
+                                HYPER_SPACE_END - HYPER_SPACE + 1,
                                 PAGE_READWRITE,
                                 &MArea,
                                 TRUE,
@@ -143,8 +158,7 @@ MiInitSystemMemoryAreas()
     Status = MmCreateMemoryArea(MmGetKernelAddressSpace(),
                                 MEMORY_AREA_OWNED_BY_ARM3 | MEMORY_AREA_STATIC,
                                 &BaseAddress,
-                                (ULONG_PTR)MmNonPagedPoolEnd -
-                                (ULONG_PTR)MmNonPagedSystemStart,
+                                (MmNumberOfSystemPtes + 1) * PAGE_SIZE,
                                 PAGE_READWRITE,
                                 &MArea,
                                 TRUE,
@@ -284,8 +298,8 @@ MiDbgDumpAddressSpace(VOID)
     // Print the memory layout
     //
     DPRINT1("          0x%p - 0x%p\t%s\n",
-            MmSystemRangeStart,
-            (ULONG_PTR)MmSystemRangeStart + MmBootImageSize,
+            KSEG0_BASE,
+            (ULONG_PTR)KSEG0_BASE + MmBootImageSize,
             "Boot Loaded Image");
     DPRINT1("          0x%p - 0x%p\t%s\n",
             MmPagedPoolBase,
@@ -308,13 +322,13 @@ MiDbgDumpAddressSpace(VOID)
             MiSessionSpaceEnd,
             "Session Space");
     DPRINT1("          0x%p - 0x%p\t%s\n",
-            PTE_BASE, PDE_BASE,
+            PTE_BASE, PTE_TOP,
             "Page Tables");
     DPRINT1("          0x%p - 0x%p\t%s\n",
-            PDE_BASE, HYPER_SPACE,
+            PDE_BASE, PDE_TOP,
             "Page Directories");
     DPRINT1("          0x%p - 0x%p\t%s\n",
-            HYPER_SPACE, HYPER_SPACE + (4 * 1024 * 1024),
+            HYPER_SPACE, HYPER_SPACE_END,
             "Hyperspace");
     DPRINT1("          0x%p - 0x%p\t%s\n",
             MmPagedPoolStart,
@@ -387,7 +401,7 @@ MmInitSystem(IN ULONG Phase,
         // Everything required for the debugger to read and write
         // physical memory is now set up
         //
-        MiDbgReadyForPhysical = TRUE;
+        MmDebugPte = MiAddressToPte(MiDebugMapping);
 #endif
         
         /* Put the paged pool after the loaded modules */
@@ -433,7 +447,7 @@ MmInitSystem(IN ULONG Phase,
                 Test[i] = MiAllocatePoolPages(PagedPool, PAGE_SIZE);
                 if (!Test[i]) 
                 {
-                    ASSERT(i == 1024);
+                    ASSERT(i == PTE_PER_PAGE);
                     break;
                 }
             }
@@ -507,7 +521,7 @@ MmInitSystem(IN ULONG Phase,
         //
         // Now get the PTE for shared data, and read the PFN that holds it
         //
-        PointerPte = MiAddressToPte(KI_USER_SHARED_DATA);
+        PointerPte = MiAddressToPte((PVOID)KI_USER_SHARED_DATA);
         ASSERT(PointerPte->u.Hard.Valid == 1);
         PageFrameNumber = PFN_FROM_PTE(PointerPte);