X-Git-Url: https://git.reactos.org/?p=reactos.git;a=blobdiff_plain;f=reactos%2Fntoskrnl%2Finclude%2Finternal%2Farm%2Fmm.h;h=28eddef4cae6e524c888e84679a3818a205a9d8b;hp=537456515f4678c62eb19732fb7e277f13d9e67a;hb=066c89edc704dc46945798c2d7f9d44fca3c1f43;hpb=e2ae1410f22764539b646b454ee5ce2cc023fa87 diff --git a/reactos/ntoskrnl/include/internal/arm/mm.h b/reactos/ntoskrnl/include/internal/arm/mm.h index 537456515f4..28eddef4cae 100644 --- a/reactos/ntoskrnl/include/internal/arm/mm.h +++ b/reactos/ntoskrnl/include/internal/arm/mm.h @@ -5,157 +5,147 @@ #define _MI_PAGING_LEVELS 2 -#define PDE_SHIFT 20 +/* Memory layout base addresses */ +#define MI_USER_PROBE_ADDRESS (PVOID)0x7FFF0000 +#define MI_DEFAULT_SYSTEM_RANGE_START (PVOID)0x80000000 +#define HYPER_SPACE 0xC0500000 +#define HYPER_SPACE_END 0xC08FFFFF +#define MI_SYSTEM_CACHE_WS_START (PVOID)0xC0C00000 +#define MI_PAGED_POOL_START (PVOID)0xE1000000 +#define MI_NONPAGED_POOL_END (PVOID)0xFFBE0000 +#define MI_DEBUG_MAPPING (PVOID)0xFFBFF000 -// -// Number of bits corresponding to the area that a coarse page table entry represents (4KB) -// -#define PTE_SHIFT 12 -#define PTE_SIZE (1 << PTE_SHIFT) +#define PTE_BASE 0xC0000000 +#define PDE_BASE 0xC0400000 +#define PDE_TOP 0xC04FFFFF +#define PTE_TOP 0xC03FFFFF -// -// Number of bits corresponding to the area that a coarse page table occupies (1KB) -// -#define CPT_SHIFT 10 -#define CPT_SIZE (1 << CPT_SHIFT) +#define PTE_PER_PAGE 256 +#define PDE_PER_PAGE 4096 +#define PPE_PER_PAGE 1 + +/* Misc address definitions */ +#define MI_SYSTEM_PTE_BASE (PVOID)MiAddressToPte(NULL) +#define MM_HIGHEST_VAD_ADDRESS \ + (PVOID)((ULONG_PTR)MM_HIGHEST_USER_ADDRESS - (16 * PAGE_SIZE)) +#define MI_MAPPING_RANGE_START ((ULONG)HYPER_SPACE) +#define MI_MAPPING_RANGE_END (MI_MAPPING_RANGE_START + \ + MI_HYPERSPACE_PTES * PAGE_SIZE) +#define MI_DUMMY_PTE (PMMPTE)(MI_MAPPING_RANGE_END + \ + PAGE_SIZE) +#define MI_VAD_BITMAP (PMMPTE)(MI_DUMMY_PTE + \ + PAGE_SIZE) +#define MI_WORKING_SET_LIST (PMMPTE)(MI_VAD_BITMAP + \ + PAGE_SIZE) + +/* Memory sizes */ +#define MI_MIN_PAGES_FOR_NONPAGED_POOL_TUNING ((255 * _1MB) >> PAGE_SHIFT) +#define MI_MIN_PAGES_FOR_SYSPTE_TUNING ((19 * _1MB) >> PAGE_SHIFT) +#define MI_MIN_PAGES_FOR_SYSPTE_BOOST ((32 * _1MB) >> PAGE_SHIFT) +#define MI_MIN_PAGES_FOR_SYSPTE_BOOST_BOOST ((256 * _1MB) >> PAGE_SHIFT) +#define MI_MIN_INIT_PAGED_POOLSIZE (32 * _1MB) +#define MI_MAX_INIT_NONPAGED_POOL_SIZE (128 * _1MB) +#define MI_MAX_NONPAGED_POOL_SIZE (128 * _1MB) +#define MI_SYSTEM_VIEW_SIZE (32 * _1MB) +#define MI_SESSION_VIEW_SIZE (48 * _1MB) +#define MI_SESSION_POOL_SIZE (16 * _1MB) +#define MI_SESSION_IMAGE_SIZE (8 * _1MB) +#define MI_SESSION_WORKING_SET_SIZE (4 * _1MB) +#define MI_SESSION_SIZE (MI_SESSION_VIEW_SIZE + \ + MI_SESSION_POOL_SIZE + \ + MI_SESSION_IMAGE_SIZE + \ + MI_SESSION_WORKING_SET_SIZE) +#define MI_MIN_ALLOCATION_FRAGMENT (4 * _1KB) +#define MI_ALLOCATION_FRAGMENT (64 * _1KB) +#define MI_MAX_ALLOCATION_FRAGMENT (2 * _1MB) + +/* Misc constants */ +#define MM_PTE_SOFTWARE_PROTECTION_BITS 6 +#define MI_MIN_SECONDARY_COLORS 8 +#define MI_SECONDARY_COLORS 64 +#define MI_MAX_SECONDARY_COLORS 1024 +#define MI_MAX_FREE_PAGE_LISTS 4 +#define MI_HYPERSPACE_PTES (256 - 1) /* Dee PDR definition */ +#define MI_ZERO_PTES (32) /* Dee PDR definition */ +#define MI_MAX_ZERO_BITS 21 +#define SESSION_POOL_LOOKASIDES 26 // CHECKME /* MMPTE related defines */ #define MM_EMPTY_PTE_LIST ((ULONG)0xFFFFF) #define MM_EMPTY_LIST ((ULONG_PTR)-1) -// -// Base Addresses -// -#define PTE_BASE 0xC0000000 -#define PTE_TOP 0xC03FFFFF -#define PDE_BASE 0xC0400000 -#define PDE_TOP 0xC04FFFFF -#define HYPER_SPACE 0xC0500000 - -#if 0 -typedef struct _HARDWARE_PDE_ARMV6 -{ - ULONG Valid:1; // Only for small pages - ULONG LargePage:1; // Note, if large then Valid = 0 - ULONG Buffered:1; - ULONG Cached:1; - ULONG NoExecute:1; - ULONG Domain:4; - ULONG Ecc:1; - ULONG PageFrameNumber:22; -} HARDWARE_PDE_ARMV6, *PHARDWARE_PDE_ARMV6; - -typedef struct _HARDWARE_LARGE_PTE_ARMV6 -{ - ULONG Valid:1; // Only for small pages - ULONG LargePage:1; // Note, if large then Valid = 0 - ULONG Buffered:1; - ULONG Cached:1; - ULONG NoExecute:1; - ULONG Domain:4; - ULONG Ecc:1; - ULONG Accessed:1; - ULONG Owner:1; - ULONG CacheAttributes:3; - ULONG ReadOnly:1; - ULONG Shared:1; - ULONG NonGlobal:1; - ULONG SuperLagePage:1; - ULONG Reserved:1; - ULONG PageFrameNumber:12; -} HARDWARE_LARGE_PTE_ARMV6, *PHARDWARE_LARGE_PTE_ARMV6; - -typedef struct _HARDWARE_PTE_ARMV6 -{ - ULONG NoExecute:1; - ULONG Valid:1; - ULONG Buffered:1; - ULONG Cached:1; - ULONG Accessed:1; - ULONG Owner:1; - ULONG CacheAttributes:3; - ULONG ReadOnly:1; - ULONG Shared:1; - ULONG NonGlobal:1; - ULONG PageFrameNumber:20; -} HARDWARE_PTE_ARMV6, *PHARDWARE_PTE_ARMV6; - -C_ASSERT(sizeof(HARDWARE_PDE_ARMV6) == sizeof(ULONG)); -C_ASSERT(sizeof(HARDWARE_LARGE_PTE_ARMV6) == sizeof(ULONG)); -C_ASSERT(sizeof(HARDWARE_PTE_ARMV6) == sizeof(ULONG)); -#endif - -/* For FreeLDR */ -typedef struct _PAGE_TABLE_ARM -{ - HARDWARE_PTE_ARMV6 Pte[1024]; -} PAGE_TABLE_ARM, *PPAGE_TABLE_ARM; - -typedef struct _PAGE_DIRECTORY_ARM -{ - union - { - HARDWARE_PDE_ARMV6 Pde[4096]; - HARDWARE_LARGE_PTE_ARMV6 Pte[4096]; - }; -} PAGE_DIRECTORY_ARM, *PPAGE_DIRECTORY_ARM; - -C_ASSERT(sizeof(PAGE_TABLE_ARM) == PAGE_SIZE); -C_ASSERT(sizeof(PAGE_DIRECTORY_ARM) == (4 * PAGE_SIZE)); - -typedef enum _ARM_DOMAIN -{ - FaultDomain, - ClientDomain, - InvalidDomain, - ManagerDomain -} ARM_DOMAIN; +/* Easy accessing PFN in PTE */ +#define PFN_FROM_PTE(v) ((v)->u.Hard.PageFrameNumber) + +/* Macros for portable PTE modification */ #define MI_MAKE_LOCAL_PAGE(x) ((x)->u.Hard.NonGlobal = 1) #define MI_MAKE_DIRTY_PAGE(x) #define MI_MAKE_ACCESSED_PAGE(x) -#define MI_MAKE_OWNER_PAGE(x) ((x)->u.Hard.Owner = 1) -#define MI_MAKE_WRITE_PAGE(x) ((x)->u.Hard.ReadOnly = 0) #define MI_PAGE_DISABLE_CACHE(x) ((x)->u.Hard.Cached = 0) #define MI_PAGE_WRITE_THROUGH(x) ((x)->u.Hard.Buffered = 0) #define MI_PAGE_WRITE_COMBINED(x) ((x)->u.Hard.Buffered = 1) +#define MI_IS_PAGE_LARGE(x) FALSE #define MI_IS_PAGE_WRITEABLE(x) ((x)->u.Hard.ReadOnly == 0) #define MI_IS_PAGE_COPY_ON_WRITE(x)FALSE #define MI_IS_PAGE_DIRTY(x) TRUE -#define MI_IS_PAGE_LARGE(x) FALSE +#define MI_MAKE_OWNER_PAGE(x) ((x)->u.Hard.Owner = 1) +#define MI_MAKE_WRITE_PAGE(x) ((x)->u.Hard.ReadOnly = 0) -/* Easy accessing PFN in PTE */ -#define PFN_FROM_PTE(v) ((v)->u.Hard.PageFrameNumber) +/* Convert an address to a corresponding PTE */ +#define MiAddressToPte(x) \ + ((PMMPTE)(PTE_BASE + (((ULONG)(x) >> 12) << 2))) -/* See PDR definition */ -#define MI_HYPERSPACE_PTES (256 - 1) -#define MI_ZERO_PTES (32) -#define MI_MAPPING_RANGE_START ((ULONG)HYPER_SPACE) -#define MI_MAPPING_RANGE_END (MI_MAPPING_RANGE_START + \ - MI_HYPERSPACE_PTES * PAGE_SIZE) -#define MI_ZERO_PTE (PMMPTE)(MI_MAPPING_RANGE_END + \ - PAGE_SIZE) -#define MI_DUMMY_PTE (PMMPTE)(MI_MAPPING_RANGE_END + \ - PAGE_SIZE) -#define MI_VAD_BITMAP (PMMPTE)(MI_DUMMY_PTE + \ - PAGE_SIZE) -#define MI_WORKING_SET_LIST (PMMPTE)(MI_VAD_BITMAP + \ - PAGE_SIZE) +/* Convert an address to a corresponding PDE */ +#define MiAddressToPde(x) \ + ((PMMPDE)(PDE_BASE + (((ULONG)(x) >> 20) << 2))) + +/* Convert an address to a corresponding PTE offset/index */ +#define MiAddressToPteOffset(x) \ + ((((ULONG)(x)) << 12) >> 24) -/* Retrives the PDE entry for the given VA */ -#define MiGetPdeAddress(x) ((PMMPDE)(PDE_BASE + (((ULONG)(x) >> 20) << 2))) -#define MiAddressToPde(x) MiGetPdeAddress(x) +/* Convert an address to a corresponding PDE offset/index */ +#define MiAddressToPdeOffset(x) \ + (((ULONG)(x)) >> 20) +#define MiGetPdeOffset MiAddressToPdeOffset -/* Retrieves the PTE entry for the given VA */ -#define MiGetPteAddress(x) ((PMMPTE)(PTE_BASE + (((ULONG)(x) >> 12) << 2))) -#define MiAddressToPte(x) MiGetPteAddress(x) +/* Convert a PTE/PDE into a corresponding address */ +#define MiPteToAddress(_Pte) ((PVOID)((ULONG)(_Pte) << 10)) +#define MiPdeToAddress(_Pde) ((PVOID)((ULONG)(_Pde) << 18)) -/* Retrives the PDE offset for the given VA */ -#define MiGetPdeOffset(x) (((ULONG)(x)) >> 20) -#define MiGetPteOffset(x) ((((ULONG)(x)) << 12) >> 24) -#define MiAddressToPteOffset(x) MiGetPteOffset(x) +/* Translate between P*Es */ +#define MiPdeToPte(_Pde) ((PMMPTE)0) /* FIXME */ +#define MiPteToPde(_Pte) ((PMMPDE)0) /* FIXME */ -/* Convert a PTE into a corresponding address */ -#define MiPteToAddress(x) ((PVOID)((ULONG)(x) << 10)) -#define MiPdeToAddress(x) ((PVOID)((ULONG)(x) << 18)) +/* Check P*E boundaries */ +#define MiIsPteOnPdeBoundary(PointerPte) \ + ((((ULONG_PTR)PointerPte) & (PAGE_SIZE - 1)) == 0) + +// +// Decodes a Prototype PTE into the underlying PTE +// +#define MiProtoPteToPte(x) \ + (PMMPTE)((ULONG_PTR)MmPagedPoolStart + \ + (((x)->u.Proto.ProtoAddressHigh << 9) | (x)->u.Proto.ProtoAddressLow << 2)) + +// +// Decodes a Prototype PTE into the underlying PTE +// +#define MiSubsectionPteToSubsection(x) \ + ((x)->u.Subsect.WhichPool == PagedPool) ? \ + (PMMPTE)((ULONG_PTR)MmSubsectionBase + \ + (((x)->u.Subsect.SubsectionAddressHigh << 7) | \ + (x)->u.Subsect.SubsectionAddressLow << 3)) : \ + (PMMPTE)((ULONG_PTR)MmNonPagedPoolEnd - \ + (((x)->u.Subsect.SubsectionAddressHigh << 7) | \ + (x)->u.Subsect.SubsectionAddressLow << 3)) + +// +// Number of bits corresponding to the area that a coarse page table occupies (1KB) +// +#define CPT_SHIFT 10 + +/* See PDR definition */ +#define MI_ZERO_PTE (PMMPTE)(MI_MAPPING_RANGE_END + \ + PAGE_SIZE)