X-Git-Url: https://git.reactos.org/?p=reactos.git;a=blobdiff_plain;f=reactos%2Fsubsystems%2Fntvdm%2Fhardware%2Fpic.c;h=b5de2b407c252fd257f92ca96f7cedb184ce2253;hp=a5b068c270e8771d006f1cac4cb46407f64cd4f8;hb=f991665f099740668d9e7c7fe03b83ebddf04aa3;hpb=d772498800f9e508a5fca88a78dbfb96ba5405c2 diff --git a/reactos/subsystems/ntvdm/hardware/pic.c b/reactos/subsystems/ntvdm/hardware/pic.c index a5b068c270e..b5de2b407c2 100644 --- a/reactos/subsystems/ntvdm/hardware/pic.c +++ b/reactos/subsystems/ntvdm/hardware/pic.c @@ -154,7 +154,7 @@ static VOID PicWriteData(BYTE Port, BYTE Value) Pic->Initialization = FALSE; } -static BYTE WINAPI PicReadPort(ULONG Port) +static BYTE WINAPI PicReadPort(USHORT Port) { switch (Port) { @@ -174,7 +174,7 @@ static BYTE WINAPI PicReadPort(ULONG Port) return 0; } -static VOID WINAPI PicWritePort(ULONG Port, BYTE Data) +static VOID WINAPI PicWritePort(USHORT Port, BYTE Data) { switch (Port) { @@ -250,31 +250,11 @@ VOID PicInterruptRequest(BYTE Number) BYTE PicGetInterrupt(VOID) { - INT i, j; + INT i; - /* Search interrupts by priority */ + /* Search the master PIC interrupts by priority */ for (i = 0; i < 8; i++) { - /* Check if this line is cascaded to the slave PIC */ - if ((i == 2) - && MasterPic.CascadeRegister & (1 << 2) - && SlavePic.Slave - && (SlavePic.CascadeRegister == 2)) - { - /* Search the slave PIC interrupts by priority */ - for (j = 0; j < 8; j++) if ((j != 1) && SlavePic.IntRequestRegister & (1 << j)) - { - /* Clear the IRR flag */ - SlavePic.IntRequestRegister &= ~(1 << j); - - /* Set the ISR flag, unless AEOI is enabled */ - if (!SlavePic.AutoEoi) SlavePic.InServiceRegister |= (1 << j); - - /* Return the interrupt number */ - return SlavePic.IntOffset + j; - } - } - if (MasterPic.IntRequestRegister & (1 << i)) { /* Clear the IRR flag */ @@ -287,6 +267,30 @@ BYTE PicGetInterrupt(VOID) return MasterPic.IntOffset + i; } } + + /* Search the slave PIC interrupts by priority */ + for (i = 0; i < 8; i++) + { + if (SlavePic.IntRequestRegister & (1 << i)) + { + /* Clear the IRR flag */ + SlavePic.IntRequestRegister &= ~(1 << i); + + if ((i == 1) && SlavePic.CascadeRegisterSet) + { + /* This interrupt is routed to the master PIC */ + return MasterPic.IntOffset + SlavePic.CascadeRegister; + } + else + { + /* Set the ISR flag, unless AEOI is enabled */ + if (!SlavePic.AutoEoi) SlavePic.InServiceRegister |= (1 << i); + + /* Return the interrupt number */ + return SlavePic.IntOffset + i; + } + } + } /* Spurious interrupt */ if (MasterPic.InServiceRegister & (1 << 2)) return SlavePic.IntOffset + 7;