Add all pci bridge control function (PciBridgeIoBase, PciBridgeIoLimit, PciBridgeMemo...
authorevb <evb@svn.reactos.org>
Tue, 27 Jul 2010 03:24:24 +0000 (03:24 +0000)
committerevb <evb@svn.reactos.org>
Tue, 27 Jul 2010 03:24:24 +0000 (03:24 +0000)
commitbf7de6528b851ef962d01e56d31b89d3e3433ac4
tree3c91bf3741f5cf8615f0c525628aa99d1f1808a1
parent8458508701f351734a73d941ba10063da33a7350
Add all pci bridge control function (PciBridgeIoBase, PciBridgeIoLimit, PciBridgeMemoryBase, PciBridgeMemoryLimit, PciBridgePrefetchMemoryBase, PciBridgePrefetchMemoryLimit, PciBridgeMemoryWorstCasealignment, PciBridgeIsPositiveDecode, PciBridgeIsSubtractiveDecode)
More support ICH0/1/2/3/4 hub
Add all PCI2PCI bridge limit/current resource codes (PPBridge_*), now is BAR setup okay, and Device_* must be implement
Support ISA+VGA legacy decode, 20+64-bit decode, ROM BAR, prefetch BAR

svn path=/trunk/; revision=48298
reactos/drivers/bus/pcix/pci.h
reactos/drivers/bus/pcix/pci/ppbridge.c
reactos/drivers/bus/pcix/utils.c