[HAL]
authorTimo Kreuzer <timo.kreuzer@reactos.org>
Thu, 31 Dec 2009 14:29:50 +0000 (14:29 +0000)
committerTimo Kreuzer <timo.kreuzer@reactos.org>
Thu, 31 Dec 2009 14:29:50 +0000 (14:29 +0000)
- Implement architecture specific HalpSetInterruptGate, replacing SetInterruptGate

svn path=/branches/ros-amd64-bringup/; revision=44823

reactos/hal/halamd64/generic/misc.c
reactos/hal/halx86/generic/misc.c
reactos/hal/halx86/include/halp.h
reactos/hal/halx86/mp/apic.c

index 8929e9f..a591c14 100644 (file)
@@ -46,6 +46,40 @@ HalpUnmapVirtualAddress(IN PVOID VirtualAddress,
     MmUnmapIoSpace(VirtualAddress, NumberPages << PAGE_SHIFT);
 }
 
+VOID
+NTAPI
+HalpInitIdtEntry(PKIDTENTRY64 Idt, PVOID Address)
+{
+    Idt->OffsetLow = (ULONG_PTR)Address & 0xffff;
+    Idt->OffsetMiddle = ((ULONG_PTR)Address >> 16) & 0xffff;
+    Idt->OffsetHigh = (ULONG_PTR)Address >> 32;
+    Idt->Selector = KGDT_64_R0_CODE;
+    Idt->IstIndex = 0;
+    Idt->Type = 0x0e;
+    Idt->Dpl = 0;
+    Idt->Present = 1;
+    Idt->Reserved0 = 0;
+    Idt->Reserved1 = 0;
+}
+
+VOID
+NTAPI
+HalpSetInterruptGate(ULONG Index, PVOID Address)
+{
+    ULONG_PTR Flags;
+
+    /* Disable interupts */
+    Flags = __readeflags();
+    _disable();
+
+    /* Initialize the entry */
+    HalpInitIdtEntry(&KeGetPcr()->IdtBase[Index], Address);
+
+    /* Enable interrupts if they were enabled previously */
+    __writeeflags(Flags);
+}
+
+
 /* FUNCTIONS *****************************************************************/
 
 /*
index d8710c8..ca6af71 100644 (file)
@@ -43,6 +43,27 @@ HalpUnmapVirtualAddress(IN PVOID VirtualAddress,
     MmUnmapIoSpace(VirtualAddress, NumberPages << PAGE_SHIFT);
 }
 
+VOID
+NTAPI
+HalpSetInterruptGate(ULONG Index, PVOID address)
+{
+  KIDTENTRY *idt;
+  KIDT_ACCESS Access;
+
+  /* Set the IDT Access Bits */
+  Access.Reserved = 0;
+  Access.Present = 1;
+  Access.Dpl = 0; /* Kernel-Mode */
+  Access.SystemSegmentFlag = 0;
+  Access.SegmentType = I386_INTERRUPT_GATE;
+  
+  idt = (KIDTENTRY*)((ULONG)KeGetPcr()->IDT + index * sizeof(KIDTENTRY));
+  idt->Offset = (USHORT)((ULONG_PTR)address & 0xffff);
+  idt->Selector = KGDT_R0_CODE;
+  idt->Access = Access.Value;
+  idt->ExtendedOffset = (USHORT)((ULONG_PTR)address >> 16);
+}
+
 /* FUNCTIONS *****************************************************************/
 
 /*
@@ -103,3 +124,4 @@ KeFlushWriteBuffer(VOID)
     /* Not implemented on x86 */
     return;
 }
+
index 198842a..cd6a7c0 100644 (file)
@@ -235,6 +235,10 @@ HalpReleaseCmosSpinLock(
     VOID
 );
 
+VOID
+NTAPI
+HalpSetInterruptGate(ULONG Index, PVOID Address);
+
 #ifdef _M_AMD64
 #define KfLowerIrql KeLowerIrql
 #ifndef CONFIG_SMP
index cb6de82..11bec8d 100644 (file)
@@ -848,44 +848,6 @@ APICCalibrateTimer(ULONG CPU)
          CPUMap[CPU].BusSpeed%1000000);
 }
 
-VOID 
-SetInterruptGate(ULONG index, ULONG_PTR address)
-{
-#ifdef _M_AMD64
-  KIDTENTRY64 *idt;
-
-  idt = &KeGetPcr()->IdtBase[index];
-
-  idt->OffsetLow = address & 0xffff;
-  idt->Selector = KGDT_64_R0_CODE;
-  idt->IstIndex = 0;
-  idt->Reserved0 = 0;
-  idt->Type = 0x0e;
-  idt->Dpl = 0;
-  idt->Present = 1;
-  idt->OffsetMiddle = (address >> 16) & 0xffff;
-  idt->OffsetHigh = address >> 32;
-  idt->Reserved1 = 0;
-  idt->Alignment = 0;
-#else
-  KIDTENTRY *idt;
-  KIDT_ACCESS Access;
-
-  /* Set the IDT Access Bits */
-  Access.Reserved = 0;
-  Access.Present = 1;
-  Access.Dpl = 0; /* Kernel-Mode */
-  Access.SystemSegmentFlag = 0;
-  Access.SegmentType = I386_INTERRUPT_GATE;
-  
-  idt = (KIDTENTRY*)((ULONG)KeGetPcr()->IDT + index * sizeof(KIDTENTRY));
-  idt->Offset = (USHORT)(address & 0xffff);
-  idt->Selector = KGDT_R0_CODE;
-  idt->Access = Access.Value;
-  idt->ExtendedOffset = (USHORT)(address >> 16);
-#endif
-}
-
 VOID HaliInitBSP(VOID)
 {
 #ifdef CONFIG_SMP
@@ -904,11 +866,11 @@ VOID HaliInitBSP(VOID)
    BSPInitialized = TRUE;
 
    /* Setup interrupt handlers */
-   SetInterruptGate(LOCAL_TIMER_VECTOR, (ULONG_PTR)MpsTimerInterrupt);
-   SetInterruptGate(ERROR_VECTOR, (ULONG_PTR)MpsErrorInterrupt);
-   SetInterruptGate(SPURIOUS_VECTOR, (ULONG_PTR)MpsSpuriousInterrupt);
+   HalpSetInterruptGate(LOCAL_TIMER_VECTOR, MpsTimerInterrupt);
+   HalpSetInterruptGate(ERROR_VECTOR, MpsErrorInterrupt);
+   HalpSetInterruptGate(SPURIOUS_VECTOR, MpsSpuriousInterrupt);
 #ifdef CONFIG_SMP
-   SetInterruptGate(IPI_VECTOR, (ULONG_PTR)MpsIpiInterrupt);
+   HalpSetInterruptGate(IPI_VECTOR, MpsIpiInterrupt);
 #endif
    DPRINT1("APIC is mapped at 0x%p\n", (PVOID)APICBase);