- Move more stuff to wdm.h

- Add _PCI_COMMON_HEADER
- Improve _PCI_COMMON_CONFIG
- Enable msc extensions

svn path=/branches/header-work/; revision=45750

diff --git a/ReactOS-i386.rbuild b/ReactOS-i386.rbuild
index a1abbf9..c2a720a 100644 (file)
--- a/ReactOS-i386.rbuild
+++ b/ReactOS-i386.rbuild
@@ -24,6 +24,7 @@
                        <compilerflag>-ftracer</compilerflag>
                        <compilerflag>-momit-leaf-frame-pointer</compilerflag>
                </if>
+               <compilerflag>-fms-extensions</compilerflag>
                <compilerflag>-mpreferred-stack-boundary=2</compilerflag>
                <compilerflag compiler="midl">-m32 --win32</compilerflag>
                <compilerflag compiler="cc,cxx">-gstabs+</compilerflag>

diff --git a/include/ddk/wdm.h b/include/ddk/wdm.h
index 83dd33e..31f309f 100644 (file)
--- a/include/ddk/wdm.h
+++ b/include/ddk/wdm.h
@@ -2598,8 +2598,92 @@ typedef struct _SHARE_ACCESS {
   ULONG  SharedDelete;
 } SHARE_ACCESS, *PSHARE_ACCESS;
 
+typedef struct _PCI_COMMON_HEADER {
+  USHORT  VendorID;
+  USHORT  DeviceID;
+  USHORT  Command;
+  USHORT  Status;
+  UCHAR   RevisionID;
+  UCHAR   ProgIf;
+  UCHAR   SubClass;
+  UCHAR   BaseClass;
+  UCHAR   CacheLineSize;
+  UCHAR   LatencyTimer;
+  UCHAR   HeaderType;
+  UCHAR   BIST;
+  union {
+    struct _PCI_HEADER_TYPE_0 {
+      ULONG   BaseAddresses[PCI_TYPE0_ADDRESSES];
+      ULONG   CIS;
+      USHORT  SubVendorID;
+      USHORT  SubSystemID;
+      ULONG   ROMBaseAddress;
+      UCHAR   CapabilitiesPtr;
+      UCHAR   Reserved1[3];
+      ULONG   Reserved2;
+      UCHAR   InterruptLine;
+      UCHAR   InterruptPin;
+      UCHAR   MinimumGrant;
+      UCHAR   MaximumLatency;
+      } type0;
+    struct _PCI_HEADER_TYPE_1 {
+      ULONG   BaseAddresses[PCI_TYPE1_ADDRESSES];
+      UCHAR   PrimaryBus;
+      UCHAR   SecondaryBus;
+      UCHAR   SubordinateBus;
+      UCHAR   SecondaryLatency;
+      UCHAR   IOBase;
+      UCHAR   IOLimit;
+      USHORT  SecondaryStatus;
+      USHORT  MemoryBase;
+      USHORT  MemoryLimit;
+      USHORT  PrefetchBase;
+      USHORT  PrefetchLimit;
+      ULONG   PrefetchBaseUpper32;
+      ULONG   PrefetchLimitUpper32;
+      USHORT  IOBaseUpper16;
+      USHORT  IOLimitUpper16;
+      UCHAR   CapabilitiesPtr;
+      UCHAR   Reserved1[3];
+      ULONG   ROMBaseAddress;
+      UCHAR   InterruptLine;
+      UCHAR   InterruptPin;
+      USHORT  BridgeControl;
+      } type1;
+    struct _PCI_HEADER_TYPE_2 {
+      ULONG   SocketRegistersBaseAddress;
+      UCHAR   CapabilitiesPtr;
+      UCHAR   Reserved;
+      USHORT  SecondaryStatus;
+      UCHAR   PrimaryBus;
+      UCHAR   SecondaryBus;
+      UCHAR   SubordinateBus;
+      UCHAR   SecondaryLatency;
+      struct  {
+        ULONG   Base;
+        ULONG   Limit;
+      } Range[PCI_TYPE2_ADDRESSES-1];
+      UCHAR   InterruptLine;
+      UCHAR   InterruptPin;
+      USHORT  BridgeControl;
+    } type2;
+  } u;
+} PCI_COMMON_HEADER, *PPCI_COMMON_HEADER;
+
+#ifdef __cplusplus
 
+typedef struct _PCI_COMMON_CONFIG : PCI_COMMON_HEADER {
+  UCHAR  DeviceSpecific[192];
+} PCI_COMMON_CONFIG, *PPCI_COMMON_CONFIG;
 
+#else
+
+typedef struct _PCI_COMMON_CONFIG {
+  PCI_COMMON_HEADER  DUMMYSTRUCTNAME;
+  UCHAR  DeviceSpecific[192];
+} PCI_COMMON_CONFIG, *PPCI_COMMON_CONFIG;
+
+#endif
 
 typedef struct _PCI_SLOT_NUMBER {
   union {

diff --git a/include/ddk/winddk.h b/include/ddk/winddk.h
index 8f95f73..917ecc9 100644 (file)
--- a/include/ddk/winddk.h
+++ b/include/ddk/winddk.h
@@ -1124,80 +1124,6 @@ typedef struct _KEY_USER_FLAGS_INFORMATION {
   ULONG  UserFlags;
 } KEY_USER_FLAGS_INFORMATION, *PKEY_USER_FLAGS_INFORMATION;
 
-typedef struct _PCI_COMMON_CONFIG {
-  USHORT  VendorID;
-  USHORT  DeviceID;
-  USHORT  Command;
-  USHORT  Status;
-  UCHAR  RevisionID;
-  UCHAR  ProgIf;
-  UCHAR  SubClass;
-  UCHAR  BaseClass;
-  UCHAR  CacheLineSize;
-  UCHAR  LatencyTimer;
-  UCHAR  HeaderType;
-  UCHAR  BIST;
-  union {
-    struct _PCI_HEADER_TYPE_0 {
-      ULONG  BaseAddresses[PCI_TYPE0_ADDRESSES];
-      ULONG  CIS;
-      USHORT  SubVendorID;
-      USHORT  SubSystemID;
-      ULONG  ROMBaseAddress;
-      UCHAR  CapabilitiesPtr;
-      UCHAR  Reserved1[3];
-      ULONG  Reserved2;
-      UCHAR  InterruptLine;
-      UCHAR  InterruptPin;
-      UCHAR  MinimumGrant;
-      UCHAR  MaximumLatency;
-    } type0;
-    struct _PCI_HEADER_TYPE_1 {
-      ULONG  BaseAddresses[PCI_TYPE1_ADDRESSES];
-      UCHAR  PrimaryBus;
-      UCHAR  SecondaryBus;
-      UCHAR  SubordinateBus;
-      UCHAR  SecondaryLatency;
-      UCHAR  IOBase;
-      UCHAR  IOLimit;
-      USHORT  SecondaryStatus;
-      USHORT  MemoryBase;
-      USHORT  MemoryLimit;
-      USHORT  PrefetchBase;
-      USHORT  PrefetchLimit;
-      ULONG  PrefetchBaseUpper32;
-      ULONG  PrefetchLimitUpper32;
-      USHORT  IOBaseUpper16;
-      USHORT  IOLimitUpper16;
-      UCHAR  CapabilitiesPtr;
-      UCHAR  Reserved1[3];
-      ULONG  ROMBaseAddress;
-      UCHAR  InterruptLine;
-      UCHAR  InterruptPin;
-      USHORT  BridgeControl;
-    } type1;
-    struct _PCI_HEADER_TYPE_2 {
-      ULONG  SocketRegistersBaseAddress;
-      UCHAR  CapabilitiesPtr;
-      UCHAR  Reserved;
-      USHORT  SecondaryStatus;
-      UCHAR  PrimaryBus;
-      UCHAR  SecondaryBus;
-      UCHAR  SubordinateBus;
-      UCHAR  SecondaryLatency;
-      struct {
-        ULONG  Base;
-        ULONG  Limit;
-      } Range[PCI_TYPE2_ADDRESSES - 1];
-      UCHAR  InterruptLine;
-      UCHAR  InterruptPin;
-      USHORT  BridgeControl;
-    } type2;
-  } u;
-  UCHAR  DeviceSpecific[192];
-} PCI_COMMON_CONFIG, *PPCI_COMMON_CONFIG;
-
-
 #define PCI_ADDRESS_MEMORY_SPACE            0x00000000
 
 typedef struct _OSVERSIONINFOA {