Fix build (don't redefine structures)
authorTimo Kreuzer <timo.kreuzer@reactos.org>
Mon, 31 May 2010 02:23:30 +0000 (02:23 +0000)
committerTimo Kreuzer <timo.kreuzer@reactos.org>
Mon, 31 May 2010 02:23:30 +0000 (02:23 +0000)
svn path=/trunk/; revision=47481

reactos/include/ddk/wdm.h
reactos/include/xdk/iotypes.h

index aaa474b..563801b 100644 (file)
@@ -6594,6 +6594,65 @@ typedef struct _PCI_SLOT_NUMBER {
 /* While MS WDK uses inheritance in C++, we cannot do this with gcc, as
    inheritance, even from a struct renders the type non-POD. So we use
    this hack */
+
+    struct _PCI_HEADER_TYPE_0 {
+      ULONG BaseAddresses[PCI_TYPE0_ADDRESSES];
+      ULONG CIS;
+      USHORT SubVendorID;
+      USHORT SubSystemID;
+      ULONG ROMBaseAddress;
+      UCHAR CapabilitiesPtr;
+      UCHAR Reserved1[3];
+      ULONG Reserved2;
+      UCHAR InterruptLine;
+      UCHAR InterruptPin;
+      UCHAR MinimumGrant;
+      UCHAR MaximumLatency;
+    };
+
+    struct _PCI_HEADER_TYPE_1 {
+      ULONG BaseAddresses[PCI_TYPE1_ADDRESSES];
+      UCHAR PrimaryBus;
+      UCHAR SecondaryBus;
+      UCHAR SubordinateBus;
+      UCHAR SecondaryLatency;
+      UCHAR IOBase;
+      UCHAR IOLimit;
+      USHORT SecondaryStatus;
+      USHORT MemoryBase;
+      USHORT MemoryLimit;
+      USHORT PrefetchBase;
+      USHORT PrefetchLimit;
+      ULONG PrefetchBaseUpper32;
+      ULONG PrefetchLimitUpper32;
+      USHORT IOBaseUpper16;
+      USHORT IOLimitUpper16;
+      UCHAR CapabilitiesPtr;
+      UCHAR Reserved1[3];
+      ULONG ROMBaseAddress;
+      UCHAR InterruptLine;
+      UCHAR InterruptPin;
+      USHORT BridgeControl;
+    };
+
+    struct _PCI_HEADER_TYPE_2 {
+      ULONG SocketRegistersBaseAddress;
+      UCHAR CapabilitiesPtr;
+      UCHAR Reserved;
+      USHORT SecondaryStatus;
+      UCHAR PrimaryBus;
+      UCHAR SecondaryBus;
+      UCHAR SubordinateBus;
+      UCHAR SecondaryLatency;
+      struct {
+        ULONG Base;
+        ULONG Limit;
+      } Range[PCI_TYPE2_ADDRESSES-1];
+      UCHAR InterruptLine;
+      UCHAR InterruptPin;
+      USHORT BridgeControl;
+    };
+
 #define PCI_COMMON_HEADER_LAYOUT \
   USHORT VendorID; \
   USHORT DeviceID; \
@@ -6608,61 +6667,9 @@ typedef struct _PCI_SLOT_NUMBER {
   UCHAR HeaderType; \
   UCHAR BIST; \
   union { \
-    struct _PCI_HEADER_TYPE_0 { \
-      ULONG BaseAddresses[PCI_TYPE0_ADDRESSES]; \
-      ULONG CIS; \
-      USHORT SubVendorID; \
-      USHORT SubSystemID; \
-      ULONG ROMBaseAddress; \
-      UCHAR CapabilitiesPtr; \
-      UCHAR Reserved1[3]; \
-      ULONG Reserved2; \
-      UCHAR InterruptLine; \
-      UCHAR InterruptPin; \
-      UCHAR MinimumGrant; \
-      UCHAR MaximumLatency; \
-    } type0; \
-    struct _PCI_HEADER_TYPE_1 { \
-      ULONG BaseAddresses[PCI_TYPE1_ADDRESSES]; \
-      UCHAR PrimaryBus; \
-      UCHAR SecondaryBus; \
-      UCHAR SubordinateBus; \
-      UCHAR SecondaryLatency; \
-      UCHAR IOBase; \
-      UCHAR IOLimit; \
-      USHORT SecondaryStatus; \
-      USHORT MemoryBase; \
-      USHORT MemoryLimit; \
-      USHORT PrefetchBase; \
-      USHORT PrefetchLimit; \
-      ULONG PrefetchBaseUpper32; \
-      ULONG PrefetchLimitUpper32; \
-      USHORT IOBaseUpper16; \
-      USHORT IOLimitUpper16; \
-      UCHAR CapabilitiesPtr; \
-      UCHAR Reserved1[3]; \
-      ULONG ROMBaseAddress; \
-      UCHAR InterruptLine; \
-      UCHAR InterruptPin; \
-      USHORT BridgeControl; \
-    } type1; \
-    struct _PCI_HEADER_TYPE_2 { \
-      ULONG SocketRegistersBaseAddress; \
-      UCHAR CapabilitiesPtr; \
-      UCHAR Reserved; \
-      USHORT SecondaryStatus; \
-      UCHAR PrimaryBus; \
-      UCHAR SecondaryBus; \
-      UCHAR SubordinateBus; \
-      UCHAR SecondaryLatency; \
-      struct { \
-        ULONG Base; \
-        ULONG Limit; \
-      } Range[PCI_TYPE2_ADDRESSES-1]; \
-      UCHAR InterruptLine; \
-      UCHAR InterruptPin; \
-      USHORT BridgeControl; \
-    } type2; \
+    struct _PCI_HEADER_TYPE_0 type0; \
+    struct _PCI_HEADER_TYPE_1 type1; \
+    struct _PCI_HEADER_TYPE_2 type2; \
   } u;
 
 typedef struct _PCI_COMMON_HEADER {
index 19af071..6ac3d6e 100644 (file)
@@ -2917,6 +2917,65 @@ typedef struct _PCI_SLOT_NUMBER {
 /* While MS WDK uses inheritance in C++, we cannot do this with gcc, as
    inheritance, even from a struct renders the type non-POD. So we use
    this hack */
+
+    struct _PCI_HEADER_TYPE_0 {
+      ULONG BaseAddresses[PCI_TYPE0_ADDRESSES];
+      ULONG CIS;
+      USHORT SubVendorID;
+      USHORT SubSystemID;
+      ULONG ROMBaseAddress;
+      UCHAR CapabilitiesPtr;
+      UCHAR Reserved1[3];
+      ULONG Reserved2;
+      UCHAR InterruptLine;
+      UCHAR InterruptPin;
+      UCHAR MinimumGrant;
+      UCHAR MaximumLatency;
+    };
+
+    struct _PCI_HEADER_TYPE_1 {
+      ULONG BaseAddresses[PCI_TYPE1_ADDRESSES];
+      UCHAR PrimaryBus;
+      UCHAR SecondaryBus;
+      UCHAR SubordinateBus;
+      UCHAR SecondaryLatency;
+      UCHAR IOBase;
+      UCHAR IOLimit;
+      USHORT SecondaryStatus;
+      USHORT MemoryBase;
+      USHORT MemoryLimit;
+      USHORT PrefetchBase;
+      USHORT PrefetchLimit;
+      ULONG PrefetchBaseUpper32;
+      ULONG PrefetchLimitUpper32;
+      USHORT IOBaseUpper16;
+      USHORT IOLimitUpper16;
+      UCHAR CapabilitiesPtr;
+      UCHAR Reserved1[3];
+      ULONG ROMBaseAddress;
+      UCHAR InterruptLine;
+      UCHAR InterruptPin;
+      USHORT BridgeControl;
+    };
+
+    struct _PCI_HEADER_TYPE_2 {
+      ULONG SocketRegistersBaseAddress;
+      UCHAR CapabilitiesPtr;
+      UCHAR Reserved;
+      USHORT SecondaryStatus;
+      UCHAR PrimaryBus;
+      UCHAR SecondaryBus;
+      UCHAR SubordinateBus;
+      UCHAR SecondaryLatency;
+      struct {
+        ULONG Base;
+        ULONG Limit;
+      } Range[PCI_TYPE2_ADDRESSES-1];
+      UCHAR InterruptLine;
+      UCHAR InterruptPin;
+      USHORT BridgeControl;
+    };
+
 #define PCI_COMMON_HEADER_LAYOUT \
   USHORT VendorID; \
   USHORT DeviceID; \
@@ -2931,61 +2990,9 @@ typedef struct _PCI_SLOT_NUMBER {
   UCHAR HeaderType; \
   UCHAR BIST; \
   union { \
-    struct _PCI_HEADER_TYPE_0 { \
-      ULONG BaseAddresses[PCI_TYPE0_ADDRESSES]; \
-      ULONG CIS; \
-      USHORT SubVendorID; \
-      USHORT SubSystemID; \
-      ULONG ROMBaseAddress; \
-      UCHAR CapabilitiesPtr; \
-      UCHAR Reserved1[3]; \
-      ULONG Reserved2; \
-      UCHAR InterruptLine; \
-      UCHAR InterruptPin; \
-      UCHAR MinimumGrant; \
-      UCHAR MaximumLatency; \
-    } type0; \
-    struct _PCI_HEADER_TYPE_1 { \
-      ULONG BaseAddresses[PCI_TYPE1_ADDRESSES]; \
-      UCHAR PrimaryBus; \
-      UCHAR SecondaryBus; \
-      UCHAR SubordinateBus; \
-      UCHAR SecondaryLatency; \
-      UCHAR IOBase; \
-      UCHAR IOLimit; \
-      USHORT SecondaryStatus; \
-      USHORT MemoryBase; \
-      USHORT MemoryLimit; \
-      USHORT PrefetchBase; \
-      USHORT PrefetchLimit; \
-      ULONG PrefetchBaseUpper32; \
-      ULONG PrefetchLimitUpper32; \
-      USHORT IOBaseUpper16; \
-      USHORT IOLimitUpper16; \
-      UCHAR CapabilitiesPtr; \
-      UCHAR Reserved1[3]; \
-      ULONG ROMBaseAddress; \
-      UCHAR InterruptLine; \
-      UCHAR InterruptPin; \
-      USHORT BridgeControl; \
-    } type1; \
-    struct _PCI_HEADER_TYPE_2 { \
-      ULONG SocketRegistersBaseAddress; \
-      UCHAR CapabilitiesPtr; \
-      UCHAR Reserved; \
-      USHORT SecondaryStatus; \
-      UCHAR PrimaryBus; \
-      UCHAR SecondaryBus; \
-      UCHAR SubordinateBus; \
-      UCHAR SecondaryLatency; \
-      struct { \
-        ULONG Base; \
-        ULONG Limit; \
-      } Range[PCI_TYPE2_ADDRESSES-1]; \
-      UCHAR InterruptLine; \
-      UCHAR InterruptPin; \
-      USHORT BridgeControl; \
-    } type2; \
+    struct _PCI_HEADER_TYPE_0 type0; \
+    struct _PCI_HEADER_TYPE_1 type1; \
+    struct _PCI_HEADER_TYPE_2 type2; \
   } u;
 
 typedef struct _PCI_COMMON_HEADER {