}
else
{
- Fast486FpuException(State);
return FALSE;
}
}
}
else
{
- Fast486FpuException(State);
return FALSE;
}
}
}
else
{
- Fast486FpuException(State);
return FALSE;
}
}
}
else
{
- Fast486FpuException(State);
return FALSE;
}
}
}
else
{
- Fast486FpuException(State);
return FALSE;
}
}
if (!State->FpuControl.Dm)
{
- Fast486FpuException(State);
return FALSE;
}
}
}
else
{
- Fast486FpuException(State);
return FALSE;
}
}
if (!State->FpuControl.Dm)
{
- Fast486FpuException(State);
return FALSE;
}
}
if (!State->FpuControl.Um)
{
- Fast486FpuException(State);
return FALSE;
}
if (!State->FpuControl.Om)
{
- Fast486FpuException(State);
return FALSE;
}
}
else
{
- Fast486FpuException(State);
return FALSE;
}
}
}
else
{
- Fast486FpuException(State);
return FALSE;
}
}
}
else
{
- Fast486FpuException(State);
return FALSE;
}
}
if (!State->FpuControl.Dm)
{
- Fast486FpuException(State);
return FALSE;
}
}
else
{
- Fast486FpuException(State);
return FALSE;
}
}
#ifndef FAST486_NO_FPU
+ Fast486FpuExceptionCheck(State);
FPU_SAVE_LAST_INST();
if (FPU_GET_TAG(0) == FPU_TAG_EMPTY)
FPU_SET_TAG(0, FPU_TAG_SPECIAL);
}
- else Fast486FpuException(State);
return;
}
FPU_SET_TAG(0, FPU_TAG_SPECIAL);
}
- else Fast486FpuException(State);
return;
}
ULONG Value;
FAST486_FPU_DATA_REG MemoryData;
+ Fast486FpuExceptionCheck(State);
FPU_SAVE_LAST_INST();
FPU_SAVE_LAST_OPERAND();
{
ULONG Value = FPU_REAL4_INDEFINITE;
+ Fast486FpuExceptionCheck(State);
FPU_SAVE_LAST_INST();
FPU_SAVE_LAST_OPERAND();
if (!State->FpuControl.Im)
{
- Fast486FpuException(State);
return;
}
}
case 0x06:
case 0x07:
{
+ Fast486FpuExceptionCheck(State);
+ FPU_SAVE_LAST_INST();
+
if (FPU_GET_TAG(ModRegRm.SecondRegister) == FPU_TAG_EMPTY)
{
/* Raise the invalid operation exception */
if (!State->FpuControl.Im)
{
- Fast486FpuException(State);
return;
}
}
{
FAST486_FPU_DATA_REG Temp;
+ Fast486FpuExceptionCheck(State);
+ FPU_SAVE_LAST_INST();
+
if ((FPU_GET_TAG(0) == FPU_TAG_EMPTY)
|| FPU_GET_TAG(ModRegRm.SecondRegister) == FPU_TAG_EMPTY)
{
State->FpuStatus.Ie = TRUE;
-
- if (!State->FpuControl.Im) Fast486FpuException(State);
break;
}
case 0x1E:
case 0x1F:
{
+ Fast486FpuExceptionCheck(State);
+ FPU_SAVE_LAST_INST();
+
FPU_ST(ModRegRm.SecondRegister) = FPU_ST(0);
FPU_UPDATE_TAG(ModRegRm.SecondRegister);
/* FCHS */
case 0x20:
{
+ Fast486FpuExceptionCheck(State);
+ FPU_SAVE_LAST_INST();
+
if (FPU_GET_TAG(0) == FPU_TAG_EMPTY)
{
State->FpuStatus.Ie = TRUE;
-
- if (!State->FpuControl.Im) Fast486FpuException(State);
break;
}
/* FABS */
case 0x21:
{
+ Fast486FpuExceptionCheck(State);
+ FPU_SAVE_LAST_INST();
+
if (FPU_GET_TAG(0) == FPU_TAG_EMPTY)
{
State->FpuStatus.Ie = TRUE;
-
- if (!State->FpuControl.Im) Fast486FpuException(State);
break;
}
/* FTST */
case 0x24:
{
+ Fast486FpuExceptionCheck(State);
+ FPU_SAVE_LAST_INST();
+
Fast486FpuCompare(State, &FPU_ST(0), &FpuZero);
break;
}
/* FXAM */
case 0x25:
{
+ Fast486FpuExceptionCheck(State);
+ FPU_SAVE_LAST_INST();
+
/* The sign bit goes in C1, even if the register's empty */
State->FpuStatus.Code1 = FPU_ST(0).Sign;
&FpuZero
};
+ Fast486FpuExceptionCheck(State);
+ FPU_SAVE_LAST_INST();
+
Fast486FpuPush(State, Constants[ModRegRm.SecondRegister]);
break;
}
/* F2XM1 */
case 0x30:
{
+ Fast486FpuExceptionCheck(State);
FPU_SAVE_LAST_INST();
if (FPU_GET_TAG(0) == FPU_TAG_EMPTY)
{
State->FpuStatus.Ie = TRUE;
-
- if (!State->FpuControl.Im) Fast486FpuException(State);
break;
}
if (!State->FpuControl.Dm)
{
- Fast486FpuException(State);
break;
}
}
{
FAST486_FPU_DATA_REG Logarithm;
+ Fast486FpuExceptionCheck(State);
+ FPU_SAVE_LAST_INST();
+
if (FPU_GET_TAG(0) == FPU_TAG_EMPTY || FPU_GET_TAG(1) == FPU_TAG_EMPTY)
{
State->FpuStatus.Ie = TRUE;
-
- if (!State->FpuControl.Im) Fast486FpuException(State);
break;
}
FAST486_FPU_DATA_REG Cosine;
ULONGLONG Quadrant;
+ Fast486FpuExceptionCheck(State);
+ FPU_SAVE_LAST_INST();
+
/* Compute the sine */
if (!Fast486FpuCalculateSine(State, &FPU_ST(0), &Sine)) break;
/* FPATAN */
case 0x33:
{
+ Fast486FpuExceptionCheck(State);
+ FPU_SAVE_LAST_INST();
+
if (!Fast486FpuCalculateArcTangent(State,
&FPU_ST(1),
&FPU_ST(0),
{
FAST486_FPU_DATA_REG Value = FPU_ST(0);
+ Fast486FpuExceptionCheck(State);
+ FPU_SAVE_LAST_INST();
+
if ((FPU_GET_TAG(0) == FPU_TAG_EMPTY) || FPU_IS_INDEFINITE(&Value))
{
State->FpuStatus.Ie = TRUE;
if (FPU_GET_TAG(0) == FPU_TAG_EMPTY) State->FpuStatus.Sf = TRUE;
-
- if (!State->FpuControl.Im) Fast486FpuException(State);
break;
}
/* FPREM1 */
case 0x35:
{
+ Fast486FpuExceptionCheck(State);
+ FPU_SAVE_LAST_INST();
+
if (FPU_GET_TAG(0) == FPU_TAG_EMPTY || FPU_GET_TAG(1) == FPU_TAG_EMPTY)
{
State->FpuStatus.Ie = TRUE;
-
- if (!State->FpuControl.Im) Fast486FpuException(State);
break;
}
/* FPREM */
case 0x38:
{
+ Fast486FpuExceptionCheck(State);
+ FPU_SAVE_LAST_INST();
+
if (FPU_GET_TAG(0) == FPU_TAG_EMPTY || FPU_GET_TAG(1) == FPU_TAG_EMPTY)
{
State->FpuStatus.Ie = TRUE;
-
- if (!State->FpuControl.Im) Fast486FpuException(State);
break;
}
{
FAST486_FPU_DATA_REG Value, Logarithm;
+ Fast486FpuExceptionCheck(State);
+ FPU_SAVE_LAST_INST();
+
if (FPU_GET_TAG(0) == FPU_TAG_EMPTY || FPU_GET_TAG(1) == FPU_TAG_EMPTY)
{
State->FpuStatus.Ie = TRUE;
-
- if (!State->FpuControl.Im) Fast486FpuException(State);
break;
}
/* FSQRT */
case 0x3A:
{
+ Fast486FpuExceptionCheck(State);
+ FPU_SAVE_LAST_INST();
+
Fast486FpuCalculateSquareRoot(State, &FPU_ST(0), &FPU_ST(0));
FPU_UPDATE_TAG(0);
case 0x3B:
{
FAST486_FPU_DATA_REG Number = FPU_ST(0);
+
+ Fast486FpuExceptionCheck(State);
FPU_SAVE_LAST_INST();
if (FPU_GET_TAG(0) == FPU_TAG_EMPTY)
{
State->FpuStatus.Ie = TRUE;
-
- if (!State->FpuControl.Im) Fast486FpuException(State);
break;
}
if (!State->FpuControl.Dm)
{
- Fast486FpuException(State);
break;
}
}
{
LONGLONG Result = 0LL;
+ Fast486FpuExceptionCheck(State);
+ FPU_SAVE_LAST_INST();
+
if (FPU_GET_TAG(0) == FPU_TAG_EMPTY)
{
State->FpuStatus.Ie = TRUE;
-
- if (!State->FpuControl.Im) Fast486FpuException(State);
break;
}
if (!State->FpuControl.Dm)
{
- Fast486FpuException(State);
break;
}
}
Fast486FpuFromInteger(State, Result, &FPU_ST(0));
State->FpuStatus.Pe = TRUE;
- if (!State->FpuControl.Pm) Fast486FpuException(State);
-
break;
}
LONGLONG UnbiasedExp = (LONGLONG)((SHORT)FPU_ST(0).Exponent) - FPU_REAL10_BIAS;
INT OldRoundingMode = State->FpuControl.Rc;
+ Fast486FpuExceptionCheck(State);
FPU_SAVE_LAST_INST();
if (FPU_GET_TAG(0) == FPU_TAG_EMPTY || FPU_GET_TAG(1) == FPU_TAG_EMPTY)
{
State->FpuStatus.Ie = TRUE;
-
- if (!State->FpuControl.Im) Fast486FpuException(State);
break;
}
if (!State->FpuControl.Dm)
{
- Fast486FpuException(State);
break;
}
}
FPU_ST(0) = FpuZero;
FPU_UPDATE_TAG(0);
}
- else
- {
- Fast486FpuException(State);
- }
break;
}
FPU_ST(0).Exponent = FPU_MAX_EXPONENT + 1;
FPU_UPDATE_TAG(0);
}
- else
- {
- Fast486FpuException(State);
- }
break;
}
/* FSIN */
case 0x3E:
{
+ Fast486FpuExceptionCheck(State);
FPU_SAVE_LAST_INST();
if (FPU_GET_TAG(0) == FPU_TAG_EMPTY)
{
State->FpuStatus.Ie = TRUE;
-
- if (!State->FpuControl.Im) Fast486FpuException(State);
break;
}
if (!State->FpuControl.Dm)
{
- Fast486FpuException(State);
break;
}
}
/* FCOS */
case 0x3F:
{
+ Fast486FpuExceptionCheck(State);
FPU_SAVE_LAST_INST();
if (FPU_GET_TAG(0) == FPU_TAG_EMPTY)
{
State->FpuStatus.Ie = TRUE;
-
- if (!State->FpuControl.Im) Fast486FpuException(State);
break;
}
if (!State->FpuControl.Dm)
{
- Fast486FpuException(State);
break;
}
}
#ifndef FAST486_NO_FPU
+ Fast486FpuExceptionCheck(State);
FPU_SAVE_LAST_INST();
if (!ModRegRm.Memory)
{
/* Raise the invalid operation exception*/
State->FpuStatus.Ie = TRUE;
-
- if (!State->FpuControl.Im) Fast486FpuException(State);
return;
}
FPU_SET_TAG(0, FPU_TAG_SPECIAL);
}
- else Fast486FpuException(State);
return;
}
if (ModRegRm.Memory)
{
+ Fast486FpuExceptionCheck(State);
FPU_SAVE_LAST_INST();
FPU_SAVE_LAST_OPERAND();
if (!State->FpuControl.Im)
{
- Fast486FpuException(State);
return;
}
}
}
else
{
- Fast486FpuException(State);
return;
}
}
}
else
{
- Fast486FpuException(State);
return;
}
}
#ifndef FAST486_NO_FPU
+ Fast486FpuExceptionCheck(State);
FPU_SAVE_LAST_INST();
if (ModRegRm.Memory)
FPU_SET_TAG(0, FPU_TAG_SPECIAL);
}
- else Fast486FpuException(State);
return;
}
FPU_SET_TAG(ModRegRm.SecondRegister, FPU_TAG_SPECIAL);
}
- else Fast486FpuException(State);
return;
}
ULONGLONG Value;
FAST486_FPU_DATA_REG MemoryData;
+ Fast486FpuExceptionCheck(State);
FPU_SAVE_LAST_INST();
FPU_SAVE_LAST_OPERAND();
{
ULONGLONG Value = FPU_REAL8_INDEFINITE;
+ Fast486FpuExceptionCheck(State);
FPU_SAVE_LAST_INST();
FPU_SAVE_LAST_OPERAND();
if (!State->FpuControl.Im)
{
- Fast486FpuException(State);
return;
}
}
}
else
{
- FPU_SAVE_LAST_INST();
-
switch (ModRegRm.Register)
{
/* FFREE */
{
FAST486_FPU_DATA_REG Temp;
+ FPU_SAVE_LAST_INST();
+ Fast486FpuExceptionCheck(State);
+
if ((FPU_GET_TAG(0) == FPU_TAG_EMPTY)
|| FPU_GET_TAG(ModRegRm.SecondRegister) == FPU_TAG_EMPTY)
{
State->FpuStatus.Ie = TRUE;
-
- if (!State->FpuControl.Im) Fast486FpuException(State);
break;
}
/* FSTP */
case 3:
{
+ FPU_SAVE_LAST_INST();
+ Fast486FpuExceptionCheck(State);
+
FPU_ST(ModRegRm.SecondRegister) = FPU_ST(0);
FPU_UPDATE_TAG(ModRegRm.SecondRegister);
/* FUCOMP */
case 5:
{
+ FPU_SAVE_LAST_INST();
+ Fast486FpuExceptionCheck(State);
+
if ((FPU_GET_TAG(0) == FPU_TAG_EMPTY)
|| (FPU_GET_TAG(ModRegRm.SecondRegister) == FPU_TAG_EMPTY))
{
State->FpuStatus.Ie = TRUE;
-
- if (!State->FpuControl.Im) Fast486FpuException(State);
return;
}
#ifndef FAST486_NO_FPU
FPU_SAVE_LAST_INST();
+ Fast486FpuExceptionCheck(State);
if (ModRegRm.Memory)
{
FPU_SET_TAG(0, FPU_TAG_SPECIAL);
}
- else Fast486FpuException(State);
return;
}
{
/* Raise the invalid operation exception, if unmasked */
State->FpuStatus.Ie = TRUE;
-
- if (!State->FpuControl.Im) Fast486FpuException(State);
return;
}
}
#ifndef FAST486_NO_FPU
FPU_SAVE_LAST_INST();
+ Fast486FpuExceptionCheck(State);
if (ModRegRm.Memory)
{
if (!State->FpuControl.Im)
{
- Fast486FpuException(State);
return;
}
}
}
else
{
- Fast486FpuException(State);
return;
}
}
if (!State->FpuControl.Im)
{
- Fast486FpuException(State);
return;
}
}
if (!State->FpuControl.Im)
{
- Fast486FpuException(State);
return;
}
}
|| FPU_GET_TAG(ModRegRm.SecondRegister) == FPU_TAG_EMPTY)
{
State->FpuStatus.Ie = TRUE;
-
- if (!State->FpuControl.Im) Fast486FpuException(State);
break;
}