Patch by Daniel Zimmermann <netzimme@aim.com>:

[DDK]: Add PCI_ADDRESS_MEMORY_SPACE.
[HAL]: Use it in HalpAssignPCISlotResources.

svn path=/trunk/; revision=45611

diff --git a/reactos/hal/halx86/generic/bus/pcibus.c b/reactos/hal/halx86/generic/bus/pcibus.c
index a09f8bb..96d687a 100644 (file)
--- a/reactos/hal/halx86/generic/bus/pcibus.c
+++ b/reactos/hal/halx86/generic/bus/pcibus.c
@@ -614,7 +614,7 @@ HalpAssignPCISlotResources(IN PBUS_HANDLER BusHandler,
     {
         if (0 != PciConfig.u.type0.BaseAddresses[Address])
         {
     {
         if (0 != PciConfig.u.type0.BaseAddresses[Address])
         {

-            if (/*PCI_BASE_ADDRESS_SPACE_MEMORY*/ 0 ==
+            if (PCI_ADDRESS_MEMORY_SPACE ==

                 (PciConfig.u.type0.BaseAddresses[Address] & 0x1))
             {
                 Descriptor->Type = CmResourceTypeMemory;
                 (PciConfig.u.type0.BaseAddresses[Address] & 0x1))
             {
                 Descriptor->Type = CmResourceTypeMemory;

diff --git a/reactos/include/ddk/winddk.h b/reactos/include/ddk/winddk.h
index 60ca798..a2bbeb1 100644 (file)
--- a/reactos/include/ddk/winddk.h
+++ b/reactos/include/ddk/winddk.h
@@ -4063,9 +4063,10 @@ typedef struct _PCI_COMMON_CONFIG {
 #define PCI_INVALID_VENDORID   0xFFFF
 #define PCI_COMMON_HDR_LENGTH (FIELD_OFFSET(PCI_COMMON_CONFIG, DeviceSpecific))
 
 #define PCI_INVALID_VENDORID   0xFFFF
 #define PCI_COMMON_HDR_LENGTH (FIELD_OFFSET(PCI_COMMON_CONFIG, DeviceSpecific))
 

-#define PCI_ADDRESS_IO_SPACE                0x01
-#define PCI_ADDRESS_MEMORY_TYPE_MASK        0x06
-#define PCI_ADDRESS_MEMORY_PREFETCHABLE     0x08
+#define PCI_ADDRESS_MEMORY_SPACE            0x00000000
+#define PCI_ADDRESS_IO_SPACE                0x00000001
+#define PCI_ADDRESS_MEMORY_TYPE_MASK        0x00000006
+#define PCI_ADDRESS_MEMORY_PREFETCHABLE     0x00000008

 #define PCI_ADDRESS_IO_ADDRESS_MASK         0xfffffffc
 #define PCI_ADDRESS_MEMORY_ADDRESS_MASK     0xfffffff0
 #define PCI_ADDRESS_ROM_ADDRESS_MASK        0xfffff800
 #define PCI_ADDRESS_IO_ADDRESS_MASK         0xfffffffc
 #define PCI_ADDRESS_MEMORY_ADDRESS_MASK     0xfffffff0
 #define PCI_ADDRESS_ROM_ADDRESS_MASK        0xfffff800