From: evb Date: Sat, 17 Jul 2010 15:59:09 +0000 (+0000) Subject: Implement PciPdoCreate and add all PDO IRP stub functions, set dispatch table for... X-Git-Tag: backups/Ash_Shell@48412~1^2~199 X-Git-Url: https://git.reactos.org/?p=reactos.git;a=commitdiff_plain;h=693551c36a3da3c871366982f6049d4e69c7b3a1 Implement PciPdoCreate and add all PDO IRP stub functions, set dispatch table for major/minor command, add PciIrpInvalidDeviceRequest Fix bug in PciFindPdoByFunction should check device slot info too Add more enumeration codes in PciScanBus to create PDO PCI_HACK_FAKE_CLASS_CODE support Build PDO extension, set ready for PnP manger, now 41 QDR returned Add PCI/CardBus Bridge to list Detect bridge/IDE controller with no power down support, hack for Intel 82375 PCI to EISA bridge for Alpha thanks to sir_richard QUERY_ID is sent to PDOs now! svn path=/trunk/; revision=48099 --- diff --git a/reactos/drivers/bus/pcix/dispatch.c b/reactos/drivers/bus/pcix/dispatch.c index 0298ea2d0d7..c9d06d44211 100644 --- a/reactos/drivers/bus/pcix/dispatch.c +++ b/reactos/drivers/bus/pcix/dispatch.c @@ -264,4 +264,14 @@ PciIrpNotSupported(IN PIRP Irp, return STATUS_NOT_SUPPORTED; } +NTSTATUS +NTAPI +PciIrpInvalidDeviceRequest(IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_FDO_EXTENSION DeviceExtension) +{ + /* Not supported */ + return STATUS_INVALID_DEVICE_REQUEST; +} + /* EOF */ diff --git a/reactos/drivers/bus/pcix/enum.c b/reactos/drivers/bus/pcix/enum.c index 09f586f6f8c..db2313250f1 100644 --- a/reactos/drivers/bus/pcix/enum.c +++ b/reactos/drivers/bus/pcix/enum.c @@ -95,14 +95,18 @@ NTAPI PciScanBus(IN PPCI_FDO_EXTENSION DeviceExtension) { ULONG MaxDevice = PCI_MAX_DEVICES; + BOOLEAN ProcessFlag = FALSE; ULONG i, j, k; LONGLONG HackFlags; + PDEVICE_OBJECT DeviceObject; UCHAR Buffer[PCI_COMMON_HDR_LENGTH]; PPCI_COMMON_HEADER PciData = (PVOID)Buffer; PCI_SLOT_NUMBER PciSlot; + NTSTATUS Status; + PPCI_PDO_EXTENSION PdoExtension, NewExtension; + PPCI_PDO_EXTENSION* BridgeExtension; PWCHAR DescriptionText; USHORT SubVendorId, SubSystemId; - PPCI_PDO_EXTENSION PdoExtension; DPRINT1("PCI Scan Bus: FDO Extension @ 0x%x, Base Bus = 0x%x\n", DeviceExtension, DeviceExtension->BaseBus); @@ -217,7 +221,7 @@ PciScanBus(IN PPCI_FDO_EXTENSION DeviceExtension) /* Check if a PDO has already been created for this device */ PdoExtension = PciFindPdoByFunction(DeviceExtension, - PciSlot.u.bits.FunctionNumber, + PciSlot.u.AsULONG, PciData); if (PdoExtension) { @@ -225,6 +229,91 @@ PciScanBus(IN PPCI_FDO_EXTENSION DeviceExtension) UNIMPLEMENTED; while (TRUE); } + + /* Bus processing will need to happen */ + ProcessFlag = TRUE; + + /* Create the PDO for this device */ + Status = PciPdoCreate(DeviceExtension, PciSlot, &DeviceObject); + ASSERT(NT_SUCCESS(Status)); + NewExtension = (PPCI_PDO_EXTENSION)DeviceObject->DeviceExtension; + + /* Check for broken devices with wrong/no class codes */ + if (HackFlags & PCI_HACK_FAKE_CLASS_CODE) + { + /* Setup a default one */ + PciData->BaseClass = PCI_CLASS_BASE_SYSTEM_DEV; + PciData->SubClass = PCI_SUBCLASS_SYS_OTHER; + + /* Device will behave erratically when reading back data */ + NewExtension->ExpectedWritebackFailure = TRUE; + } + + /* Clone all the information from the header */ + NewExtension->VendorId = PciData->VendorID; + NewExtension->DeviceId = PciData->DeviceID; + NewExtension->RevisionId = PciData->RevisionID; + NewExtension->ProgIf = PciData->ProgIf; + NewExtension->SubClass = PciData->SubClass; + NewExtension->BaseClass = PciData->BaseClass; + NewExtension->HeaderType = PCI_CONFIGURATION_TYPE(PciData); + + /* Check for PCI or Cardbus bridges, which are supported by this driver */ + if ((NewExtension->BaseClass == PCI_CLASS_BRIDGE_DEV) && + ((NewExtension->SubClass == PCI_SUBCLASS_BR_PCI_TO_PCI) || + (NewExtension->SubClass == PCI_SUBCLASS_BR_CARDBUS))) + { + /* Acquire this device's lock */ + KeEnterCriticalRegion(); + KeWaitForSingleObject(&DeviceExtension->ChildListLock, + Executive, + KernelMode, + FALSE, + NULL); + + /* Scan the bridge list until the first free entry */ + for (BridgeExtension = &DeviceExtension->ChildBridgePdoList; + *BridgeExtension; + BridgeExtension = &(*BridgeExtension)->NextBridge); + + /* Add this PDO as a bridge */ + *BridgeExtension = NewExtension; + ASSERT(NewExtension->NextBridge == NULL); + + /* Release this device's lock */ + KeSetEvent(&DeviceExtension->ChildListLock, IO_NO_INCREMENT, FALSE); + KeLeaveCriticalRegion(); + } + + /* Check for IDE controllers */ + if ((NewExtension->BaseClass == PCI_CLASS_MASS_STORAGE_CTLR) && + (NewExtension->SubClass == PCI_SUBCLASS_MSC_IDE_CTLR)) + { + /* Do not allow them to power down completely */ + NewExtension->DisablePowerDown = TRUE; + } + + /* + * Check if this is a legacy bridge. Note that the i82375 PCI/EISA + * bridge that is present on certain NT Alpha machines appears as + * non-classified so detect it manually by scanning for its VID/PID. + */ + if (((NewExtension->BaseClass == PCI_CLASS_BRIDGE_DEV) && + ((NewExtension->SubClass == PCI_SUBCLASS_BR_ISA) || + (NewExtension->SubClass == PCI_SUBCLASS_BR_EISA) || + (NewExtension->SubClass == PCI_SUBCLASS_BR_MCA))) || + ((NewExtension->VendorId == 0x8086) && (NewExtension->DeviceId == 0x482))) + { + /* Do not allow these legacy bridges to be powered down */ + NewExtension->DisablePowerDown = TRUE; + } + + /* Save latency and cache size information */ + NewExtension->SavedLatencyTimer = PciData->LatencyTimer; + NewExtension->SavedCacheLineSize = PciData->CacheLineSize; + + /* The PDO is now ready to go */ + DeviceObject->Flags &= ~DO_DEVICE_INITIALIZING; } } diff --git a/reactos/drivers/bus/pcix/fdo.c b/reactos/drivers/bus/pcix/fdo.c index cc8c065c802..256df1a3f4d 100644 --- a/reactos/drivers/bus/pcix/fdo.c +++ b/reactos/drivers/bus/pcix/fdo.c @@ -19,41 +19,41 @@ BOOLEAN PciBreakOnDefault; PCI_MN_DISPATCH_TABLE PciFdoDispatchPowerTable[] = { - {IRP_DISPATCH, PciFdoWaitWake}, - {IRP_DOWNWARD, PciIrpNotSupported}, - {IRP_DOWNWARD, PciFdoSetPowerState}, - {IRP_DOWNWARD, PciFdoIrpQueryPower}, - {IRP_DOWNWARD, PciIrpNotSupported} + {IRP_DISPATCH, (PCI_DISPATCH_FUNCTION)PciFdoWaitWake}, + {IRP_DOWNWARD, (PCI_DISPATCH_FUNCTION)PciIrpNotSupported}, + {IRP_DOWNWARD, (PCI_DISPATCH_FUNCTION)PciFdoSetPowerState}, + {IRP_DOWNWARD, (PCI_DISPATCH_FUNCTION)PciFdoIrpQueryPower}, + {IRP_DOWNWARD, (PCI_DISPATCH_FUNCTION)PciIrpNotSupported} }; PCI_MN_DISPATCH_TABLE PciFdoDispatchPnpTable[] = { - {IRP_UPWARD, PciFdoIrpStartDevice}, - {IRP_DOWNWARD, PciFdoIrpQueryRemoveDevice}, - {IRP_DISPATCH, PciFdoIrpRemoveDevice}, - {IRP_DOWNWARD, PciFdoIrpCancelRemoveDevice}, - {IRP_DOWNWARD, PciFdoIrpStopDevice}, - {IRP_DOWNWARD, PciFdoIrpQueryStopDevice}, - {IRP_DOWNWARD, PciFdoIrpCancelStopDevice}, - {IRP_DOWNWARD, PciFdoIrpQueryDeviceRelations}, - {IRP_DISPATCH, PciFdoIrpQueryInterface}, - {IRP_UPWARD, PciFdoIrpQueryCapabilities}, - {IRP_DOWNWARD, PciIrpNotSupported}, - {IRP_DOWNWARD, PciIrpNotSupported}, - {IRP_DOWNWARD, PciIrpNotSupported}, - {IRP_DOWNWARD, PciIrpNotSupported}, - {IRP_DOWNWARD, PciIrpNotSupported}, - {IRP_DOWNWARD, PciIrpNotSupported}, - {IRP_DOWNWARD, PciIrpNotSupported}, - {IRP_DOWNWARD, PciIrpNotSupported}, - {IRP_DOWNWARD, PciIrpNotSupported}, - {IRP_DOWNWARD, PciIrpNotSupported}, - {IRP_DOWNWARD, PciIrpNotSupported}, - {IRP_DOWNWARD, PciIrpNotSupported}, - {IRP_UPWARD, PciFdoIrpDeviceUsageNotification}, - {IRP_DOWNWARD, PciFdoIrpSurpriseRemoval}, - {IRP_DOWNWARD, PciFdoIrpQueryLegacyBusInformation}, - {IRP_DOWNWARD, PciIrpNotSupported} + {IRP_UPWARD, (PCI_DISPATCH_FUNCTION)PciFdoIrpStartDevice}, + {IRP_DOWNWARD, (PCI_DISPATCH_FUNCTION)PciFdoIrpQueryRemoveDevice}, + {IRP_DISPATCH, (PCI_DISPATCH_FUNCTION)PciFdoIrpRemoveDevice}, + {IRP_DOWNWARD, (PCI_DISPATCH_FUNCTION)PciFdoIrpCancelRemoveDevice}, + {IRP_DOWNWARD, (PCI_DISPATCH_FUNCTION)PciFdoIrpStopDevice}, + {IRP_DOWNWARD, (PCI_DISPATCH_FUNCTION)PciFdoIrpQueryStopDevice}, + {IRP_DOWNWARD, (PCI_DISPATCH_FUNCTION)PciFdoIrpCancelStopDevice}, + {IRP_DOWNWARD, (PCI_DISPATCH_FUNCTION)PciFdoIrpQueryDeviceRelations}, + {IRP_DISPATCH, (PCI_DISPATCH_FUNCTION)PciFdoIrpQueryInterface}, + {IRP_UPWARD, (PCI_DISPATCH_FUNCTION)PciFdoIrpQueryCapabilities}, + {IRP_DOWNWARD, (PCI_DISPATCH_FUNCTION)PciIrpNotSupported}, + {IRP_DOWNWARD, (PCI_DISPATCH_FUNCTION)PciIrpNotSupported}, + {IRP_DOWNWARD, (PCI_DISPATCH_FUNCTION)PciIrpNotSupported}, + {IRP_DOWNWARD, (PCI_DISPATCH_FUNCTION)PciIrpNotSupported}, + {IRP_DOWNWARD, (PCI_DISPATCH_FUNCTION)PciIrpNotSupported}, + {IRP_DOWNWARD, (PCI_DISPATCH_FUNCTION)PciIrpNotSupported}, + {IRP_DOWNWARD, (PCI_DISPATCH_FUNCTION)PciIrpNotSupported}, + {IRP_DOWNWARD, (PCI_DISPATCH_FUNCTION)PciIrpNotSupported}, + {IRP_DOWNWARD, (PCI_DISPATCH_FUNCTION)PciIrpNotSupported}, + {IRP_DOWNWARD, (PCI_DISPATCH_FUNCTION)PciIrpNotSupported}, + {IRP_DOWNWARD, (PCI_DISPATCH_FUNCTION)PciIrpNotSupported}, + {IRP_DOWNWARD, (PCI_DISPATCH_FUNCTION)PciIrpNotSupported}, + {IRP_UPWARD, (PCI_DISPATCH_FUNCTION)PciFdoIrpDeviceUsageNotification}, + {IRP_DOWNWARD, (PCI_DISPATCH_FUNCTION)PciFdoIrpSurpriseRemoval}, + {IRP_DOWNWARD, (PCI_DISPATCH_FUNCTION)PciFdoIrpQueryLegacyBusInformation}, + {IRP_DOWNWARD, (PCI_DISPATCH_FUNCTION)PciIrpNotSupported} }; PCI_MJ_DISPATCH_TABLE PciFdoDispatchTable = @@ -63,9 +63,9 @@ PCI_MJ_DISPATCH_TABLE PciFdoDispatchTable = IRP_MN_QUERY_POWER, PciFdoDispatchPowerTable, IRP_DOWNWARD, - PciIrpNotSupported, + (PCI_DISPATCH_FUNCTION)PciIrpNotSupported, IRP_DOWNWARD, - PciIrpNotSupported + (PCI_DISPATCH_FUNCTION)PciIrpNotSupported }; /* FUNCTIONS ******************************************************************/ diff --git a/reactos/drivers/bus/pcix/pci.h b/reactos/drivers/bus/pcix/pci.h index becc9d55b24..d9549b05fb7 100644 --- a/reactos/drivers/bus/pcix/pci.h +++ b/reactos/drivers/bus/pcix/pci.h @@ -197,8 +197,8 @@ typedef struct _PCI_FDO_EXTENSION typedef struct _PCI_FUNCTION_RESOURCES { - IO_RESOURCE_DESCRIPTOR Limit[7]; - CM_PARTIAL_RESOURCE_DESCRIPTOR Current[7]; + IO_RESOURCE_DESCRIPTOR Limit[7]; + CM_PARTIAL_RESOURCE_DESCRIPTOR Current[7]; } PCI_FUNCTION_RESOURCES, *PPCI_FUNCTION_RESOURCES; typedef union _PCI_HEADER_TYPE_DEPENDENT @@ -231,7 +231,7 @@ typedef struct _PCI_PDO_EXTENSION struct _PCI_MJ_DISPATCH_TABLE *IrpDispatchTable; BOOLEAN DeviceState; BOOLEAN TentativeNextState; - + KEVENT SecondaryExtLock; PCI_SLOT_NUMBER Slot; PDEVICE_OBJECT PhysicalDeviceObject; @@ -288,7 +288,7 @@ typedef struct _PCI_PDO_EXTENSION typedef NTSTATUS (NTAPI *PCI_DISPATCH_FUNCTION)( IN PIRP Irp, IN PIO_STACK_LOCATION IoStackLocation, - IN PPCI_FDO_EXTENSION DeviceExtension + IN PVOID DeviceExtension ); // @@ -402,6 +402,14 @@ PciCallDownIrpStack( IN PIRP Irp ); +NTSTATUS +NTAPI +PciIrpInvalidDeviceRequest( + IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_FDO_EXTENSION DeviceExtension +); + // // Power Routines // @@ -543,6 +551,210 @@ PciFdoIrpQueryLegacyBusInformation( IN PPCI_FDO_EXTENSION DeviceExtension ); +// +// Device PDO Routines +// +NTSTATUS +NTAPI +PciPdoCreate( + IN PPCI_FDO_EXTENSION DeviceExtension, + IN PCI_SLOT_NUMBER Slot, + OUT PDEVICE_OBJECT *PdoDeviceObject +); + +NTSTATUS +NTAPI +PciPdoWaitWake( + IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension +); + +NTSTATUS +NTAPI +PciPdoSetPowerState( + IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension +); + +NTSTATUS +NTAPI +PciPdoIrpQueryPower( + IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension +); + +NTSTATUS +NTAPI +PciPdoIrpStartDevice( + IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension +); + +NTSTATUS +NTAPI +PciPdoIrpQueryRemoveDevice( + IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension +); + +NTSTATUS +NTAPI +PciPdoIrpRemoveDevice( + IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension +); + +NTSTATUS +NTAPI +PciPdoIrpCancelRemoveDevice( + IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension +); + +NTSTATUS +NTAPI +PciPdoIrpStopDevice( + IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension +); + +NTSTATUS +NTAPI +PciPdoIrpQueryStopDevice( + IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension +); + +NTSTATUS +NTAPI +PciPdoIrpCancelStopDevice( + IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension +); + +NTSTATUS +NTAPI +PciPdoIrpQueryDeviceRelations( + IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension +); + +NTSTATUS +NTAPI +PciPdoIrpQueryInterface( + IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension +); + +NTSTATUS +NTAPI +PciPdoIrpQueryCapabilities( + IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension +); + +NTSTATUS +NTAPI +PciPdoIrpQueryResources( + IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension +); + +NTSTATUS +NTAPI +PciPdoIrpQueryResourceRequirements( + IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension +); + +NTSTATUS +NTAPI +PciPdoIrpQueryDeviceText( + IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension +); + +NTSTATUS +NTAPI +PciPdoIrpReadConfig( + IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension +); + +NTSTATUS +NTAPI +PciPdoIrpWriteConfig( + IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension +); + +NTSTATUS +NTAPI +PciPdoIrpQueryId( + IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension +); + +NTSTATUS +NTAPI +PciPdoIrpQueryDeviceState( + IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension +); + +NTSTATUS +NTAPI +PciPdoIrpQueryBusInformation( + IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension +); + +NTSTATUS +NTAPI +PciPdoIrpDeviceUsageNotification( + IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension +); + +NTSTATUS +NTAPI +PciPdoIrpSurpriseRemoval( + IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension +); + +NTSTATUS +NTAPI +PciPdoIrpQueryLegacyBusInformation( + IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension +); + + // // HAL Callback/Hook Routines // diff --git a/reactos/drivers/bus/pcix/pdo.c b/reactos/drivers/bus/pcix/pdo.c index b54dda4bac7..2e2bd57bc1f 100644 --- a/reactos/drivers/bus/pcix/pdo.c +++ b/reactos/drivers/bus/pcix/pdo.c @@ -14,6 +14,393 @@ /* GLOBALS ********************************************************************/ +LONG PciPdoSequenceNumber; + +C_ASSERT(FIELD_OFFSET(PCI_FDO_EXTENSION, DeviceState) == FIELD_OFFSET(PCI_PDO_EXTENSION, DeviceState)); +C_ASSERT(FIELD_OFFSET(PCI_FDO_EXTENSION, TentativeNextState) == FIELD_OFFSET(PCI_PDO_EXTENSION, TentativeNextState)); +C_ASSERT(FIELD_OFFSET(PCI_FDO_EXTENSION, List) == FIELD_OFFSET(PCI_PDO_EXTENSION, Next)); + +PCI_MN_DISPATCH_TABLE PciPdoDispatchPowerTable[] = +{ + {IRP_DISPATCH, (PCI_DISPATCH_FUNCTION)PciPdoWaitWake}, + {IRP_COMPLETE, (PCI_DISPATCH_FUNCTION)PciIrpNotSupported}, + {IRP_COMPLETE, (PCI_DISPATCH_FUNCTION)PciPdoSetPowerState}, + {IRP_COMPLETE, (PCI_DISPATCH_FUNCTION)PciPdoIrpQueryPower}, + {IRP_COMPLETE, (PCI_DISPATCH_FUNCTION)PciIrpNotSupported} +}; + +PCI_MN_DISPATCH_TABLE PciPdoDispatchPnpTable[] = +{ + {IRP_COMPLETE, (PCI_DISPATCH_FUNCTION)PciPdoIrpStartDevice}, + {IRP_COMPLETE, (PCI_DISPATCH_FUNCTION)PciPdoIrpQueryRemoveDevice}, + {IRP_COMPLETE, (PCI_DISPATCH_FUNCTION)PciPdoIrpRemoveDevice}, + {IRP_COMPLETE, (PCI_DISPATCH_FUNCTION)PciPdoIrpCancelRemoveDevice}, + {IRP_COMPLETE, (PCI_DISPATCH_FUNCTION)PciPdoIrpStopDevice}, + {IRP_COMPLETE, (PCI_DISPATCH_FUNCTION)PciPdoIrpQueryStopDevice}, + {IRP_COMPLETE, (PCI_DISPATCH_FUNCTION)PciPdoIrpCancelStopDevice}, + {IRP_COMPLETE, (PCI_DISPATCH_FUNCTION)PciPdoIrpQueryDeviceRelations}, + {IRP_COMPLETE, (PCI_DISPATCH_FUNCTION)PciPdoIrpQueryInterface}, + {IRP_COMPLETE, (PCI_DISPATCH_FUNCTION)PciPdoIrpQueryCapabilities}, + {IRP_COMPLETE, (PCI_DISPATCH_FUNCTION)PciPdoIrpQueryResources}, + {IRP_COMPLETE, (PCI_DISPATCH_FUNCTION)PciPdoIrpQueryResourceRequirements}, + {IRP_COMPLETE, (PCI_DISPATCH_FUNCTION)PciPdoIrpQueryDeviceText}, + {IRP_COMPLETE, (PCI_DISPATCH_FUNCTION)PciIrpNotSupported}, + {IRP_COMPLETE, (PCI_DISPATCH_FUNCTION)PciIrpNotSupported}, + {IRP_COMPLETE, (PCI_DISPATCH_FUNCTION)PciPdoIrpReadConfig}, + {IRP_COMPLETE, (PCI_DISPATCH_FUNCTION)PciPdoIrpWriteConfig}, + {IRP_COMPLETE, (PCI_DISPATCH_FUNCTION)PciIrpNotSupported}, + {IRP_COMPLETE, (PCI_DISPATCH_FUNCTION)PciIrpNotSupported}, + {IRP_COMPLETE, (PCI_DISPATCH_FUNCTION)PciPdoIrpQueryId}, + {IRP_COMPLETE, (PCI_DISPATCH_FUNCTION)PciPdoIrpQueryDeviceState}, + {IRP_COMPLETE, (PCI_DISPATCH_FUNCTION)PciPdoIrpQueryBusInformation}, + {IRP_COMPLETE, (PCI_DISPATCH_FUNCTION)PciPdoIrpDeviceUsageNotification}, + {IRP_COMPLETE, (PCI_DISPATCH_FUNCTION)PciPdoIrpSurpriseRemoval}, + {IRP_COMPLETE, (PCI_DISPATCH_FUNCTION)PciPdoIrpQueryLegacyBusInformation}, + {IRP_COMPLETE, (PCI_DISPATCH_FUNCTION)PciIrpNotSupported} +}; + +PCI_MJ_DISPATCH_TABLE PciPdoDispatchTable = +{ + IRP_MN_QUERY_LEGACY_BUS_INFORMATION, + PciPdoDispatchPnpTable, + IRP_MN_QUERY_POWER, + PciPdoDispatchPowerTable, + IRP_COMPLETE, + (PCI_DISPATCH_FUNCTION)PciIrpNotSupported, + IRP_COMPLETE, + (PCI_DISPATCH_FUNCTION)PciIrpInvalidDeviceRequest +}; + /* FUNCTIONS ******************************************************************/ +NTSTATUS +NTAPI +PciPdoWaitWake(IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension) +{ + UNIMPLEMENTED; + while (TRUE); + return STATUS_NOT_SUPPORTED; +} + +NTSTATUS +NTAPI +PciPdoSetPowerState(IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension) +{ + UNIMPLEMENTED; + while (TRUE); + return STATUS_NOT_SUPPORTED; +} + +NTSTATUS +NTAPI +PciPdoIrpQueryPower(IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension) +{ + UNIMPLEMENTED; + while (TRUE); + return STATUS_NOT_SUPPORTED; +} + +NTSTATUS +NTAPI +PciPdoIrpStartDevice(IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension) +{ + UNIMPLEMENTED; + while (TRUE); + return STATUS_NOT_SUPPORTED; +} + +NTSTATUS +NTAPI +PciPdoIrpQueryRemoveDevice(IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension) +{ + UNIMPLEMENTED; + while (TRUE); + return STATUS_NOT_SUPPORTED; +} + +NTSTATUS +NTAPI +PciPdoIrpRemoveDevice(IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension) +{ + UNIMPLEMENTED; + while (TRUE); + return STATUS_NOT_SUPPORTED; +} + +NTSTATUS +NTAPI +PciPdoIrpCancelRemoveDevice(IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension) +{ + UNIMPLEMENTED; + while (TRUE); + return STATUS_NOT_SUPPORTED; +} + +NTSTATUS +NTAPI +PciPdoIrpStopDevice(IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension) +{ + UNIMPLEMENTED; + while (TRUE); + return STATUS_NOT_SUPPORTED; +} + +NTSTATUS +NTAPI +PciPdoIrpQueryStopDevice(IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension) +{ + UNIMPLEMENTED; + while (TRUE); + return STATUS_NOT_SUPPORTED; +} + +NTSTATUS +NTAPI +PciPdoIrpCancelStopDevice(IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension) +{ + UNIMPLEMENTED; + while (TRUE); + return STATUS_NOT_SUPPORTED; +} + +NTSTATUS +NTAPI +PciPdoIrpQueryInterface(IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension) +{ + UNIMPLEMENTED; + while (TRUE); + return STATUS_NOT_SUPPORTED; +} + +NTSTATUS +NTAPI +PciPdoIrpQueryDeviceRelations(IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension) +{ + UNIMPLEMENTED; + while (TRUE); + return STATUS_NOT_SUPPORTED; +} + +NTSTATUS +NTAPI +PciPdoIrpQueryCapabilities(IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension) +{ + UNIMPLEMENTED; + while (TRUE); + return STATUS_NOT_SUPPORTED; +} + +NTSTATUS +NTAPI +PciPdoIrpQueryResources(IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension) +{ + UNIMPLEMENTED; + while (TRUE); + return STATUS_NOT_SUPPORTED; +} + +NTSTATUS +NTAPI +PciPdoIrpQueryResourceRequirements(IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension) +{ + UNIMPLEMENTED; + while (TRUE); + return STATUS_NOT_SUPPORTED; +} + +NTSTATUS +NTAPI +PciPdoIrpQueryDeviceText(IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension) +{ + UNIMPLEMENTED; + while (TRUE); + return STATUS_NOT_SUPPORTED; +} + +NTSTATUS +NTAPI +PciPdoIrpQueryId(IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension) +{ + UNIMPLEMENTED; + while (TRUE); + return STATUS_NOT_SUPPORTED; +} + +NTSTATUS +NTAPI +PciPdoIrpQueryBusInformation(IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension) +{ + UNIMPLEMENTED; + while (TRUE); + return STATUS_NOT_SUPPORTED; +} + +NTSTATUS +NTAPI +PciPdoIrpReadConfig(IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension) +{ + UNIMPLEMENTED; + while (TRUE); + return STATUS_NOT_SUPPORTED; +} + +NTSTATUS +NTAPI +PciPdoIrpWriteConfig(IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension) +{ + UNIMPLEMENTED; + while (TRUE); + return STATUS_NOT_SUPPORTED; +} + +NTSTATUS +NTAPI +PciPdoIrpQueryDeviceState(IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension) +{ + UNIMPLEMENTED; + while (TRUE); + return STATUS_NOT_SUPPORTED; +} + +NTSTATUS +NTAPI +PciPdoIrpDeviceUsageNotification(IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension) +{ + UNIMPLEMENTED; + while (TRUE); + return STATUS_NOT_SUPPORTED; +} + +NTSTATUS +NTAPI +PciPdoIrpSurpriseRemoval(IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension) +{ + UNIMPLEMENTED; + while (TRUE); + return STATUS_NOT_SUPPORTED; +} + +NTSTATUS +NTAPI +PciPdoIrpQueryLegacyBusInformation(IN PIRP Irp, + IN PIO_STACK_LOCATION IoStackLocation, + IN PPCI_PDO_EXTENSION DeviceExtension) +{ + UNIMPLEMENTED; + while (TRUE); + return STATUS_NOT_SUPPORTED; +} + +NTSTATUS +NTAPI +PciPdoCreate(IN PPCI_FDO_EXTENSION DeviceExtension, + IN PCI_SLOT_NUMBER Slot, + OUT PDEVICE_OBJECT *PdoDeviceObject) +{ + WCHAR DeviceName[32]; + UNICODE_STRING DeviceString; + NTSTATUS Status; + PDEVICE_OBJECT DeviceObject; + PPCI_PDO_EXTENSION PdoExtension; + ULONG SequenceNumber; + PAGED_CODE(); + + /* Pick an atomically unique sequence number for this device */ + SequenceNumber = InterlockedIncrement(&PciPdoSequenceNumber); + + /* Create the standard PCI device name for a PDO */ + swprintf(DeviceName, L"\\Device\\NTPNP_PCI%04d", SequenceNumber); + RtlInitUnicodeString(&DeviceString, DeviceName); + + /* Create the actual device now */ + Status = IoCreateDevice(DeviceExtension->FunctionalDeviceObject->DriverObject, + sizeof(PCI_PDO_EXTENSION), + &DeviceString, + FILE_DEVICE_BUS_EXTENDER, + 0, + 0, + &DeviceObject); + ASSERT(NT_SUCCESS(Status)); + + /* Get the extension for it */ + PdoExtension = (PPCI_PDO_EXTENSION)DeviceObject->DeviceExtension; + DPRINT1("PCI: New PDO (b=0x%x, d=0x%x, f=0x%x) @ %p, ext @ %p\n", + DeviceExtension->BaseBus, + Slot.u.bits.DeviceNumber, + Slot.u.bits.FunctionNumber, + DeviceObject, + DeviceObject->DeviceExtension); + + /* Configure the extension */ + PdoExtension->ExtensionType = PciPdoExtensionType; + PdoExtension->IrpDispatchTable = &PciPdoDispatchTable; + PdoExtension->PhysicalDeviceObject = DeviceObject; + PdoExtension->Slot = Slot; + PdoExtension->PowerState.CurrentSystemState = PowerDeviceD0; + PdoExtension->PowerState.CurrentDeviceState = PowerDeviceD0; + PdoExtension->ParentFdoExtension = DeviceExtension; + + /* Initialize the lock for arbiters and other interfaces */ + KeInitializeEvent(&PdoExtension->SecondaryExtLock, SynchronizationEvent, TRUE); + + /* Initialize the state machine */ + PciInitializeState((PPCI_FDO_EXTENSION)PdoExtension); + + /* Add the PDO to the parent's list */ + PdoExtension->Next = NULL; + PciInsertEntryAtTail((PSINGLE_LIST_ENTRY)&DeviceExtension->ChildPdoList, + (PPCI_FDO_EXTENSION)PdoExtension, + &DeviceExtension->ChildListLock); + + /* And finally return it to the caller */ + *PdoDeviceObject = DeviceObject; + return STATUS_SUCCESS; +} + /* EOF */ diff --git a/reactos/drivers/bus/pcix/utils.c b/reactos/drivers/bus/pcix/utils.c index 5ad79d93ca3..ed60cb55973 100644 --- a/reactos/drivers/bus/pcix/utils.c +++ b/reactos/drivers/bus/pcix/utils.c @@ -718,7 +718,7 @@ PciFindPdoByFunction(IN PPCI_FDO_EXTENSION DeviceExtension, if (!PdoExtension->ReportedMissing) { /* Check if the function number and header data matches */ - if ((FunctionNumber == PdoExtension->Slot.u.bits.FunctionNumber) && + if ((FunctionNumber == PdoExtension->Slot.u.AsULONG) && (PdoExtension->VendorId == PciData->VendorID) && (PdoExtension->DeviceId == PciData->DeviceID) && (PdoExtension->RevisionId == PciData->RevisionID))